Andrew Cagney
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63be8febf7
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Rewrite the MIPS simulator's memory model so that it uses the generic
common/sim-core.
Add support for 3, 5, 6, 7 byte transfers to sim core.
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1997-11-05 08:17:26 +00:00 |
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Andrew Cagney
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89d0973831
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Add support for 16 byte quantities to sim-endian macro H2T.
Add model-filter field to option, include, model anf function igen records
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1997-10-28 07:10:36 +00:00 |
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Andrew Cagney
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a86809d323
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Implement sim_core_{read,write}_word using sim_core_{read,write}_<N>.
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1997-10-28 02:13:09 +00:00 |
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Doug Evans
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2fc2f8d8a4
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Fix typo.
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1997-10-27 19:25:05 +00:00 |
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Andrew Cagney
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f45dd42b32
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Add 128 bit transfers to sim core.
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1997-10-27 03:00:12 +00:00 |
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Andrew Cagney
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1b217de0f3
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Correct type of address argument for sim_core_{read,write}
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1997-10-14 09:24:57 +00:00 |
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Andrew Cagney
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a34abff813
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o Add modulo argument to sim_core_attach
o Add sim-memopt module - memory option processing.
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1997-09-04 03:47:39 +00:00 |
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David Edelsohn
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74db699d1d
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* Makefile.in (TAGS): Add support for "/* TAGS: foo */" marker.
* sim-n-bits.h: Add TAGS comments for all functions.
* sim-n-core.h: Likewise.
* sim-n-endian.h: Likewise.
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1997-09-02 21:58:58 +00:00 |
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Andrew Cagney
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2f2e6c5d5b
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Extend xor-endian and per-cpu support in core module.
Allow negated test when watching value within core.
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1997-05-27 06:48:20 +00:00 |
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Andrew Cagney
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cd0d873d0f
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Preliminary suport for xor-endian suport in core module.
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1997-05-23 09:19:43 +00:00 |
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Andrew Cagney
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7a418800c1
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Start of implementation of a distributed (between processors)
simulator core object.
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1997-05-05 13:21:04 +00:00 |
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Andrew Cagney
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1fe052808a
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Update devo version of m32r sim to build with recent sim/common changes.
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1997-05-02 08:41:15 +00:00 |
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Andrew Cagney
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f2de7dfd8c
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Add a number of per-simulator options: hostendian, endian, inline, warnings.
Rename *-n.h files to be dos compatible
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1997-03-14 15:13:58 +00:00 |
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