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Author SHA1 Message Date
H.J. Lu
e96d56a1c8 Don't use i386_is_register in tc_x86_parse_to_dw2regnum. 
2010-04-21  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (tc_x86_parse_to_dw2regnum): Don't use
	i386_is_register.
 2010-04-22 01:01:34 +00:00
H.J. Lu
8d46fc7c2f Remove is_intel_syntax from i386_is_register. 
2010-04-21  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (i386_is_register): Remove is_intel_syntax.
	(x86_cons): Updated.
	(parse_register): Likewise.
	(tc_x86_parse_to_dw2regnum): Likewise.
	* config/tc-i386-intel.c (i386_intel_simplify): Likewise.
	(i386_intel_operand): Likewise.
 2010-04-22 00:43:38 +00:00
H.J. Lu
3c7b9c2c54 Properly handle ".equ symbol, reg + NUM" in x86 Intel syntax. 
gas/

2010-04-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/11509
	* config/tc-i386-intel.c (i386_intel_simplify_register): New.
	(i386_intel_simplify): Use i386_is_register and
	i386_intel_simplify_register. Set X_md for O_register and
	check X_md for O_constant.
	(i386_intel_operand): Use i386_is_register.

	* config/tc-i386.c (i386_is_register): New.
	(x86_cons): Initialize the X_md field.  Use i386_is_register.
	(parse_register): Use i386_is_register.
	(tc_x86_parse_to_dw2regnum): Likewise.

gas/testsuite/

2010-04-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/11509
	* gas/i386/equ.s: Add tests for ".equ symbol, reg + NUM".
	* gas/i386/equ.d: Updated.
 2010-04-21 18:09:52 +00:00
H.J. Lu
cff8d58ab4 Use STRING_COMMA_LEN to avoid strlen. 
2010-03-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (lex_got): Use STRING_COMMA_LEN on gotrel.
 2010-03-22 13:49:50 +00:00
H.J. Lu
86e026a449 Replace oprand_size_mismatch with operand_size_mismatch. 
2010-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (i386_error): Replace oprand_size_mismatch
	with operand_size_mismatch.
	(operand_size_match): Updated.
	(match_template): Likewise.
 2010-03-22 03:29:47 +00:00
H.J. Lu
a65babc949 Set error instead of err_msg on failure. 
2010-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (i386_error): New.
	(_i386_insn): Replace err_msg with error.
	(operand_size_match): Set error instead of err_msg on failure.
	(operand_type_match): Likewise.
	(operand_type_register_match): Likewise.
	(VEX_check_operands): Likewise.
	(match_template): Likewise.  Use error instead of err_msg with
	as_bad.
 2010-03-22 02:20:58 +00:00
H.J. Lu
a6c560506b Update x86 assembler error messages. 
2010-02-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Update error messages.
 2010-02-25 21:47:27 +00:00
H.J. Lu
891edac42b Improve x86 assembler error message. 
2010-02-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (_i386_insn): Add err_msg.
	(operand_size_match): Set err_msg on failure.
	(operand_type_match): Likewise.
	(operand_type_register_match): Likewise.
	(VEX_check_operands): Likewise.
	(match_template): Likewise.  Use i.err_msg with as_bad.
 2010-02-25 17:59:52 +00:00
H.J. Lu
24981e7b95 Reformat build_modrm_byte. 
2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Reformat.
 2010-02-11 14:02:50 +00:00
H.J. Lu
c75ef631bd Update copyright. 
gas/

2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c: Update copyright.

opcodes/

2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c: Update copyright.
	* i386-gen.c: Likewise.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.
 2010-02-11 13:41:19 +00:00
Sebastian Pop
a683cc34e4 2010-02-10 Quentin Neill <quentin.neill@amd.com> 
Sebastian Pop  <sebastian.pop@amd.com>

gas:
        * config/tc-i386.c (vec_imm4) New operand type.
        (fits_in_imm4): New.
        (VEX_check_operands): New.
        (check_reverse): Call VEX_check_operands.
        (build_modrm_byte): Reintroduce code for 5
        operand insns.  Fix whitespace.

gas/testsuite:
        * gas/i386/x86-64-xop.d: Add vpermil2p[sd] tests.
        * gas/i386/x86-64-xop.s: Likewise.
        * gas/i386/xop.d: Likewise.
        * gas/i386/xop.s: Likewise.

opcodes:
        * i386-dis.c (OP_EX_VexImmW): Reintroduced
        function to handle 5th imm8 operand.
        (PREFIX_VEX_3A48): Added.
        (PREFIX_VEX_3A49): Added.
        (VEX_W_3A48_P_2): Added.
        (VEX_W_3A49_P_2): Added.
        (prefix table): Added entries for PREFIX_VEX_3A48
        and PREFIX_VEX_3A49.
        (vex table): Added entries for VEX_W_3A48_P_2 and
        and VEX_W_3A49_P_2.
        * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
        for Vec_Imm4 operands.
        * i386-opc.h (enum): Added Vec_Imm4.
        (i386_operand_type): Added vec_imm4.
        * i386-opc.tbl: Add entries for vpermilp[ds].
        * i386-init.h: Regenerated.
        * i386-tbl.h: Regenerated.
 2010-02-11 05:06:14 +00:00
Sebastian Pop
68339fdf88 2010-02-03 Quentin Neill <quentin.neill@amd.com> 
gas/
	* config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
	(i386_align_code): Rename  PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
	* config/tc-i386.h (processor_type): Same.
	* doc/c-i386.texi: Change amdfam15 to bdver1.

opcodes/
	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	to CPU_BDVER1_FLAGS
	* i386-init.h: Regenerated.

testsuite/
	* gas/i386/i386.exp: Rename amdfam15 test cases to bdver1.
	* gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to
	gas/i386/x86-64-nops-1-bdver1.d.
	* gas/i386/nops-1-amdfam15.d: Renamed test case to
	gas/i386/nops-1-bdver1.d.
 2010-02-03 20:36:14 +00:00
H.J. Lu
539f890d01 Allow VL=1 on AVX scalar instructions. 
gas/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (avxscalar): New.
	(OPTION_MAVXSCALAR): Likewise.
	(build_vex_prefix): Select vector_length for scalar instructions
	based on avxscalar.
	(md_longopts): Add OPTION_MAVXSCALAR.
	(md_parse_option): Handle OPTION_MAVXSCALAR.
	(md_show_usage): Add -mavxscalar=.

	* doc/c-i386.texi: Document -mavxscalar=.

gas/testsuite/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/avx-scalar-intel.d: New.
	* gas/i386/avx-scalar.d: Likewise.
	* gas/i386/avx-scalar.s: Likewise.
	* gas/i386/x86-64-avx-scalar-intel.d: Likewise.
	* gas/i386/x86-64-avx-scalar.d: Likewise.
	* gas/i386/x86-64-avx-scalar.s: Likewise.

	* gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel,
	x86-64-avx-scalar and x86-64-avx-scalar-intel.

opcodes/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (XMScalar): New.
	(EXdScalar): Likewise.
	(EXqScalar): Likewise.
	(EXqScalarS): Likewise.
	(VexScalar): Likewise.
	(EXdVexScalarS): Likewise.
	(EXqVexScalarS): Likewise.
	(XMVexScalar): Likewise.
	(scalar_mode): Likewise.
	(d_scalar_mode): Likewise.
	(d_scalar_swap_mode): Likewise.
	(q_scalar_mode): Likewise.
	(q_scalar_swap_mode): Likewise.
	(vex_scalar_mode): Likewise.
	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	q_scalar_mode, q_scalar_swap_mode.
	(OP_XMM): Handle scalar_mode.
	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	and q_scalar_swap_mode.
	(OP_VEX): Handle vex_scalar_mode.
 2010-01-27 14:34:40 +00:00
H.J. Lu
80de6e001d Set the first 3byte VEX prefix individually. 
2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
	0xc4 individually.
 2010-01-24 15:44:05 +00:00
Sebastian Pop
a6461c0251 2010-01-15 Sebastian Pop <sebastian.pop@amd.com> 
gas/
	* config/tc-i386.c (md_assemble): Before accessing the IMM field
	check that it's not an XOP insn.

gas/testsuite/
	* gas/i386/x86-64-xop.d: Add missing patterns.
	* gas/i386/x86-64-xop.s: Same.
	* gas/i386/xop.d: Same.
	* gas/i386/xop.s: Same.

opcodes/
	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	* i386-tbl.h: Regenerated.
 2010-01-15 21:24:13 +00:00
Sebastian Pop
69dd98654a 2010-01-06 Quentin Neill <quentin.neill@amd.com> 
gas/
       * config/tc-i386.c (cpu_arch): Add amdfam15.
         (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
       * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
       * doc/c-i386.texi: Add amdfam15.

opcodes/
       * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
       * i386-init.h: Regenerated.

testsuite/
       * gas/i386/i386.exp: Add new amdfam15 test cases.
       * gas/i386/nops-1-amdfam15.d: New.
 2010-01-06 22:52:47 +00:00
H.J. Lu
2426c15ff8 Replace VexNDS, VexNDD and VexLWP with VexVVVV. 
gas/

2009-12-19  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_operands): Check vexvvvv instead
	of vexnds and vexndd.
	(build_modrm_byte): Check vexvvvv instead of vexnds, vexndd
	and vexlwp.

opcodes/

2009-12-19  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove VexNDS, VexNDD and
	VexLWP.  Add VexVVVV.

	* i386-opc.h (VexNDS): Removed.
	(VexNDD): Likewise.
	(VexLWP): Likewise.
	(VEXXDS): New.
	(VEXNDD): Likewise.
	(VEXLWP): Likewise.
	(VexVVVV): Likewise.
	(i386_opcode_modifier): Remove vexnds, vexndd and vexlwp.
	Add vexvvvv.

	* i386-opc.tbl: Replace VexNDS with VexVVVV=1, VexNDD with
	VexVVVV=2 and VexLWP with VexVVVV=3.
	* i386-tbl.h: Regenerated.
 2009-12-19 18:36:27 +00:00
H.J. Lu
2eb952a4d9 Remove ByteOkIntel. 
gas/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Set i.suffix to 0 in
	Intel syntax if size is ignored and b/l/w suffixes are
	illegal.
	(check_byte_reg): Remove byteokintel check.

opcodes/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove ByteOkIntel.

	* i386-opc.h (ByteOkIntel): Removed.
	(i386_opcode_modifier): Remove byteokintel.

	* i386-opc.tbl: Remove ByteOkIntel.
	* i386-tbl.h: Regenerated.
 2009-12-16 20:08:32 +00:00
H.J. Lu
7f399153c6 Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode. 
gas/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Replace vex0f, vex0f38,
	vex0f3a, xop08, xop09 and xop0a with vexopcode.

opcodes/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
	Vex0F3A, XOP08, XOP09 and XOP0A.  Add VexOpcode.

	* i386-opc.h (Vex0F): Removed.
	(Vex0F38): Likewise.
	(Vex0F3A): Likewise.
	(VexOpcode): New.
	(VEX0F): Likewise.
	(VEX0F38): Likewise.
	(VEX0F3A): Likewise.
	(XOP08): Defined as a macro.
	(XOP09): Likewise.
	(XOP0A): Likewise.
	(i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
	xop09 and xop0a.  Add vexopcode.

	* i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
	VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
	XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
	* i386-tbl.h: Regenerated.
 2009-12-16 15:43:16 +00:00
H.J. Lu
8c43a48b28 Replace VEX2SOURCES with XOP2SOURCES. 
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Check XOP2SOURCES
	instead VEX2SOURCES.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEX2SOURCES): Renamed to ...
	(XOP2SOURCES): This.
 2009-12-16 05:18:11 +00:00
H.J. Lu
8cd7925b45 Replace Vex2Sources and Vex3Sources with VexSources. 
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_operands): Check vexsources
	instead of vex3sources.
	(build_modrm_byte): Check vexsources instead of vex2sources
	and vex3sources.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove Vex3Sources and
	Vex2Sources.  Add VexSources.

	* i386-opc.h ()Vex2Sources: Removed.
	(Vex3Sources): Likewise.
	(VEX2SOURCES): New.
	(VEX3SOURCES): Likewise.
	(VexSources): Likewise.
	(i386_opcode_modifier): Remove vex2sources and vex3sources.
	Add vexsources.

	* i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
	Vex3Sourceswith VexSources=2.
	* i386-tbl.h: Regenerated.
 2009-12-16 04:00:35 +00:00
H.J. Lu
1ef99a7be9 Remove VexW0 and VexW1. Add VexW. 
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1
	with vexw.
	(build_modrm_byte): Likewise.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1.  Add
	VexW.

	* i386-opc.h (VexW0): Removed.
	(VexW1): Likewise.
	(VEXW0): New.
	(VEXW1): Likewise.
	(VexW): Likewise.
	(i386_opcode_modifier): Remove vexw0 and vexw1.  Add vexw.

	* i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
	Vex=2.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2009-12-16 02:10:45 +00:00
H.J. Lu
e3c58833bf Define VEX128 and VEX256. 
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Use VEX256.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEX128): New.
	(VEX256): Likewise.
 2009-12-15 16:36:59 +00:00
Nick Clifton
91d6fa6a03 Add -Wshadow to the gcc command line options used when compiling the binutils. 
Fix up all warnings generated by the addition of this switch.
 2009-12-11 13:42:17 +00:00
H.J. Lu
8a2c8fef19 2009-12-09 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (arch_entry): Add len and skip.
	(cpu_arch): Use STRING_COMMA_LEN.
	(MESSAGE_TEMPLATE): New.
	(show_arch): Likewise.
	(md_show_usage): Use show_arch.
 2009-12-10 02:51:39 +00:00
Sebastian Pop
f0ae4a24b0 2009-11-18 Sebastian Pop <sebastian.pop@amd.com> 
gas/
	* config/tc-i386.c (cpu_arch): Remove cvt16.
	(md_show_usage): Same.
	* doc/c-i386.texi: Same.

	gas/testsuite/
	* gas/i386/cvt16.d: Removed.
	* gas/i386/cvt16.s: Removed.
	* gas/i386/x86-64-cvt16.d: Removed.
	* gas/i386/x86-64-cvt16.s: Removed.
	* gas/i386/i386.exp: Remove cvt16 and x86-64-cvt16 tests.

	opcodes/
	* i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
	(VEX_LEN_XOP_08_A1): Removed.
	(xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
	VEX_LEN_XOP_08_A1.
	(vex_len_table): Same.
	* i386-gen.c (CPU_CVT16_FLAGS): Removed.
	(cpu_flags): Remove field for CpuCVT16.
	* i386-opc.h (CpuCVT16): Removed.
	(i386_cpu_flags): Remove bitfield cpucvt16.
	(i386-opc.tbl): Remove CVT16 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.
 2009-11-18 20:28:59 +00:00
Sebastian Pop
5dd85c9970 2009-11-17 Sebastian Pop <sebastian.pop@amd.com> 
Quentin Neill  <quentin.neill@amd.com>

	gas/
	* config/tc-i386.c (cpu_arch): Added .xop and .cvt16.
	(build_vex_prefix): Handle xop08.
	(md_assemble): Don't special case the constant 3 for insns using MODRM.
	(build_modrm_byte): Handle vex2sources.
	(md_show_usage): Add xop and cvt16.
	* doc/c-i386.texi: Document fma4, xop, and cvt16.

	gas/testsuite/
	* gas/i386/i386.exp: Run xop and cvt16 in 32-bit mode.
	Run x86-64-xop and x86-64-cvt16 in 64-bit mode.
	* gas/i386/lwp.d: Update name of the testcase.
	* gas/i386/x86-64-xop.d: New.
	* gas/i386/x86-64-xop.s: New.
	* gas/i386/xop.d: New.
	* gas/i386/xop.s: New.
	* gas/i386/cvt16.d: New.
	* gas/i386/cvt16.s: New.

	opcodes/
	* i386-dis.c (OP_Vex_2src_1): New.
	(OP_Vex_2src_2): New.
	(Vex_2src_1): New.
	(Vex_2src_2): New.
	(XOP_08): Added.
	(VEX_LEN_XOP_08_A0): Added.
	(VEX_LEN_XOP_08_A1): Added.
	(VEX_LEN_XOP_09_80): Added.
	(VEX_LEN_XOP_09_81): Added.
	(xop_table): Added an entry for XOP_08.  Handle xop instructions.
	(vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
	VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
	(get_valid_dis386): Handle XOP_08.
	(OP_Vex_2src): New.
	* i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
	(cpu_flags): Add CpuXOP and CpuCVT16.
	(opcode_modifiers): Add XOP08, Vex2Sources.
	* i386-opc.h (CpuXOP): Added.
	(CpuCVT16): Added.
	(i386_cpu_flags): Add cpuxop and cpucvt16.
	(XOP08): Added.
	(Vex2Sources): Added.
	(i386_opcode_modifier): Add xop08, vex2sources.
	* i386-opc.tbl: Add entries for XOP and CVT16 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.
 2009-11-18 04:04:17 +00:00
H.J. Lu
c1ba026631 Check destination operand for lockable instructions. 
gas/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Check destination operand
	for lockable instructions.

gas/testsuite/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/lock-1-intel.d: Updated.
	* gas/i386/lock-1.d: Likewise.
	* gas/i386/lock-1.s: Likewise.
	* gas/i386/lockbad-1.l: Likewise.
	* gas/i386/lockbad-1.s: Likewise.
	* gas/i386/x86-64-lock-1-intel.d: Likewise.
	* gas/i386/x86-64-lock-1.d: Likewise.
	* gas/i386/x86-64-lock-1.s: Likewise.
	* gas/i386/x86-64-lockbad-1.l: Likewise.
	* gas/i386/x86-64-lockbad-1.s: Likewise.
 2009-11-14 06:04:34 +00:00
H.J. Lu
4473e00469 2009-11-13 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (_i386_insn): Don't use bit field on
	swap_operand.
 2009-11-14 01:46:28 +00:00
H.J. Lu
c32fa91d70 gas/ 
2009-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (LOCKREP_PREFIX): Removed.
	(REP_PREFIX): New.
	(LOCK_PREFIX): Likewise.
	(PREFIX_GROUP): Likewise.
	(REX_PREFIX): Updated.
	(MAX_PREFIXES): Likewise.
	(add_prefix): Updated.  Return enum PREFIX_GROUP.
	(md_assemble): Check for lock without a lockable instruction.
	(parse_insn): Updated.
	(output_insn): Likewise.

gas/testsuite/

2009-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run lock-1, lock-1-intel, lockbad-1,
	x86-64-lock-1, x86-64-lock-1-intel and x86-64-lockbad-1.

	* gas/i386/lock-1-intel.d: New.
	* gas/i386/lock-1.d: Likewise.
	* gas/i386/lock-1.s: Likewise.
	* gas/i386/lockbad-1.l: Likewise.
	* gas/i386/lockbad-1.s: Likewise.
	* gas/i386/x86-64-lock-1-intel.d: Likewise.
	* gas/i386/x86-64-lock-1.d: Likewise.
	* gas/i386/x86-64-lock-1.s: Likewise.
	* gas/i386/x86-64-lockbad-1.l: Likewise.
	* gas/i386/x86-64-lockbad-1.s: Likewise.

opcodes/

2009-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IsLockable.

	* i386-opc.h (IsLockable): New.
	(i386_opcode_modifier): Add islockable.

	* i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
	bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
	xor, xadd and xchg.
	* i386-tbl.h: Regenerated.
 2009-11-12 18:57:14 +00:00
H.J. Lu
1b9f0c97ad 2009-11-11 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (build_modrm_byte): Don't set register
	operand twice.
 2009-11-12 02:21:46 +00:00
Sebastian Pop
f88c9eb030 2009-11-05 Sebastian Pop <sebastian.pop@amd.com> 
Quentin Neill  <quentin.neill@amd.com>

	* gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS.
	(build_vex_prefix): Handle xop09 and xop0a.
	(build_modrm_byte): Handle vexlwp.
	(md_show_usage): Add lwp.
	* gas/doc/c-i386.texi (i386-LWP): New section.

	* gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp in 64-bit mode,
	run lwp in 32-bit mode.
	* gas/testsuite/gas/i386/x86-64-lwp.d: New.
	* gas/testsuite/gas/i386/x86-64-lwp.s: New.
	* gas/testsuite/gas/i386/lwp.d: New.
	* gas/testsuite/gas/i386/lwp.s: New.

	* opcodes/i386-dis.c (OP_LWPCB_E): New.
	(OP_LWP_E): New.
	(OP_LWP_I): New.
	(USE_XOP_8F_TABLE): New.
	(XOP_8F_TABLE): New.
	(REG_XOP_LWPCB): New.
	(REG_XOP_LWP): New.
	(XOP_09): New.
	(XOP_0A): New.
	(reg_table): Redirect REG_8F to XOP_8F_TABLE.
	Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
	(xop_table): New.
	(get_valid_dis386): Handle USE_XOP_8F_TABLE.
	Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
	to access to the vex_table.
	(OP_LWPCB_E): New.
	(OP_LWP_E): New.
	(OP_LWP_I): New.
	* opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
	(cpu_flags): Add CpuLWP.
	(opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
	* opcodes/i386-opc.h (CpuLWP): New.
	(i386_cpu_flags): Add bit cpulwp.
	(VexLWP): New.
	(XOP09): New.
	(XOP0A): New.
	(i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
	* opcodes/i386-opc.tbl (llwpcb): Added.
	(lwpval): Added.
	(lwpins): Added.
 2009-11-05 23:40:05 +00:00
H.J. Lu
206c2556c2 gas/ 
2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>

	* config/tc-i386.c (build_modrm_byte): Do not swap REG and
	NDS operands for FMA4.

gas/testsuite/

2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>

	* gas/i386/fma4.d: Updated patterns.
	* gas/i386/x86-64-fma4.d: Same.

opcodes/

2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>

	* i386-dis.c (OP_VEX_FMA): Removed.
	(VexFMA): Removed.
	(Vex128FMA): Removed.
	(prefix_table): First source operand of FMA4 insns is decoded
	with Vex not with VexFMA.
	(OP_EX_VexW): Second source operand is decoded with get_vex_imm8
	when vex.w is set.  Third source operand is decoded with
	get_vex_imm8 when vex.w is cleared.
	(OP_VEX_FMA): Removed.
 2009-10-29 22:22:59 +00:00
H.J. Lu
4c2c651631 2009-10-13 H.J. Lu <hongjiu.lu@intel.com> 
PR binutils/10766
	* config/tc-i386.c (build_modrm_byte): Declare exp earlier.
 2009-10-13 16:42:40 +00:00
H.J. Lu
313c53d19e gas/ 
2009-10-13  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10740
	* config/tc-i386-intel.c (i386_intel_operand): Handle call
	and jump with 2 immediate operands.

	* config/tc-i386.c (i386_finalize_immediate): Don't generate
	error message if operand string is NULL.

gas/testsuite/

2009-10-13  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10740
	* gas/i386/jump.s: Add new tests.
	* gas/i386/jump16.s: Likewise.

	* gas/i386/jump.d: Updated.
	* gas/i386/jump16.d: Likewise.
 2009-10-13 16:23:25 +00:00
H.J. Lu
9f32dd5b5a 2009-10-01 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (x86_cons): Reformat.
 2009-10-01 14:31:43 +00:00
H.J. Lu
2bf05e5730 gas/ 
2009-09-24  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Check vex == 2 instead
	of vex256.

opcodes/

2009-09-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove Vex256.
	(set_bitfield): Handle XXX=V.

	* i386-opc.h (Vex): Update comments.
	(Vex256): Removed.
	(VexNDS): Updated.
	(i386_opcode_modifier): Change vex to 2 bits.  Remove vex256.

	* i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
	* i386-tbl.h: Regenerated.
 2009-09-24 16:37:09 +00:00
H.J. Lu
76ba998616 2009-09-21 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c: Remove white spaces.
 2009-09-21 21:50:19 +00:00
H.J. Lu
fa289fb8df 2009-09-15 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (offset_in_range): Sign extend offset only
	if BFD64 is defined.
 2009-09-15 18:51:53 +00:00
H.J. Lu
9de868bf63 2009-09-15 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (offset_in_range): Sign extend offset only
	for 32bit address mode.
 2009-09-15 17:47:26 +00:00
H.J. Lu
0e1147d951 gas/ 
2009-09-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10636
	* config/tc-i386.c (optimize_disp): Set disp32 for 64bit only
	if there is an ADDR_PREFIX.
	(i386_finalize_displacement): Repor error if signed 32bit
	displacement is out of range.

gas/testsuite/

2009-09-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10636
	* gas/i386/disp.d: New.
	* gas/i386/disp.s: Likewise.
	* gas/i386/x86-64-disp.d: Likewise.
	* gas/i386/x86-64-disp.s: Likewise.

	* gas/i386/i386.exp: Run disp and x86-64-disp.

	* gas/i386/x86-64-addr32.s: Add high 32bit displacement tests.

	* gas/i386/x86-64-addr32.d: Updated.
	* gas/i386/x86-64-addr32-intel.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.
	* gas/i386/x86-64-prescott.d: Likewise.

	* gas/i386/x86-64-inval.s: Add invalid displacement tests.

	* gas/i386/x86-64-prescott.s: Replace 0x90909090 displacement
	with 0x909090.
 2009-09-14 13:57:45 +00:00
Nick Clifton
1e9cc1c27b * po/bfd.pot: Updated by the Translation project. 
* po/binutils.pot: Updated by the Translation project.
        * po/gold.pot: Updated by the Translation project.
        * po/gold.pot: Updated by the Translation project.
        * po/gprof.pot: Updated by the Translation project.
        * po/sv.po: Updated Swedish translation.
        * po/ld.pot: Updated by the Translation project.
        * po/fi.po: Updated Finnish translation.
        * po/ld.pot: Updated by the Translation project.
        * po/fi.po: Updated Finnish translation.

        Updated sources to compile cleanly with -Wc++-compat:
        * basic_blocks.c: Add casts.
        * cg_dfn.c: Add cast.
        * corefile.c: Add casts.
        * gmon_io.c: Add casts.
        * hist.c: Add cast.
        * source.c: Add cast.
        * sym_ids.c (struct match): Moved to top level.

        Updated soruces in ld/* to compile cleanly with -Wc++-compat:
        * ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
        * ldcref.c: Add casts.
        * ldctor.c: Add casts.
        * ldexp.c
        * ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
        * ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
        * ldlang.h (enum statement_enum): Move to top level.
        * ldmain.c: Add casts.
        * ldwrite.c: Add casts.
        * lexsup.c: Add casts. (enum control_enum): Move to top level.
        * mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.

        Updated sources to compile cleanly with -Wc++-compat:
        * basic_blocks.c: Add casts.
        * cg_dfn.c: Add cast.
        * corefile.c: Add casts.
        * gmon_io.c: Add casts.
        * hist.c: Add cast.
        * source.c: Add cast.
        * sym_ids.c (struct match): Moved to top level.

        * as.c (main): Call dwarf2_init.
        * config/obj-elf.c (struct group_list): New field.
        (build_group_lists): Use hash lookup.
        (free_section_idx): New function.
        (elf_frob_file): Adjust.
        * dwarf2dbg.c (all_segs_hash, last_seg_ptr): New variables.
        (get_line_subseg): Adjust.
        (dwarf2_init): New function.
        * dwarf2dbg.h (dwarf2_init): New declaration.
 2009-09-11 15:27:38 +00:00
Alan Modra
9384f2ffd0 * config/tc-i386.c (i386_target_format): Avoid duplicate case label. 2009-09-09 09:31:16 +00:00
Nick Clifton
d3ce72d070 Updated sources to avoid using the identifier name "new", which is a 
keyword in c++.

        * bfd/aoutx.h (NAME (aout, make_empty_symbol)): Rename variable
        new to new_symbol.
        * bfd/coffgen.c (coff_make_empty_symbol)
        (coff_bfd_make_debug_symbol): Rename variable new to new_symbol.
        * bfd/cpu-ia64-opc.c (ext_reg, ins_imms_scaled): Rename variable
        new to new_insn.
        * bfd/doc/chew.c (newentry, add_intrinsic): Rename variable new to
        new_d.
        * bfd/ecoff.c (_bfd_ecoff_make_empty_symbol): Rename variable new
        to new_symbol.
        * bfd/elf32-m68k.c (elf_m68k_get_got_entry_type): Rename argument
        new to new_reloc.
        * bfd/hash.c (bfd_hash_lookup): Rename variable new to new_string.
        * bfd/ieee.c (ieee_make_empty_symbol): Rename variable new to
        new_symbol.
        * bfd/linker.c (bfd_new_link_order): Rename variable new to
        new_lo.
        * bfd/mach-o.c (bfd_mach_o_sizeof_headers): Rename variable new to
        symbol.
        * bfd/oasys.c (oasys_make_empty_symbol): Rename variable new to
        new_symbol_type.
        * bfd/pdp11.c (NAME (aout, make_empty_symbol)): Rename variable
        new to new_symbol_type.
        * bfd/plugin.c (bfd_plugin_make_empty_symbol): Rename variable new
        to new_symbol.
        * bfd/rs6000-core.c (CoreHdr, VmInfo): Rename union member new to
        new_dump.
        (read_hdr, rs6000coff_core_p)
        (rs6000coff_core_file_matches_executable_p)
        (rs6000coff_core_file_failing_command)
        (rs6000coff_core_file_failing_signal): Updated function to use new
        union member name.
        * bfd/som.c (som_make_empty_symbol): Rename variable new to
        new_symbol_type.
        * bfd/syms.c (_bfd_generic_make_empty_symbol): Rename variable new
        to new_symbol.
        * bfd/tekhex.c (first_phase, tekhex_make_empty_symbol): Rename
        variable new to new_symbol.
        * binutils/nlmconv.c (main): Rename variable new to new_name.
        * gas/config/tc-arm.c (insert_reg_alias): Rename variable new to
        new_reg.
        * gas/config/tc-dlx.c (parse_operand): Rename variable new to
        new_pos.
        * gas/config/tc-ia64.c (ia64_gen_real_reloc_type): Rename variable
        new to newr.
        * gas/config/tc-mcore.c (parse_exp, parse_imm): Rename variable
        new to new_pointer.
        * gas/config/tc-microblaze.c (parse_exp, parse_imm, check_got):
        Change name from new to new_pointer.
        * gas/config/tc-or32.c (parse_operand): Rename variable new to
        new_pointer.
        * gas/config/tc-pdp11.c (md_assemble): Rename variable new to
        new_pointer.
        * gas/config/tc-pj.c (alias): Change argument new to new_name.
        * gas/config/tc-score.c (s3_build_score_ops_hsh): Rename variable
        new to new_opcode. (s3_build_dependency_insn_hsh) Rename variable
        new to new_i2n. (s3_convert): Rename variables old and new to
        r_old and r_new.
        * gas/config/tc-score7.c (s7_build_score_ops_hsh): Rename variable
        new to new_opcode. (s7_build_dependency_insn_hsh): Rename variable
        new to new_i2d. (s7_b32_relax_to_b16, s7_convert_frag): Rename
        variables old and new to r_old and r_new.
        * gas/config/tc-sh.c (parse_exp): Rename variable new to
        new_pointer.
        * gas/config/tc-sh64.c (shmedia_parse_exp): Rename variable new to
        new_pointer.
        * gas/config/tc-tic4x.c (tic4x_operand_parse): Rename variable new
        to new_pointer.
        * gas/config/tc-z8k.c (parse_exp): Rename variable new to
        new_pointer.
        * gas/listing.c (listing_newline): Rename variable new to new_i.
        * ld/ldexp.c (exp_intop, exp_bigintop, exp_relop, exp_binop)
        (exp_trinop, exp_unop, exp_nameop, exp_assop): Rename variable new
        to new_e.
        * ld/ldfile.c (ldfile_add_library_path): Rename variable new to
        new_dirs. (ldfile_add_arch): Rename variable new to new_arch.
        * ld/ldlang.c (new_statement, lang_final, lang_add_wild)
        (lang_target, lang_add_fill, lang_add_data, lang_add_assignment)
        (lang_add_insert): Rename variable new to new_stmt. (new_afile):
        Added missing cast. (lang_memory_region_lookup): Rename variable
        new to new_region. (init_os): Rename variable new to
        new_userdata. (lang_add_section): Rename variable new to
        new_section. (ldlang_add_undef): Rename variable new to
        new_undef. (realsymbol): Rename variable new to new_name.
        * opcodes/z8kgen.c (internal, gas): Rename variable new to new_op.

        Updated sources to avoid using the identifier name "template",
        which is a keyword in c++.

        * bfd/elf32-arm.c (struct stub_def): Rename member template to
        template_sequence. (arm_build_one_stub,
        find_stub_size_and_template, arm_size_one_stub, arm_map_one_stub):
        Rename variable template to template_sequence.
        * bfd/elfxx-ia64.c (elfNN_ia64_relax_br, elfNN_ia64_relax_brl):
        Rename variable template to template_val.
        * gas/config/tc-arm.c (struct asm_cond, struct asm_psr, struct
        asm_barrier_opt): Change member template to
        template_name. (md_begin): Update code to reflect new member
        names.
        * gas/config/tc-i386.c (struct templates, struct _i386_insn)
        (match_template, cpu_flags_match, match_reg_size, match_mem_size)
        (operand_size_match, md_begin, i386_print_statistics, pi)
        (build_vex_prefix, md_assemble, parse_insn, optimize_imm)
        (optimize_disp): Updated code to use new names. (parse_insn):
        Added casts.
        * gas/config/tc-ia64.c (dot_template, emit_one_bundle): Updated
        code to use new names.
        * gas/config/tc-score.c (struct s3_asm_opcode): Renamed member
        template to template_name. (s3_parse_16_32_inst, s3_parse_48_inst,
        s3_do_macro_ldst_label, s3_build_score_ops_hsh): Update code to
        use new names.
        * gas/config/tc-score7.c (struct s7_asm_opcode): Renamed member
        template to template_name. (s7_parse_16_32_inst,
        s7_do_macro_ldst_label, s7_build_score_ops_hsh): Update code to
        use new names.
        * gas/config/tc-tic30.c (md_begin, struct tic30_insn)
        (md_assemble): Update code to use new names.
        * gas/config/tc-tic54x.c (struct _tic54x_insn, md_begin)
        (optimize_insn, tic54x_parse_insn, next_line_shows_parallel):
        Update code to use new names.
        * include/opcode/tic30.h (template): Rename type template to
        insn_template. Updated code to use new name.
        * include/opcode/tic54x.h (template): Rename type template to
        insn_template.
        * opcodes/cris-dis.c (bytes_to_skip): Update code to use new name.
        * opcodes/i386-dis.c (putop): Update code to use new name.
        * opcodes/i386-gen.c (process_i386_opcodes): Update code to use
        new name.
        * opcodes/i386-opc.h (struct template): Rename struct template to
        insn_template. Update code accordingly.
        * opcodes/i386-tbl.h (i386_optab): Update type to use new name.
        * opcodes/ia64-dis.c (print_insn_ia64): Rename variable template
        to template_val.
        * opcodes/tic30-dis.c (struct instruction, get_tic30_instruction):
        Update code to use new name.
        * opcodes/tic54x-dis.c (has_lkaddr, get_insn_size)
        (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
        Update code to use new name.
        * opcodes/tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
        Update type to new name.
 2009-08-29 22:11:02 +00:00
H.J. Lu
3632d14b13 gas/ 
2009-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Use PROCESSOR_L1OM on "l1om".
	(i386_align_code): Handle PROCESSOR_L1OM.
	(check_cpu_arch_compatible): Fix a typo in comments.
	(set_cpu_arch): Check cpu_arch_isa instead of
	cpu_arch_isa_flags.bitfield.cpul1om.
	(i386_mach): Likewise.
	(i386_target_format): Likewise.

	* config/tc-i386.h (processor_type): Add PROCESSOR_L1OM.

gas/testsuite/

2009-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/l1om.d: Check elf64-l1om format.
 2009-08-28 21:42:16 +00:00
Jan Kratochvil
0561d57c86 gas/ 
Fix compilation of i386-*-go32.
	* config/tc-i386.c (i386_target_format <TE_GO32>): New.
	(i386_target_format <OBJ_MAYBE_COFF>): Compile only if !TE_GO32.
	* config/te-go32.h (TARGET_FORMAT): Move the definition ...
	* config/tc-i386.h <!i386_target_format>: ... here.
 2009-08-10 21:32:26 +00:00
Alan Modra
af65af87c0 PR ld/10269 
* symbols.c (S_FORCE_RELOC): True for BSF_GNU_INDIRECT_FUNCTION.
	* config/tc-i386.c: Revert 2009-06-13 change.
	* config/tc-i386.h: Likewise.
 2009-07-29 06:22:13 +00:00
H.J. Lu
8a9036a406 bfd/ 
2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* archures.c (bfd_architecture): Add bfd_arch_l1om.
	(bfd_l1om_arch): New.
	(bfd_archures_list): Add &bfd_l1om_arch.
	* bfd-in2.h: Regenerated.

	* config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if
	bfd_elf64_x86_64_vec is supported.  Add bfd_elf64_l1om_freebsd_vec
	if bfd_elf64_x86_64_freebsd_vec is supported.
	(targ_selvecs): Likewise.

	* configure.in: Support bfd_elf64_l1om_vec and
	bfd_elf64_l1om_freebsd_vec.
	* configure: Regenerated.

	* cpu-l1om.c: New.

	* elf64-x86-64.c (elf64_l1om_elf_object_p): New.
	(bfd_elf64_l1om_vec): Likewise.
	(bfd_elf64_l1om_freebsd_vec): Likewise.

	* Makefile.am (ALL_MACHINES): Add cpu-l1om.lo.
	(ALL_MACHINES_CFILES): Add cpu-l1om.c.
	* Makefile.in: Regenerated.

	* targets.c (bfd_elf64_l1om_vec): New.
	(bfd_elf64_l1om_freebsd_vec): Likewise.
	(_bfd_target_vector): Add bfd_elf64_l1om_vec and
	bfd_elf64_l1om_freebsd_vec.

binutils/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* readelf.c (guess_is_rela): Handle EM_L1OM.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(get_section_type_name): Likewise.
	(get_elf_section_flags): Likewise.
	(get_symbol_index_type): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_32bit_pcrel_reloc): Likewise.
	(is_64bit_abs_reloc): Likewise.
	(is_64bit_pcrel_reloc): Likewise.
	(is_none_reloc): Likewise.

gas/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add l1om.
	(check_cpu_arch_compatible): New.
	(set_cpu_arch): Use it.
	(i386_arch): New.
	(i386_mach): Return bfd_mach_l1om for Intel L1OM.
	(md_show_usage): Display l1om.
	(i386_target_format): Return ELF_TARGET_L1OM_FORMAT if
	cpu_arch_isa_flags.bitfield.cpul1om is set.

	* config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()).
	(i386_arch): New.
	(ELF_TARGET_L1OM_FORMAT): Likewise.

	* doc/c-i386.texi: Document l1om.

gas/testsuite/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/l1om.d: New.
	* gas/i386/l1om-inval.l: Likewise.
	* gas/i386/l1om-inval.s: Likewise.

	* gas/i386/i386.exp: Run l1om-inval and l1om.

include/elf/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* common.h (EM_L1OM): New.

ld/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64
	is supported.  Add elf_l1om_fbsd if elf_x86_64_fbsd is supported.
	(targ_extra_emuls): Likewise.

	* Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and
	eelf_l1om_fbsd.o
	(eelf_l1om.c): New.
	(eelf_l1om_fbsd.c): Likewise.
	* Makefile.in: Regenerated.

	* emulparams/elf_l1om.sh: New.
	* emulparams/elf_l1om_fbsd.sh: Likewise.

ld/testsuite/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/abs-l1om.d: New.
	* ld-x86-64/protected2-l1om.d: Likewise.
	* ld-x86-64/protected3-l1om.d: Likewise.

	* ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and
	protected3-l1om.

opcodes/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in: Handle bfd_l1om_arch.
	* disassemble.c (disassembler): Likewise.

	* configure: Regenerated.

	* i386-dis.c (print_insn): Handle bfd_mach_l1om and
	bfd_mach_l1om_intel_syntax.  Use 8 bytes per line for Intel L1OM.

	* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
	Add CPU_L1OM_FLAGS.
	(cpu_flags): Add CpuL1OM.
	(set_bitfield): Take an argument to set the value field.
	(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
	(process_i386_opcode_modifier): Updated.
	(process_i386_operand_type): Likewise.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

	* i386-opc.h (CpuL1OM): New.
	(CpuXsave): Updated.
	(i386_cpu_flags): Add cpul1om.
 2009-07-25 14:58:58 +00:00
Jan Beulich
309d33736f gas/ 
2009-07-24  Jan Beulich  <jbeulich@novell.com>

	* tc-i386.c (cpu_arch): Add .8087, .287, .387, .no87, .nommx,
	.nosse, and .noavx.
	(cpu_flags_and_not): New.
	(set_cpu_arch): Check whether sub-architecture specified is a
	feature disable.
	(md_parse_option): Likewise.
	(parse_real_register): Don't return floating point register
	when x87 functionality is disabled.
	(md_show_usage): Add new sub-options.
	* doc/c-i386.texi: Update with new command line sub-options.

gas/testsuite/
2009-07-24  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/8087.[ds]: New.
	* gas/i386/287.[ds]: New.
	* gas/i386/387.[ds]: New.
	* gas/i386/no87.[ls]: New.
	* gas/i386/no87-2.[ls]: New.
	* gas/i386/i386.exp: Run new tests.
	* gas/i386/att-regs.s: Also check FPU register access.
	* gas/i386/intel-regs.s: Likewise.
	* gas/i386/att-regs.d: Adjust expectations.
	* gas/i386/intel-regs.d: Likewise.

opcodes/
2009-07-24  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
	frstpm.
	* i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
	(cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
	(set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
	* i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
	Define.
	(union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
	and cpufisttp.
	* i386-opc.tbl: Qualify floating point instructions by their
	respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
	and fsincos to be avilable only on 387. Fix fstsw ax to be
	available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
	and frstpm.
	* i386-init.h, i386-tbl.h: Regenerate.
 2009-07-24 15:41:20 +00:00
H.J. Lu
711eedefee gas/ 
2009-07-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10420
	* config/tc-i386.c (i386_align_code): Tune for 32bit nops in
	64bit.
	(i386_target_format): Set cpu_arch_isa_flags.bitfield.cpulm
	for 64bit.

gas/testsuite/

2009-07-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10420
	* gas/i386/i386.exp: Run x86-64-nops-1-pentium.

	* gas/i386/x86-64-nops-1-pentium.d: New.
 2009-07-21 17:50:21 +00:00
H.J. Lu
bc0844aee7 2009-07-17 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (md_assemble): Update operand types.
	(update_imm): Updated.
	(finalize_imm): Update the first 2 immediate operands only
	for instructions with 2 operands or more.
 2009-07-17 17:54:51 +00:00
H.J. Lu
9afe6eb82f 2009-07-17 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (md_assemble): Check implicit registers
	only for instructions with 3 operands or less.
 2009-07-17 17:08:34 +00:00
H.J. Lu
915bcca52e gas/ 
2009-07-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Only check i.operands for AX.
	(md_estimate_size_before_relax): Don't relax IFUNC symbols.

gas/testsuite/

2009-07-16  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run ifunc and x86-64-ifunc.

	* gas/i386/ifunc.d: New,
	* gas/i386/ifunc.s: Likewise.
	* gas/i386/x86-64-ifunc.d: Likewise.
 2009-07-16 17:37:26 +00:00
Dwarakanath Rajagopal
922d8de8c1 <gas changes> 
2009-07-06  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>

	* config/tc-i386.c (cpu_arch): Add .fma4 and CPU_FMA4_FLAGS.
	(build_modrm_byte): Add support to handle FMA4 instructions.
	(md_show_usage): Add fma4.

<gas/testsuite changes>
2009-07-06  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>

	* gas/i386/i386.exp: Add FMA4 tests.
	* gas/i386/x86-64-fma4.d: Ditto.
	* gas/i386/fma4.d: Ditto.
	* gas/i386/x86-64-fma4.s: Ditto.
	* gas/i386/fma4.s: Ditto.

<opcodes changes>
2009-07-06  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>

	* i386-opc.h (CpuFMA4): Add CpuFMA4.
	(i386_cpu_flags): New.
	* i386-gen.c: Add CPU_FMA4_FLAGS.
	* i386-opc.tbl: Add FMA4 instructions.
	* i386-tbl.h: Regenerate.
	* i386-init.h: Regenerate.
	* i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
	(OP_XMM_VexW): Ditto.
	(OP_EX_VexW): Ditto.
	(VEXI4_Fixup): Ditto.
	(VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
	(PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
	(PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
	(PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
	(PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
	(PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
	(PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
	(PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
	(VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
	(VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
	(VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
	(get_vex_imm8): New. handle FMA4.
	(OP_EX_VexReg): Ditto.
 2009-07-06 19:34:30 +00:00
Tristan Gingold
e57f8c655c 2009-07-02 Tristan Gingold <gingold@adacore.com> 
* Makefile.am (OBJ_FORMATS): Add macho.
	(CPU_OBJ_VALID): Ditto.
	(OBJ_FORMAT_CFILES): Add config/obj-macho.c
	(OBJ_FORMAT_HFILES): Add config/obj-macho.h
	(obj-macho.o): New rule.
	* Makefile.in: Regenerated.
	* configure.tgt (generic_target): Add i386-*-darwin*.
	* config/tc-i386.h: Use i386_target_format for Mach-O.
	* config/tc-i386.c (i386_target_format): Define it for Mach-O.
	(i386_target_format): Add a case for bfd_target_mach_o_flavour.
	* config/obj-macho.h: New file.
	* config/obj-macho.c: New file.
 2009-07-02 08:09:35 +00:00
H.J. Lu
7ab9ffdd43 2009-06-29 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c: Reformat.
 2009-06-29 17:44:37 +00:00
Nick Clifton
9c2799c243 * gas/app, gas/as.c, gas/as.h, gas/atof-generic.c, gas/cgen.c, 
gas/config/atof-ieee.c, gas/config/obj-aout.c,
        gas/config/obj-coff.c, gas/config/obj-ecoff.c,
        gas/config/obj-elf.c, gas/config/obj-som.c, gas/config/tc-alpha.c,
        gas/config/tc-arc.c, gas/config/tc-arm.c, gas/config/tc-cr16.c,
        gas/config/tc-cris.c, gas/config/tc-crx.c, gas/config/tc-d30v.c,
        gas/config/tc-dlx.c, gas/config/tc-hppa.c, gas/config/tc-i370.c,
        gas/config/tc-i386-intel.c, gas/config/tc-i386.c,
        gas/config/tc-i860.c, gas/config/tc-i960.c, gas/config/tc-ia64.c,
        gas/config/tc-iq2000.c, gas/config/tc-m32c.c,
        gas/config/tc-m32r.c, gas/config/tc-m68hc11.c,
        gas/config/tc-m68k.c, gas/config/tc-maxq.c, gas/config/tc-mcore.c,
        gas/config/tc-mep.c, gas/config/tc-mips.c, gas/config/tc-mmix.c,
        gas/config/tc-mn10300.c, gas/config/tc-moxie.c,
        gas/config/tc-ns32k.c, gas/config/tc-pj.c, gas/config/tc-ppc.c,
        gas/config/tc-s390.c, gas/config/tc-score.c,
        gas/config/tc-score7.c, gas/config/tc-sh.c, gas/config/tc-sparc.c,
        gas/config/tc-spu.c, gas/config/tc-tic30.c, gas/config/tc-vax.c,
        gas/config/tc-xtensa.c, gas/config/xtensa-relax.c,
        gas/dw2gencfi.c, gas/dwarf2dbg.c, gas/ehopt.c, gas/expr.c,
        gas/frags.c, gas/input-file.c, gas/read.c, gas/sb.c,
        gas/subsegs.c, gas/symbols.c, gas/write.c: Change the name of the
        gas macro `assert' to `gas_assert'.
 2009-06-22 17:56:02 +00:00
H.J. Lu
c25bc9fc0d bfd/ 
2009-06-13  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/10269
	* elf32-i386.c: Include "objalloc.h" and "hashtab.h".
	(elf_i386_link_hash_table): Add loc_hash_table and
	loc_hash_memory.
	(elf_i386_local_hash): New.
	(elf_i386_local_htab_hash): Likewise.
	(elf_i386_local_htab_eq): Likewise.
	(elf_i386_get_local_sym_hash): Likewise.
	(elf_i386_link_hash_table_free): Likewise.
	(elf_i386_allocate_local_dynrelocs): Likewise.
	(elf_i386_finish_local_dynamic_symbol): Likewise.
	(bfd_elf64_bfd_link_hash_table_free): Likewise.
	(elf_i386_link_hash_table_create): Create loc_hash_table and
	loc_hash_memory.
	(elf_i386_check_relocs): Handle local STT_GNU_IFUNC symbols.
	(elf_i386_size_dynamic_sections): Likewise.
	(elf_i386_relocate_section): Likewise.
	(elf_i386_finish_dynamic_sections): Likewise.
	(elf_i386_finish_dynamic_symbol): Check _DYNAMIC only if sym
	isn't NULL.

	* elf64-x86-64.c: Include "objalloc.h" and "hashtab.h".
	(elf64_x86_64_link_hash_table): Add loc_hash_table and
	loc_hash_memory.
	(elf64_x86_64_local_hash): New.
	(elf64_x86_64_local_htab_hash): Likewise.
	(elf64_x86_64_local_htab_eq): Likewise.
	(elf64_x86_64_get_local_sym_hash): Likewise.
	(elf64_x86_64_link_hash_table_free): Likewise.
	(elf64_x86_64_allocate_local_dynrelocs): Likewise.
	(elf64_x86_64_finish_local_dynamic_symbol): Likewise.
	(bfd_elf64_bfd_link_hash_table_free): Likewise.
	(elf64_x86_64_link_hash_table_create): Create loc_hash_table
	and loc_hash_memory.
	(elf64_x86_64_check_relocs): Handle local STT_GNU_IFUNC
	symbols.
	(elf64_x86_64_size_dynamic_sections): Likewise.
	(elf64_x86_64_relocate_section): Likewise.
	(elf64_x86_64_finish_dynamic_sections): Likewise.
	(elf64_x86_64_finish_dynamic_symbol): Check _DYNAMIC only if
	sym isn't NULL.

gas/

2009-06-13  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/10269
	* config/tc-i386.c (md_apply_fix): Use TC_FORCE_RELOCATION
	instead of generic_force_reloc.

	* config/tc-i386.h (TC_FORCE_RELOCATION): New.

ld/testsuite/

2009-06-13  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/10269
	*: ld-ifunc/ifunc-1-local-x86.d: New.
	*: ld-ifunc/ifunc-1-local-x86.s: Likewise.
	*: ld-ifunc/ifunc-2-local-i386.d: Likewise.
	*: ld-ifunc/ifunc-2-local-i386.s: Likewise.
	*: ld-ifunc/ifunc-2-local-x86-64.d: Likewise.
	*: ld-ifunc/ifunc-2-local-x86-64.s: Likewise.
	*: ld-ifunc/ifunc-4-local-x86.d: Likewise.
	*: ld-ifunc/ifunc-4-local-x86.s: Likewise.
	*: ld-ifunc/ifunc-5-local-i386.s: Likewise.
	*: ld-ifunc/ifunc-5-local-x86-64.s: Likewise.
	*: ld-ifunc/ifunc-5a-local-i386.d: Likewise.
	*: ld-ifunc/ifunc-5a-local-x86-64.d: Likewise.
	*: ld-ifunc/ifunc-5b-local-i386.d: Likewise.
	*: ld-ifunc/ifunc-5b-local-x86-64.d: Likewise.
 2009-06-14 01:39:46 +00:00
Dave Korn
fbeb56a4a5 PR gas/977 
* config/tc-i386.c (md_estimate_size_before_relax):  Don't relax
	branches to weak symbols.
	(md_apply_fix):  Don't convert fixes against weak symbols to
	section-relative offsets, but save addend for later reloc emission.
	(tc_gen_reloc):  When emitting reloc against weak symbol, adjust
	addend to pre-compensate for bfd_install_relocation.
 2009-06-08 16:06:24 +00:00
Dwarakanath Rajagopal
c1e679ec0a <gas changes> 
2009-05-22  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>

	* config/tc-i386.c (process_drex): Delete. Remove SSE5 support.
	(build_modrm_byte): Remove DREX handling support.
	(DREX_*): Delete.
	(drex_byte): Delete.
	(md_assemble): Remove DREX handling support.
	(process_operands): Remove DREX, SSE5 support.
	(i386_insn): Remove DREX.

<gas/testsuite changes>
2009-05-22  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>

	* gas/i386/i386.exp: Remove SSE5 tests.
	* gas/i386/x86-64-sse5.s: Delete. Remove SSE5 tests.
	* gas/i386/x86-64-sse5.d: Ditto.
	* gas/i386/arch-10-1.l: Remove SSE5 tests.
	* gas/i386/arch-10-2.l: Ditto.
	* gas/i386/arch-10-3.l: Ditto.
	* gas/i386/arch-10-4.l: Ditto.
	* gas/i386/arch-10.d: Ditto.
	* gas/i386/arch-10.s: Ditto.
	* gas/i386/arch-4.s: Delete. Remove SSE5 tests.
	* gas/i386/arch-4.d: Ditto.
	* gas/i386/arch-8.s: Ditto.
	* gas/i386/arch-8.d: Ditto.
	* gas/i386/arch-2.s: Remove SSE5 tests.
	* gas/i386/arch-2.d: Remove SSE5 tests.
	* gas/i386/x86-64-arch-2.s: Ditto.

<opcodes changes>
2009-05-22  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>

	* i386-opc.h (Cpusse5): Delete.
	(i386_cpu_flags): Delete.
	* i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
	* i386-opc.tbl: Remove SSE5 instructions.
	* i386-tbl.h: Regenerate.
	* i386-init.h: Regenerate.
	* i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
	(print_drex_arg): Delete.
	(OP_DREX4): Delete.
	(OP_DREX3): Delete.
	(OP_DREX_ICMP): Delete.
	(OP_DREX_FCMP): Delete.
	(DREX_*): Delete.
	(THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
 2009-05-22 15:57:25 +00:00
H.J. Lu
321098a5ad 2009-05-20 Kai Tietz <kai.tietz@onevision.com> 
H.J. Lu  <hongjiu.lu@intel.com>

	* config/obj-coff.h: Include "coff/x86_64.h" for x86 pe-coff.
	(TARGET_FORMAT): Removed for x86 pe-coff.
	(COFF_TARGET_FORMAT): Likewise.

	* config/tc-i386.c (md_longopts): Allow --64 for x86 pe-coff.
	(md_parse_option): Likewise.
	(md_show_usage): Show option --32/--64 for x86 pe-coff.
	(i386_target_format): Use also for x86 pe-coff.

	* config/tc-i386.h (TARGET_FORMAT): Defined as i386_target_format
	for x86 pe-coff.
 2009-05-20 13:48:16 +00:00
Nick Clifton
d8045f234d include/elf 
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * common.h (STT_GNU_IFUNC): Define.

elfcpp
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * (enum STT): Add STT_GNU_IFUNC.

gas
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * config/obj-elf.c (obj_elf_type): Add support for a
        gnu_indirect_function type.
        * config/tc-i386.c (tc_i386_fix_adjustable): Do not adjust fixups
        against indirect function symbols.
        * doc/as.texinfo (.type): Document the support for the
        gnu_indirect_function symbol type.
        * NEWS: Mention the new feature.

gas/testsuite
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * gas/elf/elf.exp: Extend type test to include an ifunc symbol.
        Provide an alternative test for targets which do not support ifunc
        symbols.
        (type.s): Add entry for an ifunc symbol.
        (type.e): Add ifunc entry to expected symbol dump.
        (section2.e-armelf): Add  entry for ifunc symbol.
        (type-noifunc.s): New file.
        (type-noifunc.e): New file.

bfd/
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs
        section pointer.
        (struct elf_obj_data): Add has_ifunc_symbols boolean.
        * elf.c (swap_out_syms): Convert BSF_GNU_INDIRECT_FUNCTION flags
        into a STT_GNU_IFUNC symbol type.
        (_bfd_elf_is_function_type): Accept STT_GNU_IFUNC as a function
        type.
        (_bfd_elf_set_osabi): Set the osasbi field to ELFOSABI_LINUX if
        the binary contains ifunc symbols.
        * elfcode.h (elf_slurp_symbol_table): Translate the STT_GNU_IFUNC
        symbol type into a BSF_GNU_INDIRECT_FUNCTION flag.
        * elf32-i386.c (is_indirect_function): New function.
        (elf_i386_check_relocs): Create an ifunc output section.
        (allocate_dynrelocs): Create dynamic relocs in the ifunc output
        section if necessary.
        (elf_i386_relocate_section): Emit a reloc against an ifunc symbol
        if necessary.
        (elf_i386_add_symbol_hook): New function. Set the
        has_ifunc_symbols field of the elf_obj_data structure if an ifunc
        symbol is encountered.
        (elf_backend_post_process_headers): Define.
        (elf_backend_add_symbol_hook): Define.
        (elf_i386_post_process_headers): Rename to
        elf_i388_fbsd_post_process_headers.
        * elf64-x86_64.c (IS_X86_64_PCREL_TYPE): New macro.
        (is_indirect_function): New function.
        (elf64_x86_64_check_relocs): Create an ifunc output section.
        (allocate_dynrelocs): Create dynamic relocs in the ifunc output
        section if necessary.
        (elf64_x86_64_relocate_section): Emit a reloc against an ifunc
        symbol if necessary.
        (elf_i386_add_symbol_hook): Set the has_ifunc_symbols field of the
        elf_obj_data structure if an ifunc symbol is encountered.
        (elf_backend_post_process_headers): Define.
        * elflink.c (_bfd_elf_adjust_dynamic_symbol): Always create a PLT
        if we have ifunc symbols to handle.
        (get_ifunc_reloc_section_name): New function.  Computes the name
        for an ifunc section.
        (_bfd_elf_make_ifunc_reloc_section): New function.  Creates a
        section to hold ifunc relocs.
        * syms.c (BSF_GNU_INDIRECT_FUNCTION): Define.
        (bfd_print_symbol_vandf): Handle ifunc symbols.
        (bfd_decode_symclass): Likewise.
        * bfd-in2.h: Regenerate.

binutils
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * readelf.c (dump_relocations): Display a relocation against an
        ifunc symbol as if it were a function invocation.
        (get_symbol_type): Handle STT_GNU_IFUNC.

ld
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * NEWS: Mention support for IFUNC symbols.

ld/testsuite
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * ld-ifunc: New directory.
        * ld-ifunc/ifunc.exp: New file: Run the IFUNC tests.
        * ld-ifunc/prog.c: New file.
        * ld-ifunc/lib.c: New file.
 2009-04-30 15:47:13 +00:00
Jan Beulich
ee86248cee gas/ 
2009-04-20  Jan Beulich  <jbeulich@novell.com>

	* Makefile.am: Add explicit dependency of tc-i386.o on
	tc-i386-intel.c.
	* Makefile.in: Likewise.
	* config/tc-i386.c (i386_finalize_immediate): Declare, broken
	out from i386_immediate.
	(i386_immediate): Slightly re-arrange, call
	i386_finalize_immediate.
	(i386_finalize_displacement): Declare, broken out from
	i386_displacement.
	(i386_displacement): Slightly re-arrange, call
	i386_finalize_displacement.
	(i386_intel_simplify, i386_intel_parse_name): Declare.
	(this_operand): Initialize to -1.
	(set_intel_syntax): Set expression rank for O_full_ptr.
	(md_assemble): Set this_operand back to -1 after parsing
	operands.
	(x86_cons): Negate intel_syntax to indicate state. Call
	i386_intel_simplify.
	(md_operand): Convert if to switch. Handle '[' for Intel
	syntax.
	(i386_intel_operand): Delete, including all helper functions
	and data.
	* config/tc-i386-intel.c: New file, all new code.
	* config/tc-i386.h (i386_operator): Declare.
	(md_operator): Define to i386_operator.
	(i386_need_index_operator): Declare.
	(md_need_index_operator): Define to i386_need_index_operator.
	(O_full_ptr): Define.

gas/testsuite/
2009-04-20  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/equ.s: Adjust.
	* gas/i386/equ.d: Remove reference to equ.e.
	* gas/i386/equ.e: Delete.
	* gas/i386/intel-expr.s: New.
	* gas/i386/intel-expr.d: New.
	* gas/i386/i386.exp: Run new test.
	* gas/i386/intel.s: Adjust.
	* gas/i386/intel.e: Remove no longer valid warning messages.
	* gas/i386/intel16.s: Adjust.
	* gas/i386/intel16.d: Remove reference to intel16.e.
	* gas/i386/intel16.e: Delete.
	* gas/i386/intelbad.s: Add more tests.
	* gas/i386/intelbad.l: Adjust.
	* gas/i386/intelok.s: Remove now unneeded equates. Add more
	tests.
	* gas/i386/intelok.d: Remove reference to intelok.e. Adjust.
	* gas/i386/intelok.e: Delete.
	* gas/i386/x86_64.s: Adjust.
	* gas/i386/x86_64.d: Remove reference to x86_64.e.
	* gas/i386/x86_64.e: Delete.
 2009-04-20 06:31:50 +00:00
Jan Beulich
d8a1b51e44 gas/ 
2009-04-15  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (process_operands): Print operands in
	correct order depending on intel_syntax.

gas/testsuite/
2009-04-15  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intel.e: Adjust expectations.
 2009-04-15 13:33:03 +00:00
Alan Modra
0cc9e1d385 PR 10005 
* config/tc-i386.c (reloc): Don't abort on lack of required
	reloc type.
 2009-03-26 02:41:12 +00:00
H.J. Lu
41aacd835d 2009-03-25 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (parse_insn): Use default_arch on unsupported
	arch.
 2009-03-25 19:49:25 +00:00
H.J. Lu
784788d2f7 2009-02-25 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (fits_in_imm4): Removed.
 2009-02-25 18:59:52 +00:00
H.J. Lu
0349dc08b2 2009-02-23 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (type_names): Add OPERAND_TYPE_REGYMM.
	(pt): Replace UINTS_ALL_ZERO with operand_type_all_zero.
 2009-02-23 23:05:21 +00:00
H.J. Lu
c1b80a2afc 2009-02-23 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (type_names): Remove OPERAND_TYPE_VEX_IMM4.
 2009-02-23 22:28:45 +00:00
H.J. Lu
4c664d7bf7 gas/ 
2009-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (vex_imm4): Removed.
	(VEX_check_operands): Likewise.
	(match_template): Updated.

opcodes/

2009-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
	(operand_types): Remove Vex_Imm4.

	* i386-opc.h (Vex_Imm4): Removed.
	(OTMax): Updated.
	(i386_operand_type): Remove vex_imm4.

	* i386-opc.tbl: Remove Vex_Imm4 comments.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2009-02-23 20:41:46 +00:00
H.J. Lu
ce2f5b3ce7 gas/ 
2009-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (January, 2009)
	* config/tc-i386.c (CPU_FLAGS_PCLMUL_MATCH): New.
	(CPU_FLAGS_AVX_MATCH): Updated.
	(CPU_FLAGS_32BIT_MATCH): Likewise.
	(cpu_flags_match): Likewise.

gas/testsuite/

2009-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (January, 2009)
	* gas/i386/arch-avx-1-3.l: New.
	* gas/i386/arch-avx-1-3.s: Likewise.
	* gas/i386/arch-avx-1-4.l: Likewise.
	* gas/i386/arch-avx-1-4.s: Likewise.
	* gas/i386/arch-avx-1-5.l: Likewise.
	* gas/i386/arch-avx-1-5.s: Likewise.
	* gas/i386/arch-avx-1-6.l: Likewise.
	* gas/i386/arch-avx-1-6.s: Likewise.

	* gas/i386/arch-10.s: Add vpclmul instructions.
	* gas/i386/arch-avx-1.s: Likewise.
	* gas/i386/avx.s: Likewise.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/x86-64-avx.s: Likewise.

	* gas/i386/sse2avx.s: Add pclmul instructions.
	* gas/i386/x86-64-sse2avx.s: Likewise.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/arch-avx-1.d: Likewise.
	* gas/i386/arch-avx-1-1.l: Likewise.
	* gas/i386/arch-avx-1-2.l: Likewise.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/sse2avx.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-sse2avx.d: Likewise.

	* gas/i386/i386.exp: Run arch-avx-1-3, arch-avx-1-4,
	arch-avx-1-5 and arch-avx-1-6.

opcodes/

2009-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (January, 2009)
	* i386-dis.c (PREFIX_VEX_3A44): New.
	(VEX_LEN_3A44_P_2): Likewise.
	(PREFIX_VEX_3A48): Updated.
	(VEX_LEN_3A4C_P_2): Likewise.
	(prefix_table): Add PREFIX_VEX_3A44.
	(vex_table): Likewise.
	(vex_len_table): Add VEX_LEN_3A44_P_2.

	* i386-opc.tbl: Add PCLMUL + AVX instructions.
	* i386-tbl.h: Regenerated.
 2009-02-04 16:03:31 +00:00
Nick Clifton
01e1a5bc12 * include/elf/ia64.h (SHT_IA_64_VMS_DISPLAY_NAME_INFO, 
EF_IA_64_ARCHVER_1): New macros. Minor reformatting.

        * bfd/Makefile.am (BFD32_BACKENDS): Add new object vmsutil.lo
        (BFD32_BACKENDS_CFILES): Add new file vmsutil.c
        (vmsutil.lo): Add dependency rule
        * bfd/Makefile.in: Regenerate
        * bfd/config.bfd (ia64*-*-*vms*): Add case.
        * bfd/configure.in (bfd_elf64_ia64_vms_vec): Add case.
        * bfd/configure: Regenerate
        * bfd/vmsutil.[ch]: New files
        * bfd/elf-bfd.h (struct bfd_elf_special_section): Change type of
        attr to bfd_vma.
        * bfd/elfxx-ia64.c (elfNN_vms_post_process_headers,
        elfNN_vms_section_processing, elfNN_vms_final_write_processing,
        elfNN_vms_close_and_cleanup, elfNN_vms_section_from_shdr,
        elfNN_vms_object_p): New functions
        * bfd/targets.c (bfd_elf64_ia64_vms_vec): New target.

        * gas/configure.tgt(ia64-*-*vms*): New target.
        * gas/dwarf2dbg.h (dwarf2_loc_mark_labels): Make extern.
        * gas/tc.h (md_number_to_chars): Declare iff undefined.
        * gas/config/obj-elf.c (obj_elf_change_section): Change type of
        arg attr to bfd_vma.
        (obj_elf_parse_section_letters): Return a bfd_vma. Change type of
        variables attr, md_attr to bfd_vma.
        (obj_elf_section_word): Likewise.
        (obj_elf_section): Change type of variable attr to bfd_vma
        * gas/config/obj-elf.h (obj_elf_change_section): Change type of
        arg attr to bfd_vma
        * gas/config/tc-ia64.c (bfdver.h,time.h): Include.
        (ia64_elf_section_letter): Now returns a bfd_vma.
        Handle VMS specific attributes.
        (ia64_elf_section_flags): Arg attr now a bfd_vma.
        (ia64_init): Don't turn on dependency checking for VMS.
        (ia64_target_format): Check for VMS flag bit.
        (do_alias): Hande decc$ functions.
        (get_vms_time): New function.
        (ia64_vms_note): New function.
        * gas/config/tc-ia64.h (ia64_elf_section_letter): Now returns a bfd_vma.
        (ia64_elf_section_flags): Arg attr now a bfd_vma.
        (tc_init_after_args): Define for VMS.
        * gas/config/tc-alpha.c (alpha_elf_section_letter): Return a bfd_vma.
        (alpha_elf_section_flags): Change type of arg attr to bfd_vma.
        * gas/config/tc-alpha.h: Likewise.
        * gas/config/tc-i386.c (x86_64_section_letter): Return a bfd_vma.
        (x86_64_section_word): Return a bfd_vma.
        * gas/config/tc-i386.h: Likewise.
        * gas/config/tc-ip2k.c (ip2k_elf_section_flags): Change type of arg
        attr to bfd_vma.
        * gas/config/tc-ip2k.h: Likewise.
        * gas/config/tc-mep.c (mep_elf_section_letter): Return a bfd_vma.
        (mep_elf_section_flags): Change type of arg attr to bfd_vma.
        * gas/config/tc-mep.h: Likewise.
        * gas/config/tc-ppc.c  (ppc_section_letter): Return a bfd_vma.
        (ppc_section_word): Return a bfd_vma.
        (ppc_section_flags): Change type of arg attr to bfd_vma.
        * gas/config/tc-ppc.h: Likewise.
        * gas/config/te-vms.h (DWARF2_DIR_SHOULD_END_WITH_SEPARATOR,
        DWAR2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILEN_NAME):
        New file with new macros
        * gas/dwarf2dbg.c (get_filenum, out_file_list): Default and call new
        macros.
 2009-01-15 12:42:52 +00:00
H.J. Lu
bd5295b282 gas/ 
2009-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (cpu_arch): Add corei7, .clflush and
	.syscall.
	(i386_align_code): Handle PROCESSOR_COREI7.
	(md_show_usage): Add corei7, clflush and syscall.
	(i386_target_format): Replace cpup4 with cpuclflush.

	* gas/config/tc-i386.h (processor_type): Add PROCESSOR_COREI7.

	* doc/c-i386.texi: Document corei7, clflush and syscall.

gas/testsuite/

2009-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.s: Add clflush and syscall.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.

opcodes/

2009-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
	CpuClflush and CpuSYSCALL, respectively. Remove CpuK8.  Add
	CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
	(cpu_flags): Remove CpuP4, CpuK6 and CpuK8.  Add CpuClflush
	and CpuSYSCALL.
	(lineno): Removed.
	(set_bitfield): Take an argument, lineno.  Don't report lineno
	on error if it is -1.
	(process_i386_cpu_flag): Take an argument, lineno.
	(process_i386_opcode_modifier): Likewise.
	(process_i386_operand_type): Likewise.
	(output_i386_opcode): Likewise.
	(opcode_hash_entry): Add lineno.
	(process_i386_opcodes): Updated.
	(process_i386_registers): Likewise.
	(process_i386_initializers): Likewise.

	* i386-opc.h (CpuP4): Removed.
	(CpuK6): Likewise.
	(CpuK8): Likewise.
	(CpuClflush): New.
	(CpuSYSCALL): Likewise.
	(CpuMMX): Updated.
	(i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8.  Add
	cpuclflush and cpusyscall.

	* i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
	syscall and sysret.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2009-01-10 17:25:52 +00:00
H.J. Lu
1b7f3fb0dd gas/ 
2009-01-09  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .rdtscp.
	(md_show_usage): Display rdtscp.

	* doc/c-i386.texi: Document rdtscp.

gas/testsuite/

2009-01-09  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.s: Add rdtscp.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.

opcodes/

2009-01-09  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
	and CPU_AMDFAM10_FLAGS.  Add CPU_RDTSCP_FLAGS.
	(cpu_flags): Add CpuRdtscp.
	(set_bitfield): Remove CpuSledgehammer check.

	* i386-opc.h (CpuRdtscp): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpurdtscp.

	* i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2009-01-09 20:32:32 +00:00
H.J. Lu
0bfee64967 gas/ 
2009-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (December, 2008)
	* config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction
	support.  Don't swap REG and NDS for FMA.

gas/testsuite/

2009-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (December, 2008)
	* gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/inval-avx.l: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-inval-avx.l: Likewise.

	* gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA
	instructions.  Update tests.
	* gas/i386/inval-avx.s: Likewise.
	* gas/i386/x86-64-avx.s: Likewise.
	* gas/i386/x86-64-inval-avx.s: Likewise.

	* gas/i386/fma.d: New.
	* gas/i386/fma.s: Likewise.
	* gas/i386/fma-intel.d: Likewise.
	* gas/i386/x86-64-fma.d: Likewise.
	* gas/i386/x86-64-fma.s: Likewise.
	* gas/i386/x86-64-fma-intel.d: Likewise.

	* gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and
	x86-64-fma-intel.

opcodes/

2009-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (December, 2008)
	* i386-dis.c (OP_VEX_FMA): Removed.
	(OP_EX_VexW): Likewise.
	(OP_EX_VexImmW): Likewise.
	(OP_XMM_VexW): Likewise.
	(VEXI4_Fixup): Likewise.
	(VPERMIL2_Fixup): Likewise.
	(VexI4): Likewise.
	(VexFMA): Likewise.
	(Vex128FMA): Likewise.
	(EXVexW): Likewise.
	(EXdVexW): Likewise.
	(EXqVexW): Likewise.
	(EXVexImmW): Likewise.
	(XMVexW): Likewise.
	(VPERMIL2): Likewise.
	(PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
	(PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
	(PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
	(PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
	(VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
	(VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
	(get_vex_imm8): Likewise.
	(OP_EX_VexReg): Likewise.
	vpermil2_op): Likewise.
	(EXVexWdq): New.
	(vex_w_dq_mode): Likewise.
	(PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
	(PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
	(PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
	(es_reg): Updated.
	(PREFIX_VEX_38DB): Likewise.
	(PREFIX_VEX_3A4A): Likewise.
	(PREFIX_VEX_3A60): Likewise.
	(PREFIX_VEX_3ADF): Likewise.
	(VEX_LEN_3ADF_P_2): Likewise.
	(prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
	PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
	PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
	PREFIX_VEX_3A78...PREFIX_VEX_3A7F.  Add
	PREFIX_VEX_3896...PREFIX_VEX_389F,
	PREFIX_VEX_38A6...PREFIX_VEX_38AF and
	PREFIX_VEX_38B6...PREFIX_VEX_38BF.
	(vex_table): Likewise.
	(vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
	and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
	(putop): Support "%XW".
	(intel_operand_size): Handle vex_w_dq_mode.

	* i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.

	* i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
	instructions.  Add new FMA instructions.
	* i386-tbl.h: Regenerated.
 2009-01-06 01:03:27 +00:00
H.J. Lu
fa99fab222 gas/ 
2008-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Changed to return
	 const template *.  Handle i.swap_operand for 3 operands.
	 (build_vex_prefix): Take const template *.  Swap operand for
	 2-byte VEX prefix if possible.
	 (md_assemble): Updated.
	 (build_modrm_byte): Handle RegMem bit for SSE2AVX.

gas/testsuite/

2008-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run x86-64-avx-swap and x86-64-avx-swap-intel.

	* gas/i386/opts.s: Add tests for movsd, movss, vmovsd and
	vmovss.
	* gas/i386/x86-64-opts.s: Likewise.

	* gas/i386/opts.d: Updated.
	* gas/i386/opts-intel.d: Likewise.
	* gas/i386/sse2avx-opts.d: Likewise.
	* gas/i386/sse2avx-opts-intel.d: Likewise.
	* gas/i386/x86-64-opts.d: Likewise.
	* gas/i386/x86-64-opts-intel.d: Likewise.
	* gas/i386/x86-64-sse2avx-opts.d: Likewise.
	* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.

	* gas/i386/x86-64-avx-swap.d: New.
	* gas/i386/x86-64-avx-swap.s: Likewise.
	* gas/i386/x86-64-avx-swap-intel.d: Likewise.

opcodes/

2008-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (EXdS): New.
	(EXdVexS): Likewise.
	(EXqVexS): Likewise.
	(d_swap_mode): Likewise.
	(q_mode): Updated.
	(prefix_table): Use EXdS on movss and EXqS on movsd.
	(vex_len_table): Use EXdVexS on vmovss and EXqVexS on vmovsd.
	(intel_operand_size): Handle d_swap_mode.
	(OP_EX): Likewise.

	* i386-opc.h (S): Update comments.

	* i386-opc.tbl: Add S to movss, movsd, vmovss and vmovsd.
	* i386-tbl.h: Regenerated.
 2008-12-23 15:14:15 +00:00
H.J. Lu
30a55f88b1 2008-12-20 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (parse_insn): Optimize ".s" handling.
 2008-12-20 18:20:16 +00:00
H.J. Lu
b6169b206a gas/ 
2008-12-20  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (_i386_insn): Add swap_operand.
	(parse_insn): Handle ".s".
	(match_template): Handle swap_operand.

	* doc/c-i386.texi: Document .s suffix.

gas/testsuite/

2008-12-20  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run opts, opts-intel, sse2avx-opts,
	sse2avx-opts-intel, x86-64-opts, x86-64-opts-intel,
	x86-64-sse2avx-opts and x86-64-sse2avx-opts-intel.

	* gas/i386/opts.d: New.
	* gas/i386/opts-intel.d: Likewise.
	* gas/i386/opts.s: Likewise.
	* gas/i386/sse2avx-opts.d: Likewise.
	* gas/i386/sse2avx-opts-intel.d: Likewise.
	* gas/i386/x86-64-opts.d: Likewise.
	* gas/i386/x86-64-opts-intel.d: Likewise.
	* gas/i386/x86-64-opts.s: Likewise.
	* gas/i386/x86-64-sse2avx-opts.d: Likewise.
	* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.

opcodes/

2008-12-20  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (EbS): New.
	(EvS): Likewise.
	(EMS): Likewise.
	(EXqS): Likewise.
	(EXxS): Likewise.
	(b_swap_mode): Likewise.
	(v_swap_mode): Likewise.
	(q_swap_mode): Likewise.
	(x_swap_mode): Likewise.
	(v_mode): Updated.
	(w_mode): Likewise.
	(t_mode): Likewise.
	(xmm_mode): Likewise.
	(swap_operand): Likewise.
	(dis386): Use EbS on movB.  Use EvS on moveS.
	(dis386_twobyte): Use EXxS on movapX.
	(prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
	vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
	(vex_table): Use EXxS on vmovapX.
	(vex_len_table): Use EXqS on vmovq.
	(intel_operand_size): Handle b_swap_mode, v_swap_mode,
	q_swap_mode and x_swap_mode.
	(OP_E_register): Handle b_swap_mode and v_swap_mode.
	(OP_EM): Handle v_swap_mode.
	(OP_EX): x_swap_mode and q_swap_mode.

	* i386-gen.c (opcode_modifiers): Add S.

	* i386-opc.h (S): New.
	(Modrm): Updated.
	(i386_opcode_modifier): Add s.

	* i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
	movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
	* i386-tbl.h: Regenerated.
 2008-12-20 17:40:51 +00:00
H.J. Lu
9bb97f002b 2008-12-08 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (build_modrm_byte): Remove an extra blank
	line.
 2008-12-08 17:59:00 +00:00
Kai Tietz
b01ee69ddc 2008-11-29 Kai Tietz <kai.tietz@onevision.com> 
* config/tc-i386.c (i386_target_format): For coff flavour in TE_PEP
	use "pe-i386" for 32-bit.
 2008-11-29 09:35:52 +00:00
H.J. Lu
fbf3f58457 gas/ 
2008-10-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (processor_type): Moved to tc-i386.h.
	(cpu_arch_tune): Make it global.
	(cpu_arch_isa): Likewise.
	(cpu_arch_isa_flags): Likewise.
	(i386_align_code): Check fragP->tc_frag_data.isa,
	fragP->tc_frag_data.isa_flags and cpu_arch_tune instead of
	cpu_arch_isa, cpu_arch_isa_flags and cpu_arch_tune,
	respectively.

	* config/tc-i386.h (processor_type): Moved from tc-i386.c.
	(cpu_arch_tune): New.
	(cpu_arch_isa): Likewise.
	(cpu_arch_isa_flags): Likewise.
	(i386_tc_frag_data): Likewise.
	(TC_FRAG_TYPE): Likewise.
	(TC_FRAG_INIT): Likewise.

gas/testsuite/

2008-10-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run nops-5, nops-5-i686, x86-64-nops-5 and
	x86-64-nops-5-k8.

	* gas/i386/nops-5.d: New.
	* gas/i386/nops-5.s: Likewise.
	* gas/i386/nops-5-i686.d: Likewise.
	* gas/i386/x86-64-nops-5.d: Likewise.
	* gas/i386/x86-64-nops-5-k8.d: Likewise.
 2008-10-12 12:37:09 +00:00
Eric Botcazou
ad5fec3b3a * dw2gencfi.c (cfi_finish): Deal with md_fix_up_eh_frame. 
* config/tc-i386.h (md_fix_up_eh_frame): Define on Solaris.
	(i386_solaris_fix_up_eh_frame): Declare.
	* config/tc-i386.c (i386_solaris_fix_up_eh_frame): New function.
 2008-10-09 17:31:43 +00:00
Nick Clifton
704209c00f Make new functions static. 
Rearrange wording of documentation.
 2008-09-03 15:44:33 +00:00
Nick Clifton
a6c24e68b9 * config/tc-i386.c (pe_lcomm_internal): New function. Allows the 
alignment field of the .lcomm directive to be optional.
  (pe_lcomm): New function.  Pass pe_lcomm_internal to
  s_comm_internal.
  (md_pseudo_table): Implement .lcomm directive for COFF based
  targets.
  * doc/c-i386.texi (i386-Directives): New node.  Used to document
  the .lcomm directive.
 2008-09-03 14:02:30 +00:00
Jan Beulich
fc0763e65a gas/ 
2008-08-28  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (md_assemble): Force number of displacement
	operands to zero when processing string instruction.
	(i386_index_check): Special-case string instruction operands. Don't
	fudge address prefix if there already was a memory operand. Fix
	error message to correctly reflect the addressing mode used.
	(i386_att_operand): Fix comment.
	(i386_intel_operand): Snapshot, clear, and restore base and index
	reg for each operand processed. Increment count of memory operands
	later.

gas/testsuite/
2008-08-28  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/string-bad.{l,s}, gas/i386/string-ok.{d,e,s}: New.
	* gas/i386/i386.exp: Run new tests.
 2008-08-28 09:42:11 +00:00
Jan Beulich
a87af0274f gas/ 
2008-08-27  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (check_string): Use register_prefix for error
	message.
	(process_operands): Likewise.
 2008-08-27 16:24:32 +00:00
H.J. Lu
a5ff0eb22b gas/ 
2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (August, 2008)
	* config/tc-i386.c (CPU_FLAGS_AES_MATCH): New.
	(CPU_FLAGS_AVX_MATCH): Likewise.
	(CPU_FLAGS_32BIT_MATCH): Updated.
	(cpu_flags_match): Likewise.

gas/testsuite/

2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (August, 2008)
	* gas/i386/avx.s: Add AES + AVX tests.
	* gas/i386/arch-10.s: Likewise.
	* gas/i386/sse2avx.s: Likewise.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/x86-64-avx.s: Likewise.
	* gas/i386/x86-64-sse2avx.s: Likewise.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/sse2avx.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-sse2avx.d: Likewise.

	* gas/i386/i386.exp: Run arch-avx-1, arch-avx-1-1 and
	arch-avx-1-2.

	* gas/i386/arch-avx-1.d: New.
	* gas/i386/arch-avx-1.s: Likewise.
	* gas/i386/arch-avx-1-1.l: Likewise.
	* gas/i386/arch-avx-1-1.s: Likewise.
	* gas/i386/arch-avx-1-2.l: Likewise.
	* gas/i386/arch-avx-1-2.s: Likewise.

opcodes/

2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (August, 2008)
	* i386-dis.c (PREFIX_VEX_38DB): New.
	(PREFIX_VEX_38DC): Likewise.
	(PREFIX_VEX_38DD): Likewise.
	(PREFIX_VEX_38DE): Likewise.
	(PREFIX_VEX_38DF): Likewise.
	(PREFIX_VEX_3ADF): Likewise.
	(VEX_LEN_38DB_P_2): Likewise.
	(VEX_LEN_38DC_P_2): Likewise.
	(VEX_LEN_38DD_P_2): Likewise.
	(VEX_LEN_38DE_P_2): Likewise.
	(VEX_LEN_38DF_P_2): Likewise.
	(VEX_LEN_3ADF_P_2): Likewise.
	(PREFIX_VEX_3A04): Updated.
	(VEX_LEN_3A06_P_2): Likewise.
	(prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
	PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
	(x86_64_table): Likewise.
	(vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
	VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
	VEX_LEN_3ADF_P_2.

	* i386-opc.tbl: Add AES + AVX instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-08-20 18:38:40 +00:00
H.J. Lu
e6a1410132 2008-08-18 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (i386_align_code): Fix a comment typo.
 2008-08-18 18:21:15 +00:00
Alan Modra
5a49b8acf4 Banish PARAMS and PTR. Convert to ISO C. 
Delete unnecessary forward declarations.
 2008-08-12 23:39:31 +00:00
Alan Modra
2cfe26b654 warning fix 2008-07-28 06:48:00 +00:00
H.J. Lu
cb19c0328d gas/ 
2008-06-03  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (set_sse_check): New.
	(md_pseudo_table): Add "sse_check".

gas/testsuite/

2008-06-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run sse-check-none and
	x86-64-sse-check-none.

	* gas/i386/sse-check-none.d: New.
	* gas/i386/sse-check-none.s: Likewise.
	* gas/i386/x86-64-sse-check-none.d: Likewise.
 2008-06-03 17:31:52 +00:00
H.J. Lu
95f283e8f6 2008-05-23 H.J. Lu <hongjiu.lu@intel.com> 
PR gas/6518
	* config/tc-i386.c (match_template): Report ambiguous operand
	size, not invalid suffix when there is no match in Intel
	syntax.
 2008-05-23 13:55:36 +00:00
H.J. Lu
f1f8f695c0 gas/ 
2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention XSAVE, EPT and MOVBE.

	* config/tc-i386.c (cpu_arch): Add .movbe and .ept.
	(md_show_usage): Add .movbe and .ept.

	* doc/c-i386.texi: Add movbe and ept to -march=.  Document
	.movbe and .ept.

gas/testsuite/

2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
	ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
	x86-64-inval-movbe.  x86-64-ept, x86-64-ept-intel and
	x86-64-inval-ept.

	* gas/i386/arch-10.s: Add movbe and invept.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/ept.d: New file
	* gas/i386/ept-intel.d: Likewise.
	* gas/i386/ept.s: Likewise.
	* gas/i386/inval-ept.l: Likewise.
	* gas/i386/inval-ept.s: Likewise.
	* gas/i386/inval-movbe.l: Likewise.
	* gas/i386/inval-movbe.s: Likewise.
	* gas/i386/movbe.d: Likewise.
	* gas/i386/movbe-intel.d: Likewise.
	* gas/i386/movbe.s: Likewise.
	* gas/i386/x86-64-inval-ept.l: Likewise.
	* gas/i386/x86-64-inval-ept.s: Likewise.
	* gas/i386/x86-64-inval-movbe.l: Likewise.
	* gas/i386/x86-64-inval-movbe.s: Likewise.
	* gas/i386/x86-64-ept.d: Likewise.
	* gas/i386/x86-64-ept-intel.d: Likewise.
	* gas/i386/x86-64-ept.s: Likewise.
	* gas/i386/x86-64-movbe.d: Likewise.
	* gas/i386/x86-64-movbe-intel.d: Likewise.
	* gas/i386/x86-64-movbe.s: Likewise.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.

opcodes/

2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (MOVBE_Fixup): New.
	(Mo): Likewise.
	(PREFIX_0F3880): Likewise.
	(PREFIX_0F3881): Likewise.
	(PREFIX_0F38F0): Updated.
	(prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
	PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
	(three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.

	* i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
	CPU_EPT_FLAGS.
	(cpu_flags): Add CpuMovbe and CpuEPT.

	* i386-opc.h (CpuMovbe): New.
	(CpuEPT): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpumovbe and cpuept.

	* i386-opc.tbl: Add entries for movbe and EPT instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-05-02 16:53:40 +00:00
H.J. Lu
81f8a9131a gas/ 
2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Don't check SSE instructions
	if noavx is 0.

opcodes/

2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add NoAVX.

	* i386-opc.h (NoAVX): New.
	(OldGcc): Updated.
	(i386_opcode_modifier): Add noavx.

	* i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
	instructions which don't have AVX equivalent.
	* i386-tbl.h: Regenerated.
 2008-04-22 22:27:13 +00:00
H.J. Lu
eff014d916 2008-04-18 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (build_modrm_byte): Don't check FMA to swap
	REG and NDS for instructions with immediate operand.
 2008-04-18 18:22:37 +00:00
H.J. Lu
dae39accc2 gas/ 
2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
	FMA.

gas/testsuite/

2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.d: Updated.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.

opcodes/

2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_VEX_FMA): New.
	(OP_EX_VexImmW): Likewise.
	(VexFMA): Likewise.
	(Vex128FMA): Likewise.
	(EXVexImmW): Likewise.
	(get_vex_imm8): Likewise.
	(OP_EX_VexReg): Likewise.
	(vex_i4_done): Renamed to ...
	(vex_w_done): This.
	(prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
	and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
	FMA instructions.
	(print_insn): Updated.
	(OP_EX_VexW): Rewrite to swap register in VEX with EX.
	(OP_REG_VexI4): Check invalid high registers.
 2008-04-18 13:10:32 +00:00
H.J. Lu
daf50ae75d gas/ 
2008-04-10  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention -msse-check=[none|error|warning].

	* config/tc-i386.c (sse_check): New.
	(OPTION_MSSE_CHECK): Likewise.
	(md_assemble): Check SSE instructions if needed.
	(md_longopts): Add -msse-check.
	(md_parse_option): Handle OPTION_MSSE_CHECK.
	(md_show_usage): Show -msse-check=[none|error|warning].

	* doc/c-i386.texi: Document -msse-check=[none|error|warning].

gas/testsuite/

2008-04-10  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run sse-check, sse-check-warn,
	sse-check-error, x86-64-sse-check, x86-64-sse-check-warn and
	x86-64-sse-check-error.

	* gas/i386/sse-check.d: New.
	* gas/i386/sse-check.s: Likewise.
	* gas/i386/sse-check-error.l: Likewise.
	* gas/i386/sse-check-error.s: Likewise.
	* gas/i386/sse-check-warn.d: Likewise.
	* gas/i386/sse-check-warn.e: Likewise.
	* gas/i386/x86-64-sse-check.d: Likewise.
	* gas/i386/x86-64-sse-check-error.l: Likewise.
	* gas/i386/x86-64-sse-check-error.s: Likewise.
	* gas/i386/x86-64-sse-check-warn.d: Likewise.
 2008-04-10 17:53:40 +00:00
H.J. Lu
40f1253383 gas/ 
2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (parse_real_register): Return AVX register
	only if AVX is enabled.

gas/testsuite/

2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/att-regs.s: Add AVX register test.
	* gas/i386/intel-regs.s: Likewise.

	* gas/i386/att-regs.d: Updated.
	* gas/i386/intel-regs.d: Likewise.
 2008-04-07 13:07:16 +00:00
H.J. Lu
594ab6a333 gas/ 
2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention XSAVE.  Change CLMUL to PCLMUL.

	* config/tc-i386.c (cpu_arch): Add .pclmul.
	(md_show_usage): Replace clmul with pclmul.
	* doc/c-i386.texi: Likewise.

gas/testsuite/

2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/arch-10.s: Likewise.
	* gas/i386/clmul-intel.d: Likewise.
	* gas/i386/clmul.d: Likewise.
	* gas/i386/clmul.s: Likewise.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/x86-64-clmul-intel.d: Likewise.
	* gas/i386/x86-64-clmul.d: Likewise.
	* gas/i386/x86-64-clmul.s: Likewise.

	* gas/i386/arch-10.d: Replace clmul with pclmul.
	* gas/i386/x86-64-arch-2.d: Likewise.

opcodes/

2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
	with CPU_PCLMUL_FLAGS/CpuPCLMUL.
	(cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
	* i386-opc.tbl: Likewise.

	* i386-opc.h (CpuCLMUL): Renamed to ...
	(CpuPCLMUL): This.
	(CpuFMA): Updated.
	(i386_cpu_flags): Replace cpuclmul with cpupclmul.

	* i386-init.h: Regenerated.
 2008-04-04 16:34:23 +00:00
H.J. Lu
c0f3af977b binutils/ 
2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c (dwarf_regnames_i386): Add AVX registers.
	(dwarf_regnames_x86_64): Likewise.

gas/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.

	* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
	Document -msse2avx, .avx, .aes, .clmul and .fma.

	* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
	(vex_prefix): Likewise.
	(sse2avx): Likewise.
	(CPU_FLAGS_ARCH_MATCH): Likewise.
	(CPU_FLAGS_64BIT_MATCH): Likewise.
	(CPU_FLAGS_32BIT_MATCH): Likewise.
	(CPU_FLAGS_PERFECT_MATCH): Likewise.
	(regymm): Likewise.
	(vex_imm4): Likewise.
	(fits_in_imm4): Likewise.
	(build_vex_prefix): Likewise.
	(VEX_check_operands): Likewise.
	(bad_implicit_operand): Likewise.
	(OPTION_MSSE2AVX): Likewise.
	(T_YMMWORD): Likewise.
	(_i386_insn): Add vex.
	(cpu_arch): Add .avx, .aes, .clmul and .fma.
	(cpu_flags_match): Changed to take a pointer to const template.
	Enable encoding SSE instructions with VEX prefix for -msse2avx.
	(match_mem_size): Also check ymmword.
	(operand_type_match): Clear ymmword.
	(md_begin): Allow '_' in mnemonic.
	(type_names): Add OPERAND_TYPE_VEX_IMM4.
	(process_immext): Update assert.
	(md_assemble): Don't call process_immext if sse2avx and immext
	are true.  Call build_vex_prefix if vex is true.
	(parse_insn): Updated for cpu_flags_match.
	(swap_operands): Handle 5 operands.
	(match_template): Handle 5 operands. Updated for cpu_flags_match.
	Check regymm.  Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
	(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
	(check_byte_reg): Check regymm.
	(process_operands): Duplicate the destination register for
	-msse2avx if needed.
	(build_modrm_byte): Updated for instructions with VEX encoding.
	(output_insn): Output VEX prefix if needed.
	(md_longopts): Add msse2avx.
	(md_parse_option): Handle OPTION_MSSE2AVX.
	(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
	(intel_e09): Support YMMWORD.
	(intel_e11): Likewise.
	(intel_get_token): Likewise.

gas/testsuite/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
	x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
	x86-64-avx-intel and x86-64-inval-avx.

	* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
	* gas/cfi/cfi-x86_64.s: Likewise.

	* gas/i386/aes.d: New.
	* gas/i386/aes.s: Likewise.
	* gas/i386/aes-intel.d: Likewise.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx.s: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/clmul.d: Likewise.
	* gas/i386/clmul-intel.d: Likewise.
	* gas/i386/clmul.s: Likewise.
	* gas/i386/i386.exp: Likewise.
	* gas/i386/inval-avx.l: Likewise.
	* gas/i386/inval-avx.s: Likewise.
	* gas/i386/sse2avx.d: Likewise.
	* gas/i386/sse2avx.s: Likewise.
	* gas/i386/x86-64-aes.d: Likewise.
	* gas/i386/x86-64-aes.s: Likewise.
	* gas/i386/x86-64-aes-intel.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx.s: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-clmul.d: Likewise.
	* gas/i386/x86-64-clmul-intel.d: Likewise.
	* gas/i386/x86-64-clmul.s: Likewise.
	* gas/i386/x86-64-inval-avx.l: Likewise.
	* gas/i386/x86-64-inval-avx.s: Likewise.
	* gas/i386/x86-64-sse2avx.d: Likewise.
	* gas/i386/x86-64-sse2avx.s: Likewise.

	* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/rexw.s: Add AVX tests.

	* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.

	* gas/cfi/cfi-i386.d: Updated.
	* gas/cfi/cfi-x86_64.d: Likewise.
	* gas/i386/arch-10.d:  Likewise.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/rexw.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-opcode-inval.d: Likewise.
	* gas/i386/x86-64-opcode-inval-intel.d: Likewise.

include/opcode/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (MAX_OPERANDS): Set to 5.
	(MAX_MNEM_SIZE): Changed to 20.

opcodes/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_register): New.
	(OP_E_memory): Likewise.
	(OP_VEX): Likewise.
	(OP_EX_Vex): Likewise.
	(OP_EX_VexW): Likewise.
	(OP_XMM_Vex): Likewise.
	(OP_XMM_VexW): Likewise.
	(OP_REG_VexI4): Likewise.
	(PCLMUL_Fixup): Likewise.
	(VEXI4_Fixup): Likewise.
	(VZERO_Fixup): Likewise.
	(VCMP_Fixup): Likewise.
	(VPERMIL2_Fixup): Likewise.
	(rex_original): Likewise.
	(rex_ignored): Likewise.
	(Mxmm): Likewise.
	(XMM): Likewise.
	(EXxmm): Likewise.
	(EXxmmq): Likewise.
	(EXymmq): Likewise.
	(Vex): Likewise.
	(Vex128): Likewise.
	(Vex256): Likewise.
	(VexI4): Likewise.
	(EXdVex): Likewise.
	(EXqVex): Likewise.
	(EXVexW): Likewise.
	(EXdVexW): Likewise.
	(EXqVexW): Likewise.
	(XMVex): Likewise.
	(XMVexW): Likewise.
	(XMVexI4): Likewise.
	(PCLMUL): Likewise.
	(VZERO): Likewise.
	(VCMP): Likewise.
	(VPERMIL2): Likewise.
	(xmm_mode): Likewise.
	(xmmq_mode): Likewise.
	(ymmq_mode): Likewise.
	(vex_mode): Likewise.
	(vex128_mode): Likewise.
	(vex256_mode): Likewise.
	(USE_VEX_C4_TABLE): Likewise.
	(USE_VEX_C5_TABLE): Likewise.
	(USE_VEX_LEN_TABLE): Likewise.
	(VEX_C4_TABLE): Likewise.
	(VEX_C5_TABLE): Likewise.
	(VEX_LEN_TABLE): Likewise.
	(REG_VEX_XX): Likewise.
	(MOD_VEX_XXX): Likewise.
	(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
	(PREFIX_0F3A44): Likewise.
	(PREFIX_0F3ADF): Likewise.
	(PREFIX_VEX_XXX): Likewise.
	(VEX_OF): Likewise.
	(VEX_OF38): Likewise.
	(VEX_OF3A): Likewise.
	(VEX_LEN_XXX): Likewise.
	(vex): Likewise.
	(need_vex): Likewise.
	(need_vex_reg): Likewise.
	(vex_i4_done): Likewise.
	(vex_table): Likewise.
	(vex_len_table): Likewise.
	(OP_REG_VexI4): Likewise.
	(vex_cmp_op): Likewise.
	(pclmul_op): Likewise.
	(vpermil2_op): Likewise.
	(m_mode): Updated.
	(es_reg): Likewise.
	(PREFIX_0F38F0): Likewise.
	(PREFIX_0F3A60): Likewise.
	(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
	(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
	and PREFIX_VEX_XXX entries.
	(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
	(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
	PREFIX_0F3ADF.
	(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
	Add MOD_VEX_XXX entries.
	(ckprefix): Initialize rex_original and rex_ignored.  Store the
	REX byte in rex_original.
	(get_valid_dis386): Handle the implicit prefix in VEX prefix
	bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
	(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
	calling get_valid_dis386.  Use rex_original and rex_ignored when
	printing out REX.
	(putop): Handle "XY".
	(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
	ymmq_mode.
	(OP_E_extended): Updated to use OP_E_register and
	OP_E_memory.
	(OP_XMM): Handle VEX.
	(OP_EX): Likewise.
	(XMM_Fixup): Likewise.
	(CMP_Fixup): Use ARRAY_SIZE.

	* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
	CPU_FMA_FLAGS and CPU_AVX_FLAGS.
	(operand_type_init): Add OPERAND_TYPE_REGYMM and
	OPERAND_TYPE_VEX_IMM4.
	(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
	(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
	VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
	VexImmExt and SSE2AVX.
	(operand_types): Add RegYMM, Ymmword and Vex_Imm4.

	* i386-opc.h (CpuAVX): New.
	(CpuAES): Likewise.
	(CpuCLMUL): Likewise.
	(CpuFMA): Likewise.
	(Vex): Likewise.
	(Vex256): Likewise.
	(VexNDS): Likewise.
	(VexNDD): Likewise.
	(VexW0): Likewise.
	(VexW1): Likewise.
	(Vex0F): Likewise.
	(Vex0F38): Likewise.
	(Vex0F3A): Likewise.
	(Vex3Sources): Likewise.
	(VexImmExt): Likewise.
	(SSE2AVX): Likewise.
	(RegYMM): Likewise.
	(Ymmword): Likewise.
	(Vex_Imm4): Likewise.
	(Implicit1stXmm0): Likewise.
	(CpuXsave): Updated.
	(CpuLM): Likewise.
	(ByteOkIntel): Likewise.
	(OldGcc): Likewise.
	(Control): Likewise.
	(Unspecified): Likewise.
	(OTMax): Likewise.
	(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
	(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
	vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
	vex3sources, veximmext and sse2avx.
	(i386_operand_type): Add regymm, ymmword and vex_imm4.

	* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.

	* i386-reg.tbl: Add AVX registers, ymm0..ymm15.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-04-03 14:03:21 +00:00