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2 commits

Author SHA1 Message Date
Stephane Carrez
11115521f6 * dv-m68hc11sio.c (m68hc11sio_tx_poll): Always check for
pending interrupts.
	* interrupts.c (interrupts_process): Keep track of the last number
	of masked insn cycles.
	(interrupts_initialize): Clear last number of masked insn cycles.
	(interrupts_info): Report them.
	(interrupts_update_pending): Compute clear and set masks of
	interrupts and clear the interrupt bits before setting them
	(due to SCI interrupt sharing).
	* interrupts.h (struct interrupts): New members last_mask_cycles
	and xirq_last_mask_cycles.
2001-05-20 15:36:29 +00:00
Andrew Cagney
e0709f5044 New simulator. 2000-07-27 11:23:39 +00:00