This function seems to be a left over from some previous
functionality that no longer exists - the comment above seems to
make no sense with the current code. Remove the function as it
breaks handling of SystemTap static probe note sections.
bfd/ChangeLog:
2014-04-22 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (elfNN_aarch64_section_flags): Remove
function. (elf_backend_section_flags): Remove define.
ld/
* emultempl/alphaelf.em (alpha_after_parse): Enable 2 relax passes.
bfd/
* elf64-alpha.c (elf64_alpha_size_got_sections): New may_merge
parameter; honor it and disable got merging when false.
(elf64_alpha_relax_got_load): Do not relax to GPREL relocs during
the first pass of relaxation.
(elf64_alpha_relax_with_lituse): Likewise. Move relaxed relocs to
the end of the LITERAL+LITUSE chain.
(elf64_alpha_relax_section): Only process LITERAL relocs during the
second pass of relaxation.
bfd/
* mach-o.h (bfd_mach_o_dyld_info_command): Add rebase_content,
bind_content, weak_bind_content, lazy_bind_content,
export_content.
(bfd_mach_o_load_command): Add comments, add next field.
(mach_o_data_struct): Replace commands field by first_command
and last_command.
* mach-o.c (bfd_mach_o_append_command): New function.
(bfd_mach_o_bfd_copy_private_symbol_data): Add blank lines.
(bfd_mach_o_bfd_copy_private_section_data): Check flavour,
copy fields.
(bfd_mach_o_bfd_copy_private_header_data): Copy load commands.
(bfd_mach_o_pad4, bfd_mach_o_pad_command): New functions.
(bfd_mach_o_write_thread): Use macro instead of literal.
(bfd_mach_o_write_dylinker, bfd_mach_o_write_dylib)
(bfd_mach_o_write_main, bfd_mach_o_write_dyld_info): New
functions.
(bfd_mach_o_write_symtab_content): New function (extracted
from bfd_mach_o_write_symtab).
(bfd_mach_o_write_symtab): Split.
(bfd_mach_o_count_indirect_symbols): Move
(bfd_mach_o_build_dysymtab): Remove layout code.
(bfd_mach_o_write_contents): Rewritten to build commands in order.
(bfd_mach_o_count_sections_for_seg): Remove.
(bfd_mach_o_build_obj_seg_command): New function (extracted from
bfd_mach_o_build_seg_command).
(bfd_mach_o_build_exec_seg_command): New function.
(bfd_mach_o_build_dysymtab_command): Remove.
(bfd_mach_o_layout_commands): New function.
(bfd_mach_o_init_segment): New function.
(bfd_mach_o_build_commands): Major rework to handle non-object
files.
(bfd_mach_o_alloc_and_read, bfd_mach_o_read_dyld_content): New
function.
(bfd_mach_o_read_dyld_info): Clear content fields.
(bfd_mach_o_read_segment): Adjust call.
(bfd_mach_o_flatten_sections): Adjust as now load commands are
chained.
(bfd_mach_o_scan_start_address, bfd_mach_o_scan)
(bfd_mach_o_mkobject_init, bfd_mach_o_get_base_address)
(bfd_mach_o_lookup_command, bfd_mach_o_core_fetch_environment):
Likewise.
binutils/
* od-macho.c (dump_section_map): Adjust as load commands
are now chained.
(dump_load_command, dump_section_content): Likewise.
be placed towards the front of local GOT space, while entries addressed
via a 32-bit index are placed towards the rear.
Provided that there are fewer than ~16K local GOT entries addressed via
a 16-bit index in total, this should eliminate any relocation overflows
caused by such GOT entries being allocated beyond the addressable range.
bfd/
* elfxx-mips.c (struct mips_got_info): Delete assigned_gotno
field. Add assigned_low_gotno and assigned_high_gotno fields.
(mips_elf_create_local_got_entry): Update out-of-space condition.
Set index of new GOT entry to assigned_low_gotno if required by
the current relocation, else set it to assigned_high_gotno.
(mips_elf_set_global_gotidx): Replace uses of assigned_gotno
with assigned_low_gotno.
(mips_elf_multi_got): Initialize assigned_low_gotno and
assigned_high_gotno in secondary GOTs. Use assigned_low_gotno
in place of assigned_gotno when handling global GOT entries.
(mips_elf_lay_out_got): Initialize assigned_low_gotno and
assigned_high_gotno.
(_bfd_mips_elf_finish_dynamic_sections): Account for a possible
gap in the middle of local GOT space.
ld/testsuite/
* ld-mips-elf/elf-rel-xgot-n32.d: Update for new GOT layout.
* ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise.
PR 16846
* elflink.c (_bfd_elf_merge_symbol): Ignore TLS mismatch when
current bfd is a plugin. Don't always set type_change_ok
when old bfd is a plugin.
The AArch64 TLSDESC to IE relaxation code uses a bit mask intended to
ensure that destination register in a relaxed ldr instruction is
always X0. The mask has an off by one error resulting in the most
significant bit of the destination register being retained in the
relaxed instruction. The issue generally appears when the compiler
emits TLS accesses code under high register pressure resulting in a
broken code sequence.
Fuss over bctr in call stubs.
* elf32-ppc.c (BA): Define
(ppc_elf_link_hash_table_create): Correct default_params.
(write_glink_stub): Pad small plt call stub with "ba 0" rather
than "nop" for ppc476_workaround.
(ppc_elf_finish_dynamic_sections): Likewise for branch table
and __glink_PLTresolve. Ensure plt call stub at end of page
doesn't allow fall-thru prefetch.
converts some address expressions into absolute values, but the PE format
only stores absolutes as 32-bits. This is a partial solution which attempts
to convert such absolute values back to section relative ones instead. It
fails for symbols like __image_base and ImageBase__, but it is unclear as to
whether these values are ever actually used by applications.
PR ld/16821
* peXXigen.c (abs_finder): New function.
(_bfd_XXi_swap_sym_out): For absolute symbols with values larger
than 1^32 try to convert them into section relative values
instead.
I got the ppc476 workaround wrong. bctr (and bctrl) as the last
instruction in a page can hit the icache bug if the preceding mtctr
insn is close by, and the destination is in the first few instructions
on the next page. This scenario can occur with code generated by gcc
to implement switch statements, or in code generated to call by
function pointer.
To prevent the bctr problem it is also necessary to remove other
instructions that otherwise would be safe.
bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Remove bctr from list
of safe ppc476 insns at end of page. Also remove non-branch insns.
Expand comments.
ld/
* emultempl/ppc32elf.em (no_zero_padding, ppc_finish): New functions.
(LDEMUL_FINISH): Define.
The testcase in pr16417 comment #6 produces a map file showing
libpthread.so.0 (write@@GLIBC_2.2.5)
ie. missing the file referencing the symbol.
* elflink.c (_bfd_elf_add_default_symbol): Pass poldbfd when
merging non-default sym.
bfd/
* mach-o-i386.c (bfd_mach_o_i386_swap_reloc_out): Use target index
of output_section.
* mach-o-x86-64.c (bfd_mach_o_x86_64_swap_reloc_out): Ditto.
section before dereferencing.
(pe_print_idata, pe_print_edata, pe_print_reloc)
(rsrc_print_section): Don't bother interpreting the contents
of sections which have no contents.
long type instead of long long meant that bfd_seek (SET) could be called with a
negative offset.
PR ld/16803
* elf.c (_bfd_elf_set_section_contents): Use correct type to hold
file position.
When a VDSO gets large enough that it doesn't entirely fit in one page,
but not so large that the part described by the program header exceeds
one page, then gdb/BFD doesn't read the section headers and symbol
table information. This patch cures that by passing the size of the
vdso to BFD, and fixes a number of other issues in the BFD code.
bfd/
* elfcode.h (bfd_from_remote_memory): Add "size" parameter.
Consolidate code handling possible section headers past end of
segment. Don't use p_align for page size guess, instead use
minpagesize. Take note of ld.so clearing section headers when
p_memsz > p_filesz. Handle file header specifying no section
headers. Handle zero p_align throughout. Default loadbase to
zero. Add comments. Rename contents_size to high_offset, and
make it a bfd_vma. Delete unnecessary bfd_set_error calls.
* bfd-in.h (bfd_elf_bfd_from_remote_memory): Update prototpe.
* elf-bfd.h (struct elf_backend_data <elf_backend_from_remote_memory>):
Likewise.
(_bfd_elf32_bfd_from_remote_memory): Likewise.
(_bfd_elf64_bfd_from_remote_memory): Likewise.
* elf.c (bfd_elf_bfd_from_remote_memory): Adjust.
* bfd-in2.h: Regnerate.
gdb/
* symfile-mem.c (symbol_file_add_from_memory): Add size parameter.
Pass to bfd_elf_bfd_from_remote_memory. Adjust all callers.
(struct symbol_file_add_from_memory_args): Add size field.
(find_vdso_size): New function.
(add_vsyscall_page): Attempt to find vdso size.
produce spurious errors about truncated relocations. The relocations are
only truncated because they are being made against sections which are going
to be discarded so that base address is zero instead of the expected 64-bit
base value.
* cofflink.c (_bfd_coff_generic_relocate_section): Skip
relocations in discarded sections.
ELFv2 needs to create plt entries in a non-PIC executable for an
address reference to a function defined in a shared object. It's
possible that an object file has no features that distinguish it as
ELFv1 or ELFv2, eg. an object only containing data. Such files need
to be handled like those that are known to be ELFv2.
However, this unnecessarily creates plt entries for the analogous
ELFv1 case, so arrange to set output abi version earlier, and use the
output abi version to further distinguish ambiguous input files.
bfd/
* elf64-ppc.c (ppc64_elf_check_relocs): Account for possibly
needed plt entries when taking the address of functions for
abiversion == 0 (ie. unknown) as well as abiversion == 2.
Move opd setup and abiversion checks to..
(ppc64_elf_before_check_relocs): ..here. Renamed from
ppc64_elf_process_dot_syms. Set output abiversion from input and
input abiversion from output, if either is not set.
(ppc64_elf_merge_private_bfd_data): Don't merge flags here.
(elf_backend_check_directives): Update.
ld/testsuite/
* ld-powerpc/startv1.s, * ld-powerpc/startv2.s, * ld-powerpc/funref.s,
* ld-powerpc/funv1.s, * ld-powerpc/funv2.s,
* ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv2.d: New test files.
* ld-powerpc/powerpc.exp: Run new tests.
The current code subtracts the size of the output section containing
relplt from RELASZ. In some cases this will be the same output
section as the dynamic relocs causing a value of zero to be output.
Calculating the size from input sections seems to make more sense.
bfd/ChangeLog:
2014-03-25 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections):
Set value of DT_PLTRELSZ and DT_RELASZ based on the size
of input sections rather than output sections.
ld/testsuite/ChangeLog:
2014-03-25 Will Newton <will.newton@linaro.org>
* ld-aarch64/aarch64-elf.exp: Add relasz dump test.
* ld-aarch64/relasz.d: New file.
* ld-aarch64/relasz.s: Likewise.
Unless pointer_equality_needed is set then set st_value to be zero
for undefined symbols.
bfd/ChangeLog:
2014-03-20 Will Newton <will.newton@linaro.org>
PR ld/16715
* elf32-arm.c (elf32_arm_check_relocs): Set
pointer_equality_needed for absolute references within
executable links.
(elf32_arm_finish_dynamic_symbol): Set st_value to zero
unless pointer_equality_needed is set.
ld/testsuite/ChangeLog:
2014-03-20 Will Newton <will.newton@linaro.org>
* ld-arm/ifunc-14.rd: Update symbol values.
should work for all types of input .rsrc section.
* peXXigen.c (rsrc_process_section): Add code to scan input
sections and record their lengths. Use these lengths to find the
start of each merged .rsrc section.
* scripttempl/pe.sc (R_RSRC): Fix default-manifest exclusion.
(.rsrc): Add SUBALIGN(4). Remove SORT.
* scripttempl/pep.sc: Likewise.
bfd/
* peicode.h (pe_ILF_object_p): Adjust, as the version number
has been read.
(pe_bfd_object_p): Also read version number to detect ILF.
* pe-x86_64.c (COFF_WITH_PE_BIGOBJ): Define.
(x86_64pe_bigobj_vec): Define
* coffcode.h (bfd_coff_backend_data): Add _bfd_coff_max_nscns field.
(bfd_coff_max_nscns): New macro.
(coff_compute_section_file_positions): Use unsigned int for
target_index. Compare with bfd_coff_max_nscns.
(bfd_coff_std_swap_table, ticoff0_swap_table, ticoff1_swap_table):
Set a value for _bfd_coff_max_nscns.
(header_bigobj_classid): New constant.
(coff_bigobj_swap_filehdr_in, coff_bigobj_swap_filehdr_out)
(coff_bigobj_swap_sym_in, coff_bigobj_swap_sym_out)
(coff_bigobj_swap_aux_in, coff_bigobj_swap_aux_out): New
functions.
(bigobj_swap_table): New table.
* libcoff.h: Regenerate.
* coff-sh.c (bfd_coff_small_swap_table): Likewise.
* coff-alpha.c (alpha_ecoff_backend_data): Add value for
_bfd_coff_max_nscns.
* coff-mips.c (mips_ecoff_backend_data): Likewise.
* coff-rs6000.c (bfd_xcoff_backend_data)
(bfd_pmac_xcoff_backend_data): Likewise.
* coff64-rs6000.c (bfd_xcoff_backend_data)
(bfd_xcoff_aix5_backend_data): Likewise.
* targets.c (x86_64pe_bigobj_vec): Declare.
* configure.in (x86_64pe_bigobj_vec): New vector.
* configure: Regenerate.
* config.bfd: Add bigobj object format for Windows targets.
gas/
* config/tc-i386.c (use_big_obj): Declare.
(OPTION_MBIG_OBJ): Define.
(md_longopts): Add -mbig-obj option.
(md_parse_option): Handle it.
(md_show_usage): Display help for this option.
(i386_target_format): Use bigobj for x86-64 if -mbig-obj.
* doc/c-i386.texi: Document the option.
gas/testsuite/
* gas/pe/big-obj.d, gas/pe/big-obj.s: Add test.
* gas/pe/pe.exp: Add test.
include/coff/
* pe.h (struct external_ANON_OBJECT_HEADER_BIGOBJ): Declare.
(FILHSZ_BIGOBJ): Define.
(struct external_SYMBOL_EX): Declare.
(SYMENT_BIGOBJ, SYMESZ_BIGOBJ): Define.
(union external_AUX_SYMBOL_EX): Declare.
(AUXENT_BIGOBJ, AUXESZ_BIGOBJ): Define.
* internal.h (struct internal_filehdr): Change type
of f_nscns.
an ARM ELF binary into an AARCH64 ELF executable.
PR ld/16671
* elf32-arm.c (elf32_arm_add_symbol_hook): Check for ARM format
before testing for vxworks.
copy_elf_program_header has logic to reject non-alloc sections when
calculating p_vaddr offset for padding, but blithely assumed the
first section in a segment was allocated.
PR 16690
* elf.c (copy_elf_program_header): Ignore first section lma if
non-alloc.
coffcode.h uses an intptr_t cast inside an #ifdef RS6000COFF_C, so
ensure that intptr_t is defined. We don't see this when
cross-compiling from linux due to intptr_t being provided by
unistd.h.
PR 16686
* coff-rs6000.c: Include stdint.h.
* coff64-rs6000.c: Likewise.
Similar to the powerpc64 patch, this improves overflow checking in
elf32-ppc.c. Many reloc "howto" entries needed fixes, some just
cosmetic.
The patch also fixes the R_PPC_VLE_SDA21 reloc application code, which
was horribly broken. In fact, it may still be broken since Power ISA
2.07 says e_li behaves as
RT <- EXTS(li20 1:4 || li20 5:8 || li20 0 || li20 9:19)
where li20 is a field taken from bits 17..20, 11..15, 21..31 of the
instruction. Freescale VLEPEM says differently, and I assume
correctly, that
RT <- EXTS(li20 0:3 || li20 4:8 || li20 9:19)
The VLE_SDA21 relocation description matches this too.
Now the VLE_SDA21 relocation specifies in the case where e_addi16 is
converted to e_li for symbols in .PPC.EMB.sdata0 or .PPC.EMB.sbss0
(no base register), that the field is restricted to 16 bits, with the
sign bit being propagated to the top 4 bits. I don't see the sense in
restricting the value like this, so have allowed the full 20 bit
signed value. This of course is compatible with the reloc description
in that values in the 16 bit signed range will result in exactly the
same insn field as when the reloc description is followed to the
letter.
* elf32-ppc.c (ppc_elf_howto_raw): Correct overflow check for
many relocations. Correct bitsize and rightshift too for a number
of VLE relocs. Describe R_PPC_VLE_SDA21 and R_PPC_VLE_SDA21_LO.
Correct dst_mask on R_PPC_VLE_SDA21_LO.
(ppc_elf_vle_split16): Tidy, delete unnecessary prototype.
(ppc_elf_relocate_section): Modify overflow test for 16-bit
fields in instructions to signed/unsigned according to whether
the field takes a signed or unsigned value. Tidy vle split16 code.
Correct R_PPC_VLE_SDA21 and R_PPC_VLE_SDA21_LO handling.
R_PPC64_ADDR16 is used in three contexts:
- .short data relocation
- 16-bit signed insn fields, eg. addi
- 16-bit unsigned insn fields, eg. ori
In the first case we want to allow both signed and unsigned 16-bit
values, the latter two ought to error if the field exceeds the range
of values allowed for 16-bit signed and unsigned integers
respectively. These conflicting requirements meant that ld had to
choose the least restrictive overflow checks, and thus it is possible
to construct testcases where an addi field overflows but is not
reported by ld. Many relocations dealing with 16-bit insn fields have
this problem. What's more, some relocations that are only ever used
for signed fields of instructions woodenly copied the lax overflow
checking of R_PPC64_ADDR16.
bfd/
* elf64-ppc.c (ppc64_elf_howto_raw): Use complain_overflow_signed
for R_PPC64_ADDR14, R_PPC64_ADDR14_BRTAKEN, R_PPC64_ADDR14_BRNTAKEN,
R_PPC64_SECTOFF, R_PPC64_ADDR16_DS, R_PPC64_SECTOFF_DS,
R_PPC64_REL16 entries. Use complain_overflow_dont for R_PPC64_TOC.
(ppc64_elf_relocate_section): Modify overflow test for 16-bit
fields in instructions to signed/unsigned according to whether
the field takes a signed or unsigned value.
gold/
* powerpc.cc (Powerpc_relocate_functions::Overflow_check): Add
CHECK_UNSIGNED, CHECK_LOW_INSN, CHECK_HIGH_INSN.
(Powerpc_relocate_functions::has_overflow_unsigned): New function.
(Powerpc_relocate_functions::has_overflow_bitfield,
overflowed): Use the above.
(Target_powerpc::Relocate::relocate): Correct overflow checking
for a number of relocations. Modify overflow test for 16-bit
fields in instructions to signed/unsigned according to whether
the field takes a signed or unsigned value.
I noticed GDB was failing to enable threading support for 32-bit AIX
cores. I traced it to failure to read variables from libpthreads.a.
The issue is that data for that library is loaded at a high address,
and bfd is sign extending the section addresses:
(gdb) info files
Symbols from "/home/palves/crash".
Local core dump file:
`/home/palves/core', file type aixcoff-rs6000.
0x2ff22000 - 0x2ff23000 is .stack
0x20000000 - 0x200316e0 is .data
0x20000e90 - 0x200016c0 is .data
0xfffffffff0254000 - 0xfffffffff0297920 is .data
0xfffffffff07b46a8 - 0xfffffffff07b47c8 is .data
0xfffffffff0298000 - 0xfffffffff029bfcc is .data
0xfffffffff06dafe0 - 0xfffffffff07b3838 is .data
Local exec file:
`/home/palves/crash', file type aixcoff-rs6000.
Entry point: 0x20001394
0x10000150 - 0x10000e90 is .text
0x20000e90 - 0x2000149c is .data
0x2000149c - 0x200016c0 is .bss
0xd053b124 - 0xd053e15f is .text in /usr/lib/libpthreads.a(shr_comm.o)
0xf0254000 - 0xf0297920 is .data in /usr/lib/libpthreads.a(shr_comm.o)
0xf0254450 - 0xf0297920 is .bss in /usr/lib/libpthreads.a(shr_comm.o)
0xd053a280 - 0xd053aabe is .text in /usr/lib/libcrypt.a(shr.o)
0xf07b46a8 - 0xf07b47c8 is .data in /usr/lib/libcrypt.a(shr.o)
0xf07b47c8 - 0xf07b47c8 is .bss in /usr/lib/libcrypt.a(shr.o)
0xd04fb180 - 0xd053917e is .text in /usr/lib/libpthreads.a(shr_xpg5.o)
0xf0298000 - 0xf029bfcc is .data in /usr/lib/libpthreads.a(shr_xpg5.o)
0xf029bf64 - 0xf029bfcc is .bss in /usr/lib/libpthreads.a(shr_xpg5.o)
0xd0100900 - 0xd04fa39c is .text in /usr/lib/libc.a(shr.o)
0xf06dafe0 - 0xf07b3838 is .data in /usr/lib/libc.a(shr.o)
0xf0751e94 - 0xf07b3838 is .bss in /usr/lib/libc.a(shr.o)
Notice:
...
0xfffffffff0298000 - 0xfffffffff029bfcc is .data
...
Those are the bfd section start/end addresses. It't not visible here:
...
0xf0298000 - 0xf029bfcc is .data in /usr/lib/libpthreads.a(shr_xpg5.o)
...
... just because GDB trims that number to 32-bit when printing.
GDB then fails to find the memory for libpthreads.a variables in the
core, and falls back to reading it directly from the executable (which
yields the values as originally initialized in the code).
E.g.:
(gdb) p &__n_pthreads
$2 = (<data variable, no debug info> *) 0xf074fda8 <__n_pthreads>
(gdb) p __n_pthreads
$1 = -1
That should have returned 2 instead of -1.
bfd/
2014-03-07 Pedro Alves <palves@redhat.com>
* rs6000-core.c (rs6000coff_core_p): Cast pointers to bfd_vma
through ptr_to_uint instead of through long.
This adds support for "func@localentry", an expression that returns the
ELFv2 local entry point address of function "func". I've excluded
dynamic relocation support because that obviously would require glibc
changes.
include/elf/
* ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
bfd/
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_ADDR64_LOCAL entry.
(ppc64_elf_reloc_type_lookup): Support R_PPC64_ADDR64_LOCAL.
(ppc64_elf_check_relocs): Likewise.
(ppc64_elf_relocate_section): Likewise.
* Add BFD_RELOC_PPC64_ADDR64_LOCAL.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Support @localentry.
(md_apply_fix): Support R_PPC64_ADDR64_LOCAL.
ld/testsuite/
* ld-powerpc/elfv2-2a.s, ld-powerpc/elfv2-2b.s: New files.
* ld-powerpc/elfv2-2exe.d, ld-powerpc/elfv2-2so.d: New files.
* ld-powerpc/powerpc.exp: Run new test.
elfcpp/
* powerpc.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::local, global): Support
R_PPC64_ADDR64_LOCAL.
(Target_powerpc::Relocate::relocate): Likewise.
2014-02-04 Heiher <r@hev.cc>
* elfxx-mips.c (mips_set_isa_flags): Use E_MIPS_ARCH_64R2 for
Loongson-3A.
(mips_mach_extensions): Make bfd_mach_mips_loongson_3a an
extension of bfd_mach_mipsisa64r2.
opcodes/
2014-02-04 Heiher <r@hev.cc>
* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
gas/
2014-02-04 Heiher <r@hev.cc>
* config/tc-mips.c (mips_cpu_info_table): Use ISA_MIPS64R2 for
Loongson-3A.
using Thumb2 instructions for those cores which do not support the ARM ISA.
* elf32-arm.c (elf32_thumb2_plt0_entry): New array.
(elf32_thumb2_plt_entry): New array.
(elf32_arm_create_dynamic_sections): Set PLT entry sizes when
using thumb2 based PLT.
(elf32_arm_populate_plt_entry): Handle generating Thumb2 based PLT
entries.
(elf32_arm_final_link_relocate): Do not bias jumps to Thumb based
PLT entries.
(elf32_arm_finish_dynamic_sections): Handle creation of Thumb2
based PLT 0-entry.
(elf32_arm_output_plt_map_1): Handle creation of local symbols for
Thumb2 based PLT 0-entry.
(elf32_arm_output_arch_local_syms): Handle creation of local
symbols for Thumb2 based PLT entries.
Enabled via the use of a new linker command line option: --long-plt.
* bfd-in.h: Add export of bfd_elf32_arm_use_long_plt.
* bfd-in2.h: Regenerate.
* elf32-arm.c (elf32_arm_plt_entry_long): New array.
(elf32_arm_link_hash_table_create): Set plt_entry_size to 16 if
using long PLT entries.
(bfd_elf32_arm_use_long_plt): New function.
(elf32_arm_populate_plt_entry): Add support for long PLT entries.
* emultempl/armelf.em (OPTION_LONG_PLT): Define.
(PARSE_AND_LIST_LONGOPTS): Add long-plt.
(PARSE_AND_LIST_OPTIONS): Likewise.
(PARSE_AND_LIST_ARGS_CASES): Handle long-plt.
* ld.texinfo: Document --long-plt.
* ld-arm/long-plt-format.s: New test case.
* ld-arm/long-plt-format.d: Expected disassembly.
* ld-arm/arm-elf.exp: Run the new test.
5446cbdf82 broke powerpc-lynxos,
powerpc-netware, powerpc-windiss and powerpc-vxworks.
bfd/
* elf32-ppc.c (ppc_elf_link_hash_table_create): Provide default
params for targets that don't use ppc32elf.em.
ld/
* emulparams/elf32ppcvxworks.sh: Source plt_unwind.sh and
use ppc32elf.em.
* emultempl/ppc32elf.em (ppc_after_open): Don't compile for
vxworks.
(LDEMUL_AFTER_OPEN): Don't set for vxworks.
(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Exclude
-secure-plt, -bss-plt and -sdata-got when vxworks.
Intel MPX introduces 4 bound registers, which will be used for parameter
passing in x86-64. Bound registers are cleared by branch instructions.
Branch instructions with BND prefix will keep bound register contents.
This leads to 2 requirements to 64-bit MPX run-time:
1. Dynamic linker (ld.so) should save and restore bound registers during
symbol lookup.
2. Change the current 16-byte PLT0:
ff 35 08 00 00 00 pushq GOT+8(%rip)
ff 25 00 10 00 jmpq *GOT+16(%rip)
0f 1f 40 00 nopl 0x0(%rax)
and 16-byte PLT1:
ff 25 00 00 00 00 jmpq *name@GOTPCREL(%rip)
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
which clear bound registers, to preserve bound registers.
We use 2 new relocations:
to mark branch instructions with BND prefix.
When linker sees any R_X86_64_PC32_BND or R_X86_64_PLT32_BND relocations,
it switches to a different PLT0:
ff 35 08 00 00 00 pushq GOT+8(%rip)
f2 ff 25 00 10 00 bnd jmpq *GOT+16(%rip)
0f 1f 00 nopl (%rax)
to preserve bound registers for symbol lookup and it also creates an
external PLT section, .pl.bnd. Linker will create a BND PLT1 entry
in .plt:
68 00 00 00 00 pushq $index
f2 e9 00 00 00 00 bnd jmpq PLT0
0f 1f 44 00 00 nopl 0(%rax,%rax,1)
and a 8-byte BND PLT entry in .plt.bnd:
f2 ff 25 00 00 00 00 bnd jmpq *name@GOTPCREL(%rip)
90 nop
Otherwise, linker will create a legacy PLT1 entry in .plt:
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
66 0f 1f 44 00 00 nopw 0(%rax,%rax,1)
and a 8-byte legacy PLT in .plt.bnd:
ff 25 00 00 00 00 jmpq *name@GOTPCREL(%rip)
66 90 xchg %ax,%ax
The initial value of the GOT entry for "name" will be set to the the
"pushq" instruction in the corresponding entry in .plt. Linker will
resolve reference of symbol "name" to the entry in the second PLT,
.plt.bnd.
Prelink stores the offset of pushq of PLT1 (plt_base + 0x10) in GOT[1]
and GOT[1] is stored in GOT[3]. We can undo prelink in GOT by computing
the corresponding the pushq offset with
GOT[1] + (GOT offset - &GOT[3]) * 2
Since for each entry in .plt except for PLT0 we create a 8-byte entry in
.plt.bnd, there is extra 8-byte per PLT symbol.
We also investigated the 16-byte entry for .plt.bnd. We compared the
8-byte entry vs the the 16-byte entry for .plt.bnd on Sandy Bridge.
There are no performance differences in SPEC CPU 2000/2006 as well as
micro benchmarks.
Pros:
No change to undo prelink in dynamic linker.
Only 8-byte memory overhead for each PLT symbol.
Cons:
Extra .plt.bnd section is needed.
Extra 8 byte for legacy branches to PLT.
GDB is unware of the new layout of .plt and .plt.bnd.
bfd/
* elf64-x86-64.c (elf_x86_64_bnd_plt0_entry): New.
(elf_x86_64_legacy_plt_entry): Likewise.
(elf_x86_64_bnd_plt_entry): Likewise.
(elf_x86_64_legacy_plt2_entry): Likewise.
(elf_x86_64_bnd_plt2_entry): Likewise.
(elf_x86_64_bnd_arch_bed): Likewise.
(elf_x86_64_link_hash_entry): Add has_bnd_reloc and plt_bnd.
(elf_x86_64_link_hash_table): Add plt_bnd.
(elf_x86_64_link_hash_newfunc): Initialize has_bnd_reloc and
plt_bnd.
(elf_x86_64_copy_indirect_symbol): Also copy has_bnd_reloc.
(elf_x86_64_check_relocs): Create the second PLT for Intel MPX
in 64-bit mode.
(elf_x86_64_allocate_dynrelocs): Handle the second PLT for IFUNC
symbols. Resolve call to the second PLT if it is created.
(elf_x86_64_size_dynamic_sections): Keep the second PLT section.
(elf_x86_64_relocate_section): Resolve PLT references to the
second PLT if it is created.
(elf_x86_64_finish_dynamic_symbol): Use BND PLT0 and fill the
second PLT entry for BND relocation.
(elf_x86_64_finish_dynamic_sections): Use MPX backend data if
the second PLT is created.
(elf_x86_64_get_synthetic_symtab): New.
(bfd_elf64_get_synthetic_symtab): Likewise. Undefine for NaCl.
ld/
* emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): New.
ld/testsuite/
* ld-x86-64/mpx.exp: Run bnd-ifunc-1 and bnd-plt-1.
* ld-x86-64/bnd-ifunc-1.d: New file.
* ld-x86-64/bnd-ifunc-1.s: Likewise.
* ld-x86-64/bnd-plt-1.d: Likewise.
This patch allows the user to override powerpc64-ld's default for
providing linker generated register save and restore functions as used
by gcc -Os code. Normally these are not provided by ld -r, so Linux
kernel modules have needed to include their own copies.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Add save_restore_funcs.
* elf64-ppc.c (ppc64_elf_func_desc_adjust): Use it to control
provision of out-of-line register save/restore routines.
ld/
* emultempl/ppc64elf.em (params): Init new field.
(ppc_create_output_section_statements): Set params.save_restore_funcs
default.
(PARSE_AND_LIST_*): Add support for --save-restore-funcs and
--no-save-restore-funcs.
execute permission regardless of the underlying PT_LOAD segment permissions.
Deleting this code allows the default linker behavior which is to set the
dynamic segment to the same permissions as the sections that make it up.
This change alters one existing test case to check the segment flags for
PT_DYNAMIC.
bfd/ChangeLog
* elfxx-mips.c(_bfd_mips_elf_modify_segment_map): Deleted hard coding of
PT_DYNAMIC segment flags.
ld/testsuite/ChangeLog
* ld-mips-elf/pic-and-nonpic-3a.sd: Check DYNAMIC segment flags.
abfd->section_count unexpectedly changes between 218 and 248 in:
150 bfd_simple_get_relocated_section_contents (bfd *abfd,
[...]
218 saved_offsets = malloc (sizeof (struct saved_output_info)
219 * abfd->section_count);
[...]
230 _bfd_generic_link_add_symbols (abfd, &link_info);
[...]
248 bfd_map_over_sections (abfd, simple_restore_output_info, saved_offsets);
_bfd_generic_link_add_symbols increases section_count
and simple_restore_output_info later reads unallocated part of saved_offsets.
READ of size 8 at 0x601c0000c5c0 thread T0
#0 0x1124770 in simple_restore_output_info (.../gdb/gdb+0x1124770)
#1 0x10ecd51 in bfd_map_over_sections (.../gdb/gdb+0x10ecd51)
#2 0x1125150 in bfd_simple_get_relocated_section_contents (.../gdb/gdb+0x1125150)
bfd/
2014-02-17 Jan Kratochvil <jan.kratochvil@redhat.com>
PR binutils/16595
* simple.c (struct saved_offsets): New.
(simple_save_output_info): Use it for ptr.
(simple_restore_output_info): Use it for ptr. Check section_count.
(bfd_simple_get_relocated_section_contents): Use it for saved_offsets.
Moves assorted variables used to communicate between ld and bfd into
a struct, hooks it into the bfd link_hash_table early, and removes
all other places where such variables were passed piecemeal.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Define.
(ppc64_elf_init_stub_bfd, ppc64_elf_edit_opd, ppc64_elf_tls_setup,
ppc64_elf_setup_section_lists, ppc64_elf_size_stubs,
ppc64_elf_build_stubs): Update prototype.
* elf64-ppp.c (struct ppc_link_hash_table): Add params, delete other
fields now in params. Adjust code throughout file.
(ppc64_elf_init_stub_bfd): Delete "abfd" parameter, add "params".
Save params pointer in htab.
(ppc64_elf_edit_opd, ppc64_elf_tls_setup,
ppc64_elf_setup_section_lists, ppc64_elf_size_stubs,
ppc64_elf_build_stubs): Remove parameters now in "params".
ld/
* emultemps/ppc64elf.em (params): New static struct replacing
various other static vars. Adjust code throughout file.
This fixes the glaring error that the ppc476 workaround wasn't
actually enabled for ld -r, and adjusts relocations to match moved
code.
bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Move relocs on insns
patched for ppc476 workaround. Reapply branch taken/not taken
relocs.
ld/
* emultempl/ppc32elf.em (ppc_after_open_output): Really enable
ppc476 workaround for ld -r.
Adding long-branch stubs for __tls_get_addr calls that are optimised
away is silly. It also causes assertion failures on newer object files
that use R_PPC_TLSGD and R_PPC_TLSLD marker relocs, and half-optimised
(ie. broken) code for older object files.
PR 16546
* elf32-ppc.c (ppc_elf_relax_section): Don't build long-branch
stubs for calls to __tls_get_addr that we know will later be
optimised away.
The Linux kernel builds modules using ld -r. These might need the
ppc476 workaround, so enable it for ld -r if sections have sufficient
alignment to tell location within a page.
bfd/
* elf32-ppc.c (ppc_elf_relax_section): Enable ppc476 workaround
for ld -r, when code sections are sufficiently aligned.
* elf32-ppc.h (struct ppc_elf_params): Delete pagesize. Add
pagesize_p2.
ld/
* emultempl/ppc32elf.em (pagesize): New static var.
(ppc_after_open_output): Set params.pagesize_p2 from pagesize.
(PARSE_AND_LIST_ARGS_CASES): Adjust to use pagesize.
For powerpc64 as HJ did earlier for other ELF targets, and a tidy.
PR gold/15530
* elf64-ppc.c (ppc64_elf_gc_mark_dynamic_ref): Support
--export-dynamic and --dynamic-list marking of symbols.
* elflink.c (bfd_elf_gc_mark_dynamic_ref_symbol): Reorder
cheap tests first.
This patch provides a means for backend relax_section support to
increase the size of a section without needing to reallocate
section contents. This helps reduce memory usage when the added space
does not need to be written in relax_section, as is the case for
powerpc. Writing the stubs later means a few tweaks are needed in the
powerpc relocate_section function, but also removes some code
duplication since the extra ld -r relocs can be written there too.
* elf-bfd.h (struct elf_backend_data): Add caches_rawsize.
* elfxx-target.h (elf_backend_caches_rawsize): Define.
(elfNN_bed): Init new field.
* elflink.c (elf_link_input_bfd): Handle caches_rawsize.
* elf32-ppc.c (shared_stub_entry): Zero addi offset.
(ppc_elf_relax_section): Don't reallocate section here, write
stubs, or write out relocs for ld -r here..
(ppc_elf_relocate_section): ..instead write stubs here, and use
existing code to write out relocs for ld -r. Fix offset
adjustment on reloc for little-endian.
(elf_backend_caches_rawsize): Define.
bfd/
2014-02-04 Jan Kratochvil <jan.kratochvil@redhat.com>
* coff-rs6000.c (xcoff_write_archive_contents_big): Free OFFSETS in
return paths. Three times.
* elf64-ppc.c (ppc64_elf_link_hash_table_create): Free HTAB in all
return paths.
(ppc64_elf_tls_optimize): Free TOC_REF in return path.
(ppc64_elf_edit_toc): Free USED in return path.
This implements a work-around for an icache bug on 476 that can cause
execution of stale instructions when control falls through from one
page to the next. The idea is to prevent such fall-through by
replacing the last instruction on a page with a branch to a patch
area containing the instruction, then branch to the next page.
The patch also fixes a number of bugs in the existing support for long
branch trampolines.
bfd/
* elf32-ppc.c (struct ppc_elf_link_hash_table): Add params.
Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses.
(ppc_elf_link_params): New function.
(ppc_elf_create_glink): Align .glink to 64 bytes for ppc476
workaround.
(ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms
parameters. Use htab->params instead.
(ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter.
(ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to
64 bytes for ppc476 workaround.
(struct ppc_elf_relax_info): New.
(ppc_elf_relax_section): Exclude linker created sections and
those too small to hold one instruction. Don't add another
branch around trampolines on later relax passes. Don't
generate trampolines for undefined symbols when !relocatable,
nor for plugin symbols. Allocate space for ppc476 workaround
patch area. Free fixups on error return path.
(ppc_elf_relocate_section): Handle ppc476 workaround patching.
* elf32-ppc.h (struct ppc_elf_params): New.
(ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype.
(ppc_elf_link_params): Declare.
* section.c (SEC_INFO_TYPE_TARGET): Define.
* bfd-in2.h: Regenerate.
ld/
* emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms)
plt_style): Delete. Adjust all refs to instead use..
(params): ..this. New variable.
(ppc_after_open_output): New function. Tweak params and pass to
ppc_elf_link_params.
(ppc_after_open): Adjust ppc_elf_select_plt_layout call.
(ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable
relaxation for ppc476 workaround.
(PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support.
(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
ELFOSABI_GNU for binaries containing unique symbols. So I am reverting that patch and
instead applying the patch below to fix up the targets that were triggering the test failure.
bfd/ChangeLog
2014-01-29 Nick Clifton <nickc@redhat.com>
* elf32-metag.c (elf_metag_post_process_headers): Call
_bfd_elf_post_process_headers.
* elf32-sh64.c (sh64_elf_copy_private_data): Call
_bfd_elf_copy_private_data.
* elf64-sh64.c (sh_elf64_copy_private_data_internal): Likewise.
binutils/testsuite/ChangeLog
2014-01-29 Nick Clifton <nickc@redhat.com>
* binutils-all/strip-10.d: Revert previous delta.
abbreviation may not be the current CU. Thus we need to make sure
that when we read the abbreviation we use the correct CU.
* dwarf2.c (find_abstract_instance_name): For DW_FORM_ref_addr
attributes select the CU containing the abbreviation, which may not
be the current CU.
ELFv2 needs fewer relocs to annotate plt call stubs. I correctly
allocated a smaller buffer and wrote the proper relocs, but stupidly
bumped the reloc count as for ELFv1.
* elf64-ppc.c (ppc_build_one_stub): Correct reloc count passed
to get_relocs for ELFv2.
Bad linker script may lead to TLS sections separated by non-TLS sections
in output. This patch changes linker assert to a linker error to
provide better linker diagnosis.
PR ld/16498
* elf.c (_bfd_elf_map_sections_to_segments): Issue a linker error
if TLS sections are not adjacent.
Adds a section for --as-needed libraries to a linker map file, similar
to what we do for archive libraries.
bfd/
* elflink.c (elf_link_add_object_symbols): Call minfo for --as-needed.
ld/
* ldlang.c (asneeded_list_head, asneeded_list_tail): New vars.
(lang_init): Initialise them.
(lang_print_asneeded): New function.
(lang_process): Call lang_print_asneeded.
* ldlang.h (struct asneeded_minfo): New.
(asneeded_list_tail): Declare.
* ldmain.c (add_archive_element): Improve archive map heading.
* ldmisc.c (minfo): Stash --as-needed info.
After resolving a versioned reference, foo@VER1, to a default versioned
definition, foo@@VER1, from a shared object, we also merge it with
the existing regular default symbol definition, foo. When foo is IFUNC
and foo@@VER1 aren't, we will merge 2 incompatible definitions. This
patch avoids merging foo@@VER1 definition with foo definition if
one is IFUNC and the other isn't.
There is nothing linker can do when a type mismatched default definition
are made dynamic by info->shared, info->export_dynamic or h->ref_dynamic.
But we do want to avoid exporting it when building PIE. Let's remove
those checks.
bfd/
PR ld/2404
* elflink.c (_bfd_elf_merge_symbol): Don't check info->shared,
info->export_dynamic, nor !h->ref_dynamic for type mismatch when
adding the default version.
ld/testsuite/
PR ld/2404
* ld-elf/shared.exp: Add a PIE test for PR ld/2404.
When a symbol is absolute, this code in mips_elf_record_got_page_entry
entry = bfd_zalloc (sec->owner, sizeof (*entry));
segfaults. sec == bfd_abs_section_ptr and sec->owner == NULL.
* elfxx-mips.c (mips_elf_record_got_page_entry): Pass in a
mips_elf_traverse_got_arg* rather than mips_got_info*.
Adjust caller. Alloc on output_bfd rather than symbol section
owner.
It has been fixed by
commit 4199e3b866
Author: Alan Modra <amodra@gmail.com>
Date: Wed Jan 15 21:50:55 2014 +1030
non-PIC references to __ehdr_start in pie and shared
Rather than hacking every backend to not discard dynamic relocations
against an undefined hidden __ehdr_start, make it appear to be defined
early. We want __ehdr_start hidden before size_dynamic_sections so
that it isn't put in .dynsym, but we do need the dynamic relocations
for a PIE or shared library with a non-PIC reference. Defining it
early is wrong if we don't actually define the symbol later to its
proper value. (In some cases we want to leave the symbol undefined,
for example, when the ELF header isn't loaded, and we don't have this
infomation available in before_allocation.)
* elf32-i386.c (elf_i386_allocate_dynrelocs): Revert the last
change.
* elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewise.
__ehdr_start will be defined by assign_file_positions_for_non_load_sections
later.
PR ld/16428
* elf32-i386.c (elf_i386_allocate_dynrelocs): Don't discard relocs
against __ehdr_start.
* elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewise.
