* sparc-opc.c (sparc_opcodes): Fix random instruction to write
to a float instead of an integer register.
gas/testsuite/
* gas/sparc/hpcvis3.s: Update to use float reg for random insn.
* gas/sparc/hpcvis3.d: Likewise.
opcodes/
* sparc-opc.c (sparc_opcodes): Add integer multiply-add
instructions.
gas/testsuite/
* gas/sparc/ima.d: New test.
* gas/sparc/ima.s: New test source.
* gas/sparc/sparc.exp: Run new test.
* sparc-opc.c (sparc_opcodes): Add entry for 'save simm13,regrs1,regrd'
This has been reported as being accepted by the Sun assmebler.
gas/testsuite/
* gas/sparc/save-args.[sd]: New test.
* gas/sparc/sparc.exp: Run new test.
The changes below bring 'mov' and 'ticc' instructions into line
with the V8 SPARC Architecture Manual.
* sparc-opc.c (sparc_opcodes): Add entry for 'ticc imm + regrs1'.
* sparc-opc.c (sparc_opcodes): Add alias entries for
'mov regrs2,%asrX'; 'mov regrs2,%y'; 'mov regrs2,%prs';
'mov regrs2,%wim' and 'mov regrs2,%tbr'.
* sparc-opc.c (sparc_opcodes): Move/Change entries for
'mov imm,%asrX'; 'mov imm,%y'; 'mov imm,%prs'; 'mov imm,%wim'
and 'mov imm,%tbr'.
* sparc-opc.c (sparc_opcodes): Add wr alias entries to match above
mov aliases.
gas/testsuite/
* gas/sparc/ticc-imm-reg.[sd]: New test.
* gas/sparc/v8-movwr-imm.[sd]: New test.
* gas/sparc/sparc.exp: Run new tests.
* sparc.h: Document new format codes '4', '5', and '('.
(OPF_LOW4, RS3): New macros.
opcodes/
* sparc-dis.c (v9a_ast_reg_names): Add "cps".
(X_RS3): New macro.
(print_insn_sparc): Handle '4', '5', and '(' format codes.
Accept %asr numbers below 28.
* sparc-opc.c (sparc_opcodes): Add entries for HPC and VIS3
instructions.
gas/
* config/tc-sparc.c (v9a_asr_table): Add "cps".
(sparc_ip): Handle '4', '5' and '(' format codes.
gas/testsuite
* gas/sparc/hpcvis3.d: New test.
* gas/sparc/hpcvis3.s: New test source.
* gas/sparc/sparc.exp: Run new test.
* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
(v9_hpriv_reg_names): New table.
(print_insn_sparc): Allow values up to 16 for '?' and '!'.
New cases '$' and '%' for read/write hyperprivileged register.
* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
window handling and rdhpr/wrhpr instructions.
(fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
suffix. Use fmov*x macros, create all 3 fpsize variants in one
macro. Adjust all users.
