PKE tests run identically on SPARC/Solaris and x86/Linux.
* sky-pke.c (pke_io_{read,write}_buffer): Endianness fixes aka
"E-fixes" in register and FIFO read/writes.
(pke_code_{pkemscalf,pkemscal}): E-fixes in VU CIA setting.
(pke_code_{mpg,unpack}): E-fixes in VU memory & tracking updates.
(pke_code_direct): E-fixes in GPUIF FIFO stuffing.
* sky-pke.h (PKE_MEM_WRITE): E-fixes in trace file writing.
* sky-vu0.c (vu0_attach): Allocate micro/data memory with zalloc
to guarantee sufficient (16-byte) alignment.
* sky-vu1.c (vu1_attach): Ditto.
(vu1_io_read_register_window): *PARTIAL* E-fixes in register accesses.
* sky-libvpe.c (gif_write): E-fixes in GPUIF FIFO stuffing.
* sky-gpuif.c (gif_io_{read,write}_buffer): E-fixes in
register and FIFO read/writes.
* sky-dma.c (do_dma_transfer_tag): E-fixes in tag reading.
mechanism is starting to subside.
* sky-pke.h (PKE_FLAG_INT_NOLOOP): Added device flag to indicate
presence of stalled & interrupted PKEcode.
* sky-pke.c (pke_issue): Added PKEcode interrupt bit handling.
(pke_flip_dbf): Changed double-buffering logic to match SCEI
clarification.
(pke_code_*): Added interrupt bit stalling clause.
(pke_code_pkems*): Added ITOP/ITOPS transmission code.
(pke_code_unpack): Added more careful logic for processing
overflows of VU data memory addresses.
* sky-pke.h (PKE_MEM_READ): Removed "read" entry from FIFO trace.
* sky-pke.c (pke_attach): Set trace file to line buffering iff
open.
(pke_io_read_buffer, pke_io_write_buffer): Handle erroneous
reads/writes by zero-padding.
(pke_io_write_buffer): Switch to more bit-field definition macros.
(pke_issue): Remove "stalled" entry from FIFO trace.
(pke_pc_advance): Correct logic for DMA-tag-skipping, PKEcode
classification.
(pke_code_mskpath3): Sketch of possible PATH3 masking method.
(pke_code_mpg): Keep order of lower/upper VU words as supplied.
(pke_code_unpack): Logic change for wl/cl/num unpacking. Weird.
little struct.
interp.c: Update. Also add floating point Max/Min functions.
mips.igen: Remove r5900 tag from any floating point instructions.
r5900.igen: Rewrite. Implement *all* floating point insns (except ld/st).
r5400.igen: Tag mdmx functions as being mdmx specific.
were hammered in today's runs. Work is beginning in endian-proofing
the code.
* sky-pke.c (pke1_issue): Issue on correct PKE device.
(pke_io_write_buffer, pke_code_mpg, pke_code_unpack): Perform more
endian conversions.
(pke_code_mpg, pke_code_direct): Add operand alignment assertions.
(pke_code_mpg): Correct VU stall checks. Correct VU opcode
transfer ordering.
(pke_code_direct): Correct typos in DIRECT operand accessing.
(pke_code_unpack): Correct conditional sign-extension handling.
* sky-gpuif.c (gif_io_read_buffer, gif_io_write_buffer): Correct
assertion polarity.
(gif_read_tag): Disable faulty DMA-tag testing code.
the SCEI PKE simulator's output on its own test sample (tsv432.in).
* sky-pke.h (PKE_MEM_READ, PKE_MEM_WRITE, PKE_REG_MASK_SET): Add
trace file records.
* sky-pke.c: (pke_track_write): Removed function. Replaced with
in-line modifications to VU tracking tables.
(pke_attach): Attach VU tracking tables. Use line buffering on
trace files.
(pke_issue): Spit out additional trace records.
(pke_pc_operand_bits): Correct bitfield masking error.
(*): Replace sim_read/write with kludge PKE_MEM_READ/WRITE
throughout.
(pke_code_unpack): Correct numerous small bugs in operand decoding
etc.
A few PKE instructions even run correctly! Next missing function of
interest: FIFO pruning.
* sky-pke.c (pke_issue): Take extra SIM_DESC argument.
(pke_attach): Attach correct PKE0/PKE1 device. Open trace file if
VIF{0,1}_TRACE_FILE env. var. is defined.
(pke_io_write_buffer): Classify words in FIFO quadword. Use
kludgey sim_core routines to access DMA registers.
(pke_pc_advance): Add PKEcode classification. Correct DMA tag
skipping. Emit trace records.
(pke_pc_fifo): Add PKEcode operand classification.
(pke_check_stall): Perform stall checks against updated register
scheme.
(pke_code_unpack): Correct operand-count calculation.
(pke_code_stmask): Correct instruction skipping.
* sky-pke.h (PKE_MEM_WRITE, PKE_MEM_READ): New kludge macros.
(BIT_MASK_BTW): Corrected off-by-one error.
(enum wordclass): Classify words in a FIFO quadword.
* sky-dma.c (dma_io_read_buffer): Correct address checking assertions.
* sky-engine.c (engine_run): Pass along SIM_DESC to PKE
instruction issue code.
* handling of super duper packed UNPACK arguments
* skipping of in-progress instruction on break/stop
* interrupt generation to 5900
* PATH2/PATH3 status checking & masking
* ability to write to FIFO one word (instead of quadword) at a time
update v850, tic80 and mips simulators.
IGEN - Prepend prefix to more generated symbols and macros
(idecode_issue, instruction_word).
IGEN - Add -Wnowith option to supress warnings about word size
inflicts in input files.
MIPS - Clean up Makefile.in, m16.igen, m16.dc (new), m16run.c (new) so
that a mips16 simulator built using IGEN can be compiled.
Use the bfd-processor name in the sim-engine switch.
Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
Update
mips: Fill in bfd-processor field of model records so that
they match ../bfd/archures.
For sim/mips, enable multi-sim support when mips64vr5400-elf is target.
For sim/igen, allow specification of a default machine (will need
more work later).
(ANDI): Was missing mipsIV model, fix assembler syntax.
(do_c_cond_fmt): New function.
(C.cond.fmt): Handle mips I-III which do not support CC field
separatly.
(bc1): Handle mips IV which do not have a delaed FCC separatly.
(SDR): Mask paddr when BigEndianMem, not the converse as specified
in IV3.2 spec.
(DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
vr5000 which saves LO in a GPR separatly.
* configure.in (enable-sim-igen): For vr5000, select vr5000
specific instructions.
* configure: Re-generate.
MIPS simulator so that correctly writes the value of CIA back int PC
(the global previously used) when the simulation halts.
Fix implementation of DELAY_SLOT and NULLIFY_NEXT_INSTRUCTION macros.
calls) and sim_open so that they uses the virtual memory data transfer
functions sim_read & sim_write. This eliminates all code (other than
in load_memory & store_memory) that makes assumptions about the
implementation of the underlying memory model.
When address translation of insn fetch fails raise exception immediatly.
Use address_word as type of all address variables (instead of unsigned64),
the former is configured as either 32 or 64 bit type.
Always compile fpu code (no #if has fpu)
