registers. Update data sets with the new v2_double element in the
VSX register union. Add vector_register3_vr data set for the AltiVec
registers. Use gdb_test_no_output instead of send_gdb.
gdb
* c-valprint.c (c_val_print): Fix printing of character vectors.
gdb/testsuite
* gdb.arch/altivec-abi.exp: Fix expect pattern of character vectors.
* spu-multiarch.c (spu_xfer_partial): Wrap around local store
limit on local store memory accesses.
* spu-linux-nat.c (spu_xfer_partial): Likewise.
* spu-tdep.c (spu_lslr): Remove.
(spu_pointer_to_address): Do not truncate addresses.
(spu_integer_to_address): Likewise.
(spu_overlay_new_objfile): Use SPU_OVERLAY_LMA.
* spu-tdep.h: Add comments.
(SPUADDR_SPU): Respect SPU_OVERLAY_LMA bit.
(SPU_OVERLAY_LMA): Define.
gdbserver/ChangeLog:
* spu-low.c (spu_read_memory): Wrap around local store limit.
(spu_write_memory): Likewise.
testsuite/ChangeLog:
* gdb.arch/spu-ls.exp: New file.
* gdb.arch/spu-ls.c: Likewise.
arm_pc_is_thumb.
(arm_pc_is_thumb): Use arm_find_mapping_symbol.
(extend_buffer_earlier): New function.
(MAX_IT_BLOCK_PREFIX, IT_SCAN_THRESHOLD): New constants.
(arm_adjust_breakpoint_address): New function.
(arm_gdbarch_init): Register arm_adjust_breakpoint_address.
testsuite/
* gdb.arch/thumb2-it.S (it_breakpoints): New function.
* gdb.arch/thumb2-it.exp (test_it_break): New function.
(Top level): Call it.
(arm_linux_thumb2_le_breakpoint): New constants.
(arm_linux_init_abi): Set thumb2_breakpoint and
thumb2_breakpoint_size.
* arm-tdep.c (thumb_insn_size, thumb_advance_itstate): New functions.
(thumb_get_next_pc): Add a comment. Rename IT to ITSTATE.
Implement support for single stepping through IT blocks if
a 32-bit Thumb breakpoint instruction is available.
(arm_breakpoint_from_pc): If a 32-bit Thumb breakpoint instruction
is available, use it when needed.
(arm_remote_breakpoint_from_pc): New function.
(arm_gdbarch_init): Register arm_remote_breakpoint_from_pc.
* arm-tdep.h (struct gdbarch_tdep): Correct thumb_breakpoint
comment. Add thumb2_breakpoint and thumb2_breakpoint_size.
gdbserver/
* linux-arm-low.c (thumb_breakpoint_len): Delete.
(thumb2_breakpoint): New.
(arm_breakpoint_at): Check for Thumb-2 breakpoints.
testsuite/
* gdb.arch/thumb2-it.S, gdb.arch/thumb2-it.exp: New files.
* gdb.base/breakpoint-shadow.exp: Move the ia64 part into ...
* gdb.arch/ia64-breakpoint-shadow.exp: ... a new file, with new tests.
* gdb.arch/ia64-breakpoint-shadow.S: New file.
Fix memory access from signed 32bit inferior registers on 64bit GDB.
* linux-nat.c (linux_xfer_partial <TARGET_OBJECT_MEMORY>): New variable
addr_bit. Mask OFFSET by the ADDR_BIT width.
gdb/testsuite/
* gdb.arch/amd64-i386-address.exp, gdb.arch/amd64-i386-address.S: New.
All callers updated.
(amd64_get_insn_details): Handle more 3-byte opcode insns.
(amd64_breakpoint_p): Delete.
(amd64_displaced_step_fixup): When fixing up after stepping an int3,
don't back up pc to the start of the int3.
* i386-tdep.c: #include opcode/i386.h.
(i386_skip_prefixes): New function.
(i386_absolute_jmp_p): Constify argument.
(i386_absolute_call_p,i386_ret_p,i386_call_p,i386_syscall_p): Ditto.
(i386_breakpoint_p): Delete.
(i386_displaced_step_fixup): Handle unnecessary or redundant prefixes.
When fixing up after stepping an int3, don't back up pc to the start
of the int3.
* gdb.arch/amd64-disp-step.S (test_int3): New test.
* gdb.arch/amd64-disp-step.exp (test_int3): New test.
* gdb.arch/i386-disp-step.S (test_prefixed_abs_jump): New test.
(test_prefixed_syscall,test_int3): New tests.
* gdb.arch/i386-disp-step.exp (test_prefixed_abs_jump): New test.
(test_prefixed_syscall,test_int3): New tests.
(EAX_REG_NUM,ECX_REG_NUM,EDX_REGNUM,EBX_REG_NUM,ESI_REG_NUM)
(EDI_REG_NUM): New macros.
(MODRM_MOD_FIELD,MODRM_REG_FIELD,MODRM_RM_FIELD): New macros.
(SIB_SCALE_FIELD,SIB_INDEX_FIELD,SIB_BASE_FIELD): New macros.
(REG_PREFIX_P): New macro.
* amd64-tdep.h (amd64_displaced_step_copy_insn): Declare.
(amd64_displaced_step_fixup): Declare.
* amd64-tdep.c: #include opcode/i386.h, dis-asm.h.
(amd64_arch_regmap): Move out of amd64_analyze_stack_align
and make static global.
(amd64_arch_regmap_len): New static global.
(amd64_arch_reg_to_regnum): New function.
(struct amd64_insn): New struct.
(struct displaced_step_closure): New struct.
(onebyte_has_modrm,twobyte_has_modrm): New static globals.
(rex_prefix_p,skip_prefixes)
(amd64_insn_length_fprintf,amd64_insn_length_init_dis)
(amd64_insn_length,amd64_get_unused_input_int_reg)
(amd64_get_insn_details,fixup_riprel,fixup_displaced_copy)
(amd64_displaced_step_copy_insn)
(amd64_absolute_jmp_p,amd64_absolute_call_p,amd64_ret_p)
(amd64_call_p,amd64_breakpoint_p,amd64_syscall_p)
(amd64_displaced_step_fixup): New functions.
* amd64-linux-tdep.c: #include arch-utils.h.
(amd64_linux_init_abi): Install displaced stepping support.
* gdb.arch/amd64-disp-step.S: New file.
* gdb.arch/amd64-disp-step.exp: New file.
* gdb.arch/i386-disp-step.S: New file.
* gdb.arch/i386-disp-step.exp: New file.
* ppc-linux-nat.c (ppc_register_u_addr): Add special case to return
offset for full 64-bit slot of FPSCR when in 32-bits.
(ppc_linux_read_description): Return target description with 64-bit
FPSCR when inferior is running on an ISA 2.05 or later processor.
* ppc-linux-tdep.c (_initialize_ppc_linux_tdep): Call
initialize_tdec_powerpc_isa205_32l,
initialize_tdec_powerpc_isa205_altivec32l,
initialize_tdec_powerpc_isa205_vsx32l,
initialize_tdec_powerpc_isa205_64l,
initialize_tdec_powerpc_isa205_altivec64l and
initialize_tdec_powerpc_isa205_vsx64l.
* ppc-linux-tdep.h: Add external declaration for
tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_altivec32l,
tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_isa205_64l,
tdesc_powerpc_isa205_altivec64l and tdesc_powerpc_isa205_vsx64l.
* features/rs600/powerpc-fpu-isa205.xml: New file.
* features/rs600/powerpc-isa205-32l.xml: New file.
* features/rs600/powerpc-isa205-64l.xml: New file.
* features/rs600/powerpc-isa205-altivec32l.xml: New file.
* features/rs600/powerpc-isa205-altivec64l.xml: New file.
* features/rs600/powerpc-isa205-vsx32l.xml: New file.
* features/rs600/powerpc-isa205-vsx64l.xml: New file.
* features/rs600/powerpc-isa205-32l.c: Generate.
* features/rs600/powerpc-isa205-64l.c: Generate.
* features/rs600/powerpc-isa205-altivec32l.c: Generate.
* features/rs600/powerpc-isa205-altivec64l.c: Generate.
* features/rs600/powerpc-isa205-vsx32l.c: Generate.
* features/rs600/powerpc-isa205-vsx64l.c: Generate.
gdb/testsuite/
* gdb.arch/ppc-dfp.exp: New file.
* gdb.arch/ppc-dfp.c: New file.
(stack_check_probe_2, stack_check_probe_loop_1)
(stack_check_probe_loop_2): New functions.
(main): Add call to these new functions.
* gdb.arch/powerpc-aix-prologue.exp: When breaking on these
functions, check that the breakpoint is inserted at the appropriate
location.
(insert_breakpoint): Slightly refine this procedure so that it can
be called several times in the test.
non-permanent breakpoints.
(bpstat_stop_status): Change enable_state to bp_disabled only for
non-permanent breakpoints.
(bp_loc_is_permanent): New function.
(create_breakpoint): Check if the location points to a permanent
breakpoint and if it does, make breakpoint permanent.
(update_breakpoint_locations): Make sure new locations of permanent
breakpoints are properly initialized.
* i386-tdep.c (i386_skip_permanent_breakpoint): New function.
(i386_gdbarch_init): Set gdbarch_skip_permanent_breakpoint.
* gdb.arch/i386-bp_permanent.exp: New test.
lr_register.
(rs6000_in_function_epilogue_p): Check for bctr.
(skip_prologue): Initialize lr_register. Set lr_reg to a register
number. Set gpr_mask and used_bl. Continue scanning while some
expected registers are not saved. Set lr_register if LR is not
stored.
(rs6000_frame_cache): Handle gpr_mask and lr_register.
* gdb.arch/powerpc-prologue.exp: Correct saved registers.
Include "features/rs6000/powerpc-vsx64.c".
(ppc_supply_vsxregset): New function.
(ppc_collect_vsxregset): New function.
(IS_VSX_PSEUDOREG): New macro.
(IS_EFP_PSEUDOREG): New macro.
(vsx_register_p): New function.
(ppc_vsx_support_p): New function.
(rs6000_builtin_type_vec128): New function.
(rs6000_register_name): Hide upper halves of vs0~vs31. Return
correct names for VSX registers and EFPR registers.
(rs6000_pseudo_register_type): Return correct types for VSX
and EFPR registers.
(rs6000_pseudo_register_reggroup_p): Return correct group for
VSX and EFPR registers.
(ppc_pseudo_register_read): Rename to dfp_pseudo_register_read.
(ppc_pseudo_register_write): Rename to dfp_pseudo_register_write.
(vsx_pseudo_register_read): New function.
(vsx_pseudo_register_write): New function.
(efpr_pseudo_register_read): New function.
(efpr_pseudo_register_write): New function.
(rs6000_pseudo_register_read): Call new VSX and EFPR read functions.
(rs6000_pseudo_register_write): Call new VSX and EFPR write functions.
(rs6000_gdbarch_init): Declare have_vsx.
Initialize new upper half VSX registers.
Initialize VSX-related and EFPR-related pseudo-registers variables.
Adjust the number of pseudo registers accordingly.
* ppc-linux-nat.c: Define PTRACE_GETVSXREGS, PTRACE_SETVSXREGS
and SIZEOF_VSRREGS.
(gdb_vsxregset_t): New type.
(have_ptrace_getsetvsxregs): New variable.
(fetch_vsx_register): New function.
(fetch_register): Handle VSX registers.
(fetch_vsx_registers): New function.
(fetch_ppc_registers): Handle VSX registers.
(store_ppc_registers): Handle VSX registers.
(store_vsx_register): New function.
(store_register): Handle VSX registers.
(store_vsx_registers): New function.
(ppc_linux_read_description): Handle VSX-enabled inferiors.
(gdb_vsxregset_t): New type.
(supply_vsxregset): New function.
(fill_vsxregset): New function.
* ppc-tdep.h (vsx_register_p): New prototype.
(vsx_support_p): New prototype.
(ppc_vsr0_regnum): New variable.
(ppc_vsr0_upper_regnum): Likewise.
(ppc_efpr0_regnum): Likewise.
(ppc_builtin_type_vec128): New type.
(ppc_num_vsrs): New constant.
(ppc_num_vshrs): New constant.
(ppc_num_efprs): Likewise.
Define POWERPC_VEC_VSX PPC_VSR0_UPPER_REGNUM and PPC_VSR31_UPPER_REGNUM.
(ppc_supply_vsxregset): New prototype.
(ppc_collect_vsxregset): New prototype.
* ppc-linux-tdep.c: Include "features/rs6000/powerpc-vsx32l.c"
Include "features/rs6000/powerpc-vsx64l.c".
(_initialize_ppc_linux_tdep): Initialize VSX-enabled targets.
(ppc_linux_regset_sections): Add new ".reg-ppc-vsx" field.
(ppc32_linux_vsxregset): New 32-bit VSX-enabled regset.
(ppc_linux_regset_from_core_section): Handle VSX core section.
(ppc_linux_core_read_description): Support VSX-enabled core files.
* ppc-linux-tdep.h: Declare *tdesc_powerpc_vsx32l
Declare tdesc_powerpc_vsx64l
* corelow.c (get_core_register_section): Support VSX-enabled
core files.
* features/rs6000/power-vsx.xml: New VSX descriptions.
* features/rs6000/powerpc-vsx32.xml: New file.
* features/rs6000/powerpc-vsx32l.xml: New file.
* features/rs6000/powerpc-vsx64.xml: New file.
* features/rs6000/powerpc-vsx64l.xml: New file.
* features/rs6000/powerpc-vsx32.c: New file (generated).
* features/rs6000/powerpc-vsx32l.c: New file (generated).
* features/rs6000/powerpc-vsx64.c: New file (generated).
* features/rs6000/powerpc-vsx64l.c: New file (generated).
* features/Makefile: Updated with new descriptions.
* regformats/rs6000/powerpc-vsx32l.dat: New file (generated).
* regformats/rs6000/powerpc-vsx64l.dat: New file (generated).
* testsuite/gdb.arch/vsx-regs.c: New source file.
* testsuite/gdb.arch/vsx-regs.exp: New testcase.
* testsuite/lib/gdb.exp (skip_vsx_tests): New function.
* spu-tdep.c (info_spu_dma_cmdlist): Only show entries with
the valid bit set. Ensure display order respects partial
order defined by dependency bits.
testsuite/ChangeLog:
* gdb.arch/spu-info.exp: Updated for "info spu dma" changes.
* arm-tdep.c (arm_frame_is_thumb): New.
(arm_pc_is_thumb): Clarify comment.
(thumb_analyze_prologue): Remove PC special case.
(thumb_scan_prologue): Take a block_addr argument. Use it for
find_pc_partial_function. Remove unused variables.
(arm_scan_prologue): Use arm_frame_is_thumb. Use the block address
for find_pc_partial_function. Remove PC special case.
(arm_prologue_prev_register): Add special handling for PC and CPSR.
(arm_dwarf2_prev_register, arm_dwarf2_frame_init_reg): New.
(arm_get_next_pc): Use arm_frame_is_thumb.
(arm_write_pc): Use CPSR_T instead of 0x20.
(arm_gdbarch_init): Call dwarf2_frame_set_init_reg.
* arm-tdep.h (enum gdb_regnum): Add ARM_CPSR_REGNUM.
(CPSR_T): Define.
* dwarf2-frame.c (dwarf2_frame_prev_register): Handle
DWARF2_FRAME_REG_FN.
* dwarf2-frame.h (enum dwarf2_frame_reg_rule): Add
DWARF2_FRAME_REG_FN.
(struct dwarf2_frame_state_reg): Add FN to loc union.
* gdb.arch/thumb-prologue.exp: Do not expect a saved PC.
