Commit graph

338 commits

Author SHA1 Message Date
Hans-Peter Nilsson
5b3f8a92b4 * cris.h (MOVE_M_TO_PREG_OPCODE, MOVE_M_TO_PREG_ZBITS)
(MOVE_PC_INCR_OPCODE_PREFIX, MOVE_PC_INCR_OPCODE_SUFFIX): New macros.
	(ADD_PC_INCR_OPCODE): Don't define.
2005-12-07 12:53:57 +00:00
H.J. Lu
cb712a9ecd gas/
2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* config/tc-i386.c (match_template): Handle monitor.
	(process_suffix): Likewise.

gas/testsuite/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* gas/i386/i386.exp: Add x86-64-prescott for 64bit.

	* gas/i386/prescott.s: Test address size override for monitor.
	* gas/i386/prescott.d: Updated.

	* gas/i386/x86-64-prescott.d: New file.
	* gas/i386/x86-64-prescott.s: Likewise.

include/opcode/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* i386.h (i386_optab): Add 64bit support for monitor and mwait.

opcodes/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* i386-dis.c (address_mode): New enum type.
	(address_mode): New variable.
	(mode_64bit): Removed.
	(ckprefix): Updated to check address_mode instead of mode_64bit.
	(prefix_name): Likewise.
	(print_insn): Likewise.
	(putop): Likewise.
	(print_operand_value): Likewise.
	(intel_operand_size): Likewise.
	(OP_E): Likewise.
	(OP_G): Likewise.
	(set_op): Likewise.
	(OP_REG): Likewise.
	(OP_I): Likewise.
	(OP_I64): Likewise.
	(OP_OFF): Likewise.
	(OP_OFF64): Likewise.
	(ptr_reg): Likewise.
	(OP_C): Likewise.
	(SVME_Fixup): Likewise.
	(print_insn): Set address_mode.
	(PNI_Fixup): Add 64bit and address size override support for
	monitor and mwait.
2005-12-06 12:40:57 +00:00
Thiemo Seufer
0499d65b9b * mips.h: Assign 'm'/'M' codes to MIPS16e save/restore
instructions.  Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for
        save/restore encoding of the args field.

        * mips16-opc.c: Add MIPS16e save/restore opcodes.
        * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
        codes for save/restore.

        * config/tc-mips.c (mips16_ip): Add handling of 'm' and 'M' codes
        for the MIPS16e save/restore instructions.

        * gas/mips/mips.exp: Run new save/restore tests.
        * gas/testsuite/gas/mips/mips16e-save.s: New test for generating
        different styles of save/restore instructions.
        * gas/testsuite/gas/mips/mips16e-save.d: New.
2005-11-14 02:25:39 +00:00
Dave Brolley
16175d96a0 2005-10-28 Dave Brolley <brolley@redhat.com>
Contribute the following changes:
        2003-09-29  Dave Brolley  <brolley@redhat.com>

        * dis-asm.h (disassemble_info): insn_sets now (void *) to allow for
        more exotic underlying types to be used.
2005-10-28 19:41:01 +00:00
Dave Brolley
ea5ca089fd 2005-10-28 Dave Brolley <brolley@redhat.com>
Contribute the following changes:
        2005-02-16  Dave Brolley  <brolley@redhat.com>

        * cgen-bitset.h: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
        cgen_isa_mask_* to cgen_bitset_*.
        * cgen.h: Likewise.
2005-10-28 19:38:59 +00:00
Nick Clifton
3c9b82baee Add support for the Z80 processor family 2005-10-25 17:40:19 +00:00
Jan Beulich
6a2375c6b2 include/opcode/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* ia64.h (enum ia64_opnd): Move memory operand out of set of
	indirect operands.

bfd/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of
	set of indirect operands.

gas/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* config/tc-ia64.c (enum reg_symbol): Delete IND_MEM.
	(dot_rot): Change type of num_* variables. Check for positive count.
	(ia64_optimize_expr): Re-structure.
	(md_operand): Check for general register.

gas/testsuite/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* gas/ia64/index.[sl]: New.
	* gas/ia64/rotX.[sl]: New.
	* gas/ia64/ia64.exp: Run new tests.

opcodes/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* ia64-asmtab.c: Regenerate.
2005-10-24 07:42:50 +00:00
Dave Anglin
c06a12f887 * hppa.h (pa_opcodes): Add two fcmp opcodes. Reorder ftest opcodes.
Add FLAG_STRICT to pa10 ftest opcode.
2005-10-16 20:42:14 +00:00
Dave Anglin
4d443107ba * gas/hppa/basic/basic.exp (do_system): Adjust for removal of lha
instructions from system.s.
	* gas/hppa/basic/system.s (lha): Remove.

	* hppa.h (pa_opcodes): Remove lha entries.
2005-10-13 02:26:34 +00:00
Dave Anglin
f0a3b40fae * config/tc-hppa.c (strict): Don't initialize. Update comment.
(pa_ip): Promote from PA 1.0 to 1.1 immediately when 1.1 match is
	found.  Simplify handling of "ma" and "mb" completers.

	* hppa.h (FLAG_STRICT): Revise comment.
	(pa_opcode): Revise ordering rules.  Add/move strict pa10 variants
	before corresponding pa11 opcodes.  Add strict pa10 register-immediate
	entries for "fdc".
2005-10-08 19:01:29 +00:00
Catherine Moore
dc603df5ae * dis-asm.h (print_insn_bfin): Declare.
* elf/bfin.h: New file.
	* elf/common.h (EM_BLACKFIN): Define.
	* opcode/bfin.h: New file.
2005-09-30 15:12:52 +00:00
Dave Anglin
1b7e136286 * hppa.h (pa_opcodes): Add new "fdc" and "fic" opcode entries. 2005-09-25 02:33:54 +00:00
Andreas Schwab
d7f1af96dc Remove extraneous line. 2005-09-08 10:08:34 +00:00
Chao-ying Fu
089b39de8a * mips.h (OP_SH_MT_U, OP_MASK_MT_U, OP_SH_MT_H, OP_MASK_MT_H,
OP_SH_MTACC_T, OP_MASK_MTACC_T, OP_SH_MTACC_D, OP_MASK_MTACC_D): New
define.
Document !, $, *, &, g, +t, +T operand formats for MT instructions.
(INSN_ASE_MASK): Update to include INSN_MT.
(INSN_MT): New define for MT ASE.
2005-09-06 18:42:58 +00:00
Chao-ying Fu
93c34b9bd1 * mips.h (OP_SH_DSPACC, OP_MASK_DSPACC, OP_SH_DSPACC_S,
OP_MASK_DSPACC_S, OP_SH_DSPSFT, OP_MASK_DSPSFT, OP_SH_DSPSFT_7,
OP_MASK_DSPSFT_7, OP_SH_SA3, OP_MASK_SA3, OP_SH_SA4, OP_MASK_SA4,
OP_SH_IMM8, OP_MASK_IMM8, OP_SH_IMM10, OP_MASK_IMM10, OP_SH_WRDSP,
OP_MASK_WRDSP, OP_SH_RDDSP, OP_MASK_RDDSP): New define.
Document 3, 4, 5, 6, 7, 8, 9, 0, :, ', @ operand formats for DSP
instructions.
(INSN_DSP): New define for DSP ASE.
2005-08-25 18:09:24 +00:00
Alan Modra
848cf006a0 Remove a29k files. 2005-08-18 03:59:24 +00:00
Daniel Jacobowitz
36ae0db314 gas/
* config/tc-ppc.c (parse_cpu): Add -me300 support.
	(md_show_usage): Likewise.
	* doc/c-ppc.texi (PowerPC-Opts): Document it.
include/opcode/
	* ppc.h (PPC_OPCODE_E300): Define.
opcodes/
	* ppc-dis.c (powerpc_dialect): Handle e300.
	(print_ppc_disassembler_options): Likewise.
	* ppc-opc.c (PPCE300): Define.
	(powerpc_opcodes): Mark icbt as available for the e300.
binutils/
	* doc/binutils.texi (objdump): Document -M e300.
2005-08-15 15:37:15 +00:00
Martin Schwidefsky
8c9295623d * s390.h (s390_opcode_cpu_val): Add enum for cpu type z9-109. 2005-08-12 18:02:38 +00:00
Dave Anglin
761e0242e4 * hppa.h: Update copyright dates. 2005-08-03 15:08:52 +00:00
Dave Anglin
f7b8cccc74 PR gas/336
* hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb
	and pitlb.
2005-07-28 20:32:21 +00:00
Jan Beulich
8b5328ac50 include/opcode/
2005-07-27  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Add comment to movd. Use LongMem for all
	movd-s. Add NoRex64 to movq-s dealing only with mmx or xmm registers.
	Add movq-s as 64-bit variants of movd-s.
2005-07-27 07:04:31 +00:00
Dave Anglin
18b3bdfca0 * hppa.h: Fix punctuation in comment. 2005-07-19 03:09:33 +00:00
Dave Anglin
f417d20096 * hppa.h (pa_opcode): Add rules for opcode ordering. Check first for
implicit space-register addressing.  Set space-register bits on opcodes
	using implicit space-register addressing.  Add various missing pa20
	long-immediate opcodes.  Remove various opcodes using implicit 3-bit
	space-register addressing.  Use "fE" instead of "fe" in various
	fstw opcodes.
2005-07-19 00:11:48 +00:00
Jan Beulich
9a145ce60d include/opcode/
2005-07-18  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Operands of aam and aad are unsigned.
2005-07-18 06:11:00 +00:00
H.J. Lu
90700ea20f gas/
2007-07-15  H.J. Lu <hongjiu.lu@intel.com>

	* gas/config/tc-i386.h (CpuVMX): New.
	(CpuUnknownFlags): Add CpuVMX.

gas/testsuite/

2007-07-15  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add vmx and x86-64-vmx.

	* gas/i386/vmx.d: New file.
	* gas/i386/vmx.s: Likewise.
	* gas/i386/x86-64-vmx.d: Likewise.
	* gas/i386/x86-64-vmx.s: Likewise.

include/opcode/

2007-07-15  H.J. Lu <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Support Intel VMX Instructions.

opcodes/

2007-07-15  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
	(VMX_Fixup): New. Fix up Intel VMX Instructions.
	(Em): New.
	(Gm): New.
	(VM): New.
	(dis386_twobyte): Updated entries 0x78 and 0x79.
	(twobyte_has_modrm): Likewise.
	(grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
	(OP_G): Handle m_mode.
2005-07-15 13:49:53 +00:00
Dave Anglin
48f130a8a2 * hppa.h (pa_opcode): Don't set FLAG_STRICT in pa10 loads and stores. 2005-07-11 02:31:34 +00:00
Jan Beulich
3012383869 gas/
2005-07-05  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.h (CpuSVME): New.
	(CpuUnknownFlags): Include CpuSVME.
	* config/tc-i386.c (cpu_arch): Add .pacifica and .svme. Add opteron
	as alias of sledgehammer.
	(md_assemble): Include invlpga in the check for insns with two source
	operands.
	(process_operands): Include SVME insns in the check for ignored
	segment overrides. Adjust diagnostic.
	(i386_index_check): Special-case SVME insns with memory operands.

gas/testsuite/
2005-07-05  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/svme.d: New.
	* gas/i386/svme.s: New.
	* gas/i386/svme64.d: New.
	* gas/i386/i386.exp: Run new tests.

include/opcode/
2005-07-05  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Add new insns.

opcodes/
2005-07-05  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (SVME_Fixup): New.
	(grps): Use it for the lidt entry.
	(PNI_Fixup): Call OP_M rather than OP_E.
	(INVLPG_Fixup): Likewise.
2005-07-05 07:16:54 +00:00
Nick Clifton
47b0e7ad8c Update function declarations to ISO C90 formatting 2005-07-01 11:16:33 +00:00
H.J. Lu
b300c311a0 gas/
2005-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 1013
	* config/tc-i386.c (md_assemble): Don't call optimize_disp on
	movabs.
	(optimize_disp): Optimize only if possible. Don't use 64bit
	displacement on non-constants and do same on constants if
	possible.

gas/testsuite/

2005-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 1013
	* i386/x86_64.s: Add absolute 64bit addressing tests for mov.
	* i386/x86_64.s: Updated.

include/opcode/

2005-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 1013
	* i386.h (i386_optab): Update comments for 64bit addressing on
	mov. Allow 64bit addressing for mov and movq.
2005-06-20 23:18:39 +00:00
Dave Anglin
2db495bea8 * hppa.h (pa_opcodes): Use cM and cX instead of cm and cx,
respectively, in various floating-point load and store patterns.
2005-06-11 15:33:52 +00:00
Dave Anglin
caa0503690 * hppa.h (FLAG_STRICT): Correct comment.
(pa_opcodes): Update load and store entries to allow both PA 1.X and
	PA 2.0 mneumonics when equivalent.  Entries with cache control
	completers now require PA 1.1.  Adjust whitespace.
2005-05-23 16:26:43 +00:00
Alan Modra
f4411256d5 * ppc.h (PPC_OPCODE_POWER5): Define. 2005-05-19 06:59:36 +00:00
Nick Clifton
e172dbf8aa Update the address and phone number of the FSF organization 2005-05-10 10:21:13 +00:00
Jan Beulich
e44823cfe5 gas/
2005-05-09  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (parse_insn): Disallow use of prefix separator
	and comma in Intel mode.

include/opcode/
2005-05-09  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Add ht and hnt.
2005-05-09 06:49:01 +00:00
Mark Kettenis
791fe84908 gas/ChangeLog:
* config/tc-i386.c (md_begin): Allow hyphens in mnemonics.
include/opcode/ChangeLog:
* i386.h: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.  Provide aliases without hyphens.
opcodes/ChangeLog:
* i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.
2005-04-18 20:59:20 +00:00
H.J. Lu
a63027e547 Move entries in ChangeLog-9103 to appropriate */ChangeLog-9103. 2005-04-13 17:33:48 +00:00
H.J. Lu
faa7ef872d Move entries to appropriate ChangeLog files. 2005-04-13 16:53:25 +00:00
Paul Brook
338fbd7b1d 2005-04-12 Paul Brook <paul@codesourcery.com>
* opcode/m88k.h: Rename psr macros to avoid conflicts.
2005-04-12 19:35:53 +00:00
Mark Kettenis
bc4bd9abb2 include/opcode/ChangeLog:
* i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and
adjust them accordingly.
gas/ChangeLog:
* config/tc-i386.c (output_insn): Handle VIA PadLock instructions
similar to other instructions now that they're marked as ImmExt.
2005-04-12 17:12:33 +00:00
Andreas Schwab
418a8fcaa2 Fix typo. 2005-04-04 16:06:26 +00:00
Jan Beulich
373ff435a8 include/opcode/
2005-04-01  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Add rdtscp.

opcodes/
2005-04-01  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
	easier future additions.
2005-04-01 16:03:40 +00:00
H.J. Lu
4cc91dba12 gas/testsuite/
2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run segment and inval-seg for i386. Run
	x86-64-segment and x86-64-inval-seg for x86-64.

	* gas/i386/intel.d: Expect movw for moving between memory and
	segment register.
	* gas/i386/naked.d: Likewise.
	* gas/i386/opcode.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.

	* gas/i386/opcode.s: Use movw for moving between memory and
	segment register.
	* gas/i386/x86-64-opcode.s: Likewise.

	* : Likewise.

	* gas/i386/inval-seg.l: New.
	* gas/i386/inval-seg.s: New.
	* gas/i386/segment.l: New.
	* gas/i386/segment.s: New.
	* gas/i386/x86-64-inval-seg.l: New.
	* gas/i386/x86-64-inval-seg.s: New.
	* gas/i386/x86-64-segment.l: New.
	* gas/i386/x86-64-segment.s: New.

include/opcode/

2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Don't allow the `l' suffix for moving
	moving between memory and segment register. Allow movq for
	moving between general-purpose register and segment register.

opcodes/

2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (SEG_Fixup): New.
	(Sv): New.
	(dis386): Use "Sv" for 0x8c and 0x8e.
2005-03-29 19:30:47 +00:00
Zack Weinberg
0a003adc41 include:
* opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
	Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
	and ARM_ARCH_V6ZKT2.
opcodes:
	* arm-dis.c (arm_opcodes): Document %E and %V.
	Add entries for v6T2 ARM instructions:
	bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
	(print_insn_arm): Add support for %E and %V.
2005-03-12 18:14:05 +00:00
Alan Modra
c3aa17e92d update copyright dates 2005-03-03 11:58:10 +00:00
Jan Beulich
9ae09ff9cf gas/testsuite/
2005-02-09  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelok.s: Remove comments disabling alternative forms of
	fbld, fbstp, and fldcw.
	* gas/i386/intelok.d: Expect two instances of fbld, fbstp, and fldcw.

include/opcode/
2005-02-09  Jan Beulich  <jbeulich@novell.com>

	PR gas/707
	* i386.h (i386_optab): Add x_Suf to fbld and fbstp. Add w_Suf and
	FloatMF to fldcw, fstcw, fnstcw, and the memory formas of fstsw and
	fnstsw.
2005-02-09 08:05:43 +00:00
Alexandre Oliva
90219bd0f3 bfd/ChangeLog:
2004-12-10  Alexandre Oliva  <aoliva@redhat.com>
* elf32-frv.c (elf32_frv_relocate_section): Force local binding
for TLSMOFF.
* reloc.c: Add R_FRV_TLSMOFF.
* elf32-frv.c (elf32_frv_howto_table): Likewise.
(frv_reloc_map, frv_reloc_type_lookup): Map it.
(elf32_frv_relocate_section): Handle it.
(elf32_frv_check_relocs): Likewise.
* libbfd.h, bfd-in2.h: Rebuilt.
2004-11-26  Alexandre Oliva  <aoliva@redhat.com>
* elf32-frv.c (_frvfdpic_emit_got_relocs_plt_entries): Don't crash
when given an undefweak TLS symbol.  Fix constant TLS PLT entries
such that they return the constant in gr9.
(_frvfdpic_relax_tls_entries): Don't crash for undefweak TLS
symbols.
(_frvfdpic_size_got_plt): Set _cooked_size of dynamic sections.
too, such that they shrink on relaxation.
(elf32_frvfdpic_finish_dynamic_sections): Check __ROFIXUP_END__ as
marking the position right past the _GLOBAL_OFFSET_TABLE_ value.
(_frvfdpic_assign_plt_entries): Shrink constant TLS PLT entries
if we can guarantee the use of 16-bit constants.
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
Introduce TLS support for FR-V FDPIC.
* reloc.c: Add TLS relocations.
* elf32-frv.c (elf32_frv_howto_table): Add TLS relocations.
(elf32_frv_rel_tlsdesc_value_howto): New.
(elf32_frv_rel_tlsoff_howto): New.
(frv_reloc_map): Add new mappings.
(struct frvfdpic_elf_link_hash_table): Add pointer to summary
reloc information.
(frvfdpic_dynamic_got_plt_info): New.
(frvfdpic_plt_tls_ret_offset): New.
(ELF_DYNAMIC_INTERPRETER, DEFAULT_STACK_SIZE): Move earlier.
(struct _frvfdpic_dynamic_got_info): Likewise.  Add TLS members.
(struct _frvfdpic_dynamic_got_plt_info): Likewise.
(FRVFDPIC_SYM_LOCAL): Regard symbols defined in the absolute
section as local.
(struct frvfdpic_relocs_info): Add TLS fields.
(frvfdpic_relocs_info_hash): Warning clean up.
(frvfdpic_relocs_info_find): Initialize tlsplt_entry.
(frvfdpic_pic_merge_early_relocs_info): Merge TLS fields.
(FRVFDPIC_TLS_BIAS): Define.
(tls_biased_base): New.
(_frvfdpic_emit_got_relocs_plt_entries): Deal with TLS
relocations.
(frv_reloc_type_lookup): Likewise.
(frvfdpic_info_to_howto_rel): Likewise.
(elf32_frv_relocate_section): Likewise.
(_frv_create_got_section): Create the PLT section here.
(elf32_frvfdpic_create_dynamic_sections): Not here.
(_frvfdpic_count_nontls_entries): Move out of...
(_frvfdpic_count_got_plt_entries): ... here.
(_frvfdpic_count_tls_entries): Likewise.  Add TLS support.
(_frvfdpic_count_relocs_fixups): Likewise.  Add relaxation
support.
(_frvfdpic_relax_tls_entries): New.
(_frvfdpic_compute_got_alloc_data): Add TLS support.
(_frvfdpic_get_tlsdesc_entry): New.
(_frvfdpic_assign_got_entries): Add TLS support.
(_frvfdpic_assign_plt_entries): Likewise.
(_frvfdpic_reset_got_plt_entries): New.
(_frvfdpic_size_got_plt): Move out of...
(elf32_frvfdpic_size_dynamic_sections): ... here.
(_frvfdpic_relax_got_plt_entries): New.
(elf32_frvfdpic_relax_section): New.
(elf32_frvfdpic_finish_dynamic_sections): Add TLS sanity check.
(elf32_frv_check_relocs): Add TLS support.
(bfd_elf32_bfd_relax_section): Define for FDPIC.
* libbfd.h, bfd-in2.h: Rebuilt.
cpu/ChangeLog:
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* frv.cpu: Add support for TLS annotations in loads and calll.
* frv.opc (parse_symbolic_address): New.
(parse_ldd_annotation): New.
(parse_call_annotation): New.
(parse_ld_annotation): New.
(parse_ulo16, parse_uslo16): Use parse_symbolic_address.
Introduce TLS relocations.
(parse_d12, parse_s12, parse_u12): Likewise.
(parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
(parse_call_label, print_at): New.
gas/ChangeLog:
* config/tc-frv.c (md_apply_fix3): Mark TLS symbols as such.
2004-12-10  Alexandre Oliva  <aoliva@redhat.com>
* config/tc-frv.c (frv_pic_ptr): Add tlsmoff support.
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* cgen.c (gas_cgen_parse_operand): Handle
CGEN_PARSE_OPERAND_SYMBOLIC.
* config/tc-frv.c (md_cgen_lookup_reloc): Handle TLS relocations.
(frv_force_relocation): Likewise.  Fix handling of PIC
relocations.
(md_apply_fix3): Likewise.
include/elf/ChangeLog:
2004-12-10  Alexandre Oliva  <aoliva@redhat.com>
* frv.h: Add R_FRV_TLSMOFF.
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* frv.h: Add TLS relocations.
include/opcode/ChangeLog:
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* cgen.h (enum cgen_parse_operand_type): Add
CGEN_PARSE_OPERAND_SYMBOLIC.
ld/testsuite/ChangeLog:
* ld-frv/fdpic.exp: Add -mfdpic to ASFLAGS.
* ld-frv/tls.exp: Likewise.
2004-11-26  Alexandre Oliva  <aoliva@redhat.com>
* ld-frv/tls-3.s: New.
* ld-frv/tls-static-3.d: New.
* ld-frv/tls-dynamic-3.d: New.
* ld-frv/tls-pie-3.d: New.
* ld-frv/tls-shared-3.d: New.
* ld-frv/tls-relax-static-3.d: New.
* ld-frv/tls-relax-dynamic-3.d: New.
* ld-frv/tls-relax-pie-3.d: New.
* ld-frv/tls-relax-shared-3.d: New.
* ld-frv/tls.exp: Run the new tests.
* ld-frv/tls-dynamic-2.d: Adjust for improved relaxation.
* ld-frv/tls-relax-dynamic-2.d: Likewise.
* ld-frv/tls-relax-initial-shared-2.d: Likewise.
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* ld-frv/tls-1-dep.s: New.
* ld-frv/tls-1-shared.lds: New.
* ld-frv/tls-1.s: New.
* ld-frv/tls-2.s: New.
* ld-frv/tls-dynamic-1.d: New.
* ld-frv/tls-dynamic-2.d: New.
* ld-frv/tls-initial-shared-2.d: New.
* ld-frv/tls-pie-1.d: New.
* ld-frv/tls-relax-dynamic-1.d: New.
* ld-frv/tls-relax-dynamic-2.d: New.
* ld-frv/tls-relax-initial-shared-2.d: New.
* ld-frv/tls-relax-pie-1.d: New.
* ld-frv/tls-relax-shared-1.d: New.
* ld-frv/tls-relax-shared-2.d: New.
* ld-frv/tls-relax-static-1.d: New.
* ld-frv/tls-shared-1-fail.d: New.
* ld-frv/tls-shared-1.d: New.
* ld-frv/tls-shared-2.d: New.
* ld-frv/tls-static-1.d: New.
* ld-frv/tls.exp: New.
* ld-frv/fdpic-pie-1.d: Adjust for 64-bit host.
* ld-frv/fdpic-pie-2.d: Likewise.
* ld-frv/fdpic-pie-6.d: Likewise.
* ld-frv/fdpic-pie-7.d: Likewise.
* ld-frv/fdpic-pie-8.d: Likewise.
* ld-frv/fdpic-shared-1.d: Likewise.
* ld-frv/fdpic-shared-2.d: Likewise.
* ld-frv/fdpic-shared-3.d: Likewise.
* ld-frv/fdpic-shared-4.d: Likewise.
* ld-frv/fdpic-shared-5.d: Likewise.
* ld-frv/fdpic-shared-6.d: Likewise.
* ld-frv/fdpic-shared-7.d: Likewise.
* ld-frv/fdpic-shared-8.d: Likewise.
* ld-frv/fdpic-shared-local-2.d: Likewise.
* ld-frv/fdpic-shared-local-8.d: Likewise.
* ld-frv/fdpic-static-1.d: Likewise.
* ld-frv/fdpic-static-2.d: Likewise.
* ld-frv/fdpic-static-6.d: Likewise.
* ld-frv/fdpic-static-7.d: Likewise.
* ld-frv/fdpic-static-8.d: Likewise.
opcodes/ChangeLog:
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* frv-asm.c: Rebuilt.
* frv-desc.c: Rebuilt.
* frv-desc.h: Rebuilt.
* frv-dis.c: Rebuilt.
* frv-ibld.c: Rebuilt.
* frv-opc.c: Rebuilt.
* frv-opc.h: Rebuilt.
2005-01-25 20:22:41 +00:00
Fred Fish
239cb185bc 2005-01-21 Fred Fish <fnf@specifixinc.com>
* mips.h: Change INSN_ALIAS to INSN2_ALIAS.
	Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
	Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
2005-01-21 19:42:08 +00:00
Fred Fish
dc9a9f39cc 2005-01-19 Fred Fish <fnf@specifixinc.com>
* mips.h (struct mips_opcode): Add new pinfo2 member.
	(INSN_ALIAS): New define for opcode table entries that are
	specific instances of another entry, such as 'move' for an 'or'
	with a zero operand.
	(INSN_READ_MDMX_ACC): Redefine from 0 to 0x2.
	(INSN_WRITE_MDMX_ACC): Redefine from 0 to 0x4.
2005-01-19 23:29:12 +00:00
Ian Lance Taylor
98e7aba8e2 * mips.h (CPU_RM9000): Define.
(OPCODE_IS_MEMBER): Handle CPU_RM9000.
2004-12-09 06:13:44 +00:00
Tomer Levi
9019af69c4 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
* opcode/crx.h (enum operand_type): Rename rbase_cst4 to rbase_dispu4.
	Remove redundant instruction types.
	(struct argument): X_op - new field.
	(struct cst4_entry): Remove.
	(no_op_insn): Declare.
2004-11-29 16:36:50 +00:00