darkkirb/old-cross-binutils

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Author	SHA1	Message	Date
Jeff Law	73e6529893	* mn10300_sim.h (PSW_): Define for CC status tracking. (REG_D0, REG_A0, REG_SP): Define. simops.c: Implement "add", "addc" and a few other random instructions. Starting to simulate instructions for the mn10300. Executes some of the crt0 code now!	1996-11-26 22:58:24 +00:00
Jeff Law	b5f831ac51	* gencode.c, interp.c: Snapshot current simulator code. (crude) hashing works, along with dispatch to the OP_* functions.	1996-11-26 20:40:19 +00:00
Jeff Law	05ccbdfdd2	* Makefile.in, config.in, configure, configure.in: New files. * gencode.c, interp.c, mn10300_sim.h, simops.c: New files. Skeleton mn10300 simulator	1996-11-25 19:52:08 +00:00

Author

SHA1

Message

Date

Jeff Law

73e6529893

* mn10300_sim.h (PSW_*): Define for CC status tracking.

(REG_D0, REG_A0, REG_SP): Define.
        * simops.c: Implement "add", "addc" and a few other random
        instructions.
Starting to simulate instructions for the mn10300.  Executes some of
the crt0 code now!

1996-11-26 22:58:24 +00:00

Jeff Law

b5f831ac51

* gencode.c, interp.c: Snapshot current simulator code.

(crude) hashing works, along with dispatch to the OP_* functions.

1996-11-26 20:40:19 +00:00

Jeff Law

05ccbdfdd2

* Makefile.in, config.in, configure, configure.in: New files.

* gencode.c, interp.c, mn10300_sim.h, simops.c: New files.

Skeleton mn10300 simulator

1996-11-25 19:52:08 +00:00

3 commits