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Author SHA1 Message Date
Hans-Peter Nilsson
b676888f48 * cris.h (EF_CRIS_VARIANT_MASK, EF_CRIS_VARIANT_ANY_V0_V10) 
(EF_CRIS_VARIANT_V32, EF_CRIS_VARIANT_COMMON_V10_V32): New
	macros.
 2004-11-04 14:53:19 +00:00
Eric Christopher
637cf7673d 2004-10-06 Eric Christopher <echristo@redhat.com> 
* dwarf2.h: Sync with gcc dwarf2.h. Fix typo.
 2004-10-06 20:29:48 +00:00
Nick Clifton
40a18ebd3a The patch below adds binutils support for the SHT_ARM_EXIDX, as defined by 
the ARM EABI.
 2004-10-01 12:59:42 +00:00
Nick Clifton
b18c562e39 Apply Dmitry Diky's patches to add relaxation to msp430. 2004-08-25 12:54:15 +00:00
H.J. Lu
083febaa5d 2004-08-12 H.J. Lu <hongjiu.lu@intel.com> 
* i386.h (R_386_USED_BY_INTEL_200): New.
 2004-08-12 16:01:22 +00:00
Alexandre Oliva
1d70c7fb83 include/elf/ChangeLog: 
Introduce SH2a support.
2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
* sh.h (EF_SH2A_NOFPU): New.
2003-12-01  Michael Snyder  <msnyder@redhat.com>
* sh.h (EF_SH2A): New.
bfd/ChangeLog:
Introduce SH2a support.
2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
* archures.c (bfd_mach_sh2a_nofpu): New.
* bfd-in2.h: Rebuilt.
* cpu-sh.c (SH2A_NOFPU_NEXT): New.
(arch_info_struct): Add sh2a_nofpu.
* elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a_nofpu.
2003-12-29  DJ Delorie  <dj@redhat.com>
* reloc.c: Add relocs for sh2a.
* bfd-in2.h: Regenerate.
* libbfd.hh: Regenerate.
2003-12-01  Michael Snyder  <msnyder@redhat.com>
* archures.c (bfd_mach_sh2a): New.
* bfd-in2.h: Rebuilt.
* cpu-sh.c (SH_NEXT, SH2_NEXT, etc.): Change defines to enums.
(SH2A_NEXT): New.
(arch_info_struct): Add sh2a.
* elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a.
binutils/ChangeLog:
* readelf.c (get_machine_flags <EM_SH>): Handle EF_SH2A and
EF_SH2A_NOFPU.
gas/ChangeLog:
Introduce SH2a support.
2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
* config/tc-sh.c (get_specific): Change arch_sh2a_up to
arch_sh2a_nofpu_up.
2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
* config/tc-sh.c (md_parse_option): Add sh2a-nofpu ISA handling.
2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
* config/tc-sh.c (sh_elf_final_processing): Move sh2a recognition
to end of conditional expression.
2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
* config/tc-sh.c: Add sh2a-nofpu support.
2003-12-29  DJ Delorie  <dj@redhat.com>
* tc-sh.c: Add sh2a support.
(parse_reg): Add tbr.
(parse_at): Support @@(disp,tbr).
(get_specific): Support sh2a opcodes.
(insert4): New, for 4 byte relocs.
(build_Mytes): Support sh2a opcodes.
(md_apply_fix3_Mytes): Support sh2a opcodes.
2003-12-02  Michael Snyder  <msnyder@redhat.com>
* config/tc-sh.c (md_parse_option): Handle sh2a.
(sh_elf_final_processing): Ditto.
gas/testsuite/ChangeLog:
2003-12-30  DJ Delorie  <dj@redhat.com>
* gas/sh/sh2a.s: New.
* gas/sh/sh2a.d: New.
* gas/sh/basic.exp: Add it.
 2004-07-29 05:17:41 +00:00
Nick Clifton
670ec21de9 Add CRX insns: pushx, popx 
Add support to GAS for expressions which are the difference of two symbols
 2004-07-27 11:37:12 +00:00
Nick Clifton
1fe1f39c06 Add new port: crx-elf 2004-07-07 17:28:53 +00:00
Nick Clifton
097f809a19 Add support for M32R GOT relocs 2004-06-25 16:11:09 +00:00
Alan Modra
375db92b39 * common.h (ELF64_R_INFO): Warning fix. 2004-06-19 02:21:14 +00:00
Chris Demetriou
092dcd755d [ bfd/ChangeLog ] 
2004-06-14  Chris Demetriou  <cgd@broadcom.com>

        * elf32-mips.c (elf_mips_gnu_pcrel32): Add (undoing 2004-04-24
        removal) with updated comment.
        (bfd_elf32_bfd_reloc_type_lookup): Add back case for
        BFD_RELOC_32_PCREL.
        (mips_elf32_rtype_to_howto): Add back case for R_MIPS_PC32.
        * elfxx-mips.c (mips_elf_calculate_relocation): Likewise.

[ include/elf/ChangeLog ]
2004-06-14  Chris Demetriou  <cgd@broadcom.com>

        * mips.h (R_MIPS_PC32): Add back (undoing removal on 2004-04-24),
        with an updated comment.
 2004-06-14 18:25:10 +00:00
Joern Rennecke
f6f9408fbf 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com> 
bfd:
	* Makefile.am: Regenerate dependencies.
	* Makefile.in: Regenerate.
	* archures.c: Add bfd_mach_sh3_nommu .
	* bfd-in2.h: Regenerate.
	* cpu-sh.c: Add sh3-nommu architecture.
	(bfd_to_arch_table): Create new table.
	(sh_get_arch_from_bfd_mach): Create new function.
	(sh_get_arch_up_from_bfd_mach): Create new function.
	(sh_merge_bfd_arch): Create new function.
	* elf32-sh.c (sh_ef_bfd_table): Add table.
	(sh_elf_check_relocs): Replace switch statement with
	use of sh_ef_bfd_table .
	(sh_elf_get_flags_from_mach): Add new function.
	(sh_find_elf_flags): Likewise.
	(sh_elf_copy_private_data): Replace most of non-elf contents
	with a call to sh_merge_bfd_arch() .

gas:
	* Makefile.am: Regenerate dependecies.
	* Makefile.in: Regenerate.
	* config/tc-sh.c (valid_arch): Make unsigned.
	(preset_target_arch): Likewise.
	(md_begin): Use new architecture flags system.
	(get_specific): Likewise.
	(assemble_ppi): Likewise.
	(md_assemble): Likewise. Also fix error check for bad opcodes.
	(md_parse_option): Likewise. Also generate -isa values according
	to the table in bfd/cpu-sh.c instead of just constants. Also
	allow <arch>-up ISA variants.
	(sh_elf_final_processing): Replace if-else chain with a call to
	sh_find_elf_flags().
	* testsuite/gas/sh/arch: New directory.
	* testsuite/gas/sh/arch/arch.exp: New test script.
	* testsuite/gas/sh/arch/arch_expected.txt: New file.
	* testsuite/gas/sh/arch/sh.s: New file.
	* testsuite/gas/sh/arch/sh2.s: New file.
	* testsuite/gas/sh/arch/sh-dsp.s: New file.
	* testsuite/gas/sh/arch/sh2e.s: New file.
	* testsuite/gas/sh/arch/sh3-nommu.s: New file.
	* testsuite/gas/sh/arch/sh3.s: New file.
	* testsuite/gas/sh/arch/sh3-dsp.s: New file.
	* testsuite/gas/sh/arch/sh3e.s: New file.
	* testsuite/gas/sh/arch/sh4-nommu-nofpu.s: New file.
	* testsuite/gas/sh/arch/sh4-nofpu.s: New file.
	* testsuite/gas/sh/arch/sh4.s: New file.
	* testsuite/gas/sh/arch/sh4a-nofpu.s: New file.
	* testsuite/gas/sh/arch/sh4al-dsp.s: New file.
	* testsuite/gas/sh/arch/sh4a.s: New file.

include/elf:
	* sh.h (EF_SH_HAS_DSP): Remove.
	(EF_SH_HAS_FP): Remove.
	(EF_SH_MERGE_MACH): Remove.
	(EF_SH4_NOFPU): Convert to decimal.
	(EF_SH4A_NOFPU): Likewise.
	(EF_SH4_NOMMU_NOFPU): Likewise.
	(EF_SH3_NOMMU): Add new macro.
	(EF_SH_BFD_TABLE): Likewise.
	(sh_find_elf_flags): Add prototype.
	(sh_elf_get_flags_from_mach): Likewise.

opcodes:
	* sh-dis.c (target_arch): Make unsigned.
	(print_insn_sh): Replace (most of) switch with a call to
	sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
	* sh-opc.h: Redefine architecture flags values.
	Add sh3-nommu architecture.
	Reorganise <arch>_up macros so they make more visual sense.
	(SH_MERGE_ARCH_SET): Define new macro.
	(SH_VALID_BASE_ARCH_SET): Likewise.
	(SH_VALID_MMU_ARCH_SET): Likewise.
	(SH_VALID_CO_ARCH_SET): Likewise.
	(SH_VALID_ARCH_SET): Likewise.
	(SH_MERGE_ARCH_SET_VALID): Likewise.
	(SH_ARCH_SET_HAS_FPU): Likewise.
	(SH_ARCH_SET_HAS_DSP): Likewise.
	(SH_ARCH_UNKNOWN_ARCH): Likewise.
	(sh_get_arch_from_bfd_mach): Add prototype.
	(sh_get_arch_up_from_bfd_mach): Likewise.
	(sh_get_bfd_mach_from_arch_set): Likewise.
	(sh_merge_bfd_arc): Likewise.

ld:
	* testsuite/ld-sh/arch/arch.exp: New test script.
	* testsuite/ld-sh/arch/arch_expected.txt: New file.
	* testsuite/ld-sh/arch/sh.s: New file.
	* testsuite/ld-sh/arch/sh2.s: New file.
	* testsuite/ld-sh/arch/sh-dsp.s: New file.
	* testsuite/ld-sh/arch/sh2e.s: New file.
	* testsuite/ld-sh/arch/sh3-nommu.s: New file.
	* testsuite/ld-sh/arch/sh3.s: New file.
	* testsuite/ld-sh/arch/sh3-dsp.s: New file.
	* testsuite/ld-sh/arch/sh3e.s: New file.
	* testsuite/ld-sh/arch/sh4-nommu-nofpu.s: New file.
	* testsuite/ld-sh/arch/sh4-nofpu.s: New file.
	* testsuite/ld-sh/arch/sh4.s: New file.
	* testsuite/ld-sh/arch/sh4a-nofpu.s: New file.
	* testsuite/ld-sh/arch/sh4al-dsp.s: New file.
	* testsuite/ld-sh/arch/sh4a.s: New file.
 2004-05-28 12:32:10 +00:00
Chris Demetriou
4030e8f624 [ bfd/ChangeLog ] 
2004-04-24  Chris Demetriou  <cgd@broadcom.com>

	* elf32-mips.c (elf_mips_gnu_rel_hi16, elf_mips_gnu_rel_lo16)
	(elf_mips_gnu_pcrel64, elf_mips_gnu_pcrel32): Remove.
	(bfd_elf32_bfd_reloc_type_lookup): Remove cases for
	BFD_RELOC_PCREL_HI16_S, BFD_RELOC_PCREL_LO16, BFD_RELOC_64_PCREL,
	and BFD_RELOC_32_PCREL.
	(mips_elf32_rtype_to_howto): Remove cases for R_MIPS_GNU_REL_HI16,
	R_MIPS_GNU_REL_LO16, R_MIPS_PC64, R_MIPS_PC32.
	* elfxx-mips.c (mips_elf_calculate_relocation): Likewise.
	(_bfd_mips_elf_lo16_reloc): Remove handling for R_MIPS_GNU_REL_HI16.
	(mips_elf_next_relocation): Move comment about matching HI/LO
	relocations to...
	(_bfd_mips_elf_relocate_section): Here.  Remove handling for
	R_MIPS_GNU_REL_HI16.

[ include/elf/ChangeLog ]
2004-04-24  Chris Demetriou  <cgd@broadcom.com>

	* mips.h (R_MIPS_PC32, R_MIPS_PC64, R_MIPS_GNU_REL_LO16)
	(R_MIPS_GNU_REL_HI16): Remove.
	(R_MIPS_GNU_REL16_S2): Update comment.

[ ld/testsuite/ChangeLog ]
2004-04-24  Chris Demetriou  <cgd@broadcom.com>

	* ld-elf/merge.d: XFAIL on all MIPS targets.
 2004-04-24 22:07:14 +00:00
Nick Clifton
0949843db2 Add (linker) support for CR16C processor 2004-03-30 14:04:32 +00:00
Paul Brook
d507cf36a6 * bfd/elf32-arm.h (arm_print_private_bfd_data): Add EABI v3. 
* binutils/readelf.c (decode_ARM_machine_flags): Add EABI v3.
	* gas/config/tc-arm.c (meabi_flags): New variable.
	(arm_parse_eabi): New function.
	(md_begin): Set flags for EABI v3.
	(arm_eabis): Add.
	(arm_long_opts): Add meabi.
	* include/elf/arm.h (EF_ERM_BE8, EF_ARM_LE8, EF_ARM_EABI_VER3): Add.
	* doc/as.texinf <ARM>: Document -meabi.
	* doc/c-arm.texi: Ditto.
 2004-03-23 23:05:52 +00:00
Joern Rennecke
ae51a426eb 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com> 
opcodes:
	* sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
	nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
	* sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
	accordingly.
bfd:
	* archures.c: Add bfd_mach_sh4_nommu_nofpu.
	* cpu-sh.c: Ditto.
	* elf32-sh.c: Ditto.
	* bfd-in2.h: Regenerate.
include/elf:
	* sh.h: Add EF_SH4_NOMMU_NOFPU.
gas:
	* config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and
	-isa=sh4-nommu-nofpu options. Adjust help messages accordingly.
	(sh_elf_final_processing): Output BFD type sh4_nofpu if that is
	the most general type or the user specifically requested it.
	(md_assemble): Add a new error message for when an instruction
	is understood, but is not allowed due to an -isa option.
 2004-03-03 18:01:49 +00:00
Richard Sandiford
676a64f422 Add fr450 support. 2004-03-01 10:11:46 +00:00
Roland McGrath
481fedf372 . 2004-01-29 02:41:25 +00:00
Roland McGrath
7e67eb11e5 . 2004-01-29 00:37:46 +00:00
Mark Kettenis
3fe7447286 * common.h (NT_OPENBSD_IDENT): Define. 2004-01-19 18:28:58 +00:00
Alexandre Oliva
79987b2f58 2003-09-18 Alexandre Oliva <aoliva@redhat.com> 
* frv.h (EF_FRV_FDPIC): New macro.
(EF_FRV_PIC_FLAGS): Adjust.
2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
* frv.h (R_FRV_FUNCDESC_VALUE, R_FRV_FUNCDESC_GOTOFF12,
R_FRV_FUNCDESC_GOTOFFLO, R_FRV_FUNCDESC_GOTOFFHI, R_FRV_GOTOFF12,
R_FRV_GOTOFFLO, R_FRV_GOTOFFHI): New.
2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
* frv.h (R_FRV_GOT12, R_FRV_GOTHI, R_FRV_GOTLO, R_FRV_FUNCDESC,
R_FRV_FUNCDESC_GOT12, R_FRV_FUNCDESC_GOTHI, R_FRV_FUNCDESC_GOTLO):
New.
 2004-01-06 19:18:30 +00:00
Alan Modra
c9e214e571 Split ChangeLog files. 2004-01-02 11:16:21 +00:00
Nick Clifton
6edf0760c5 Add support for m32r-linux target, including a RELA ABI and PIC. 2003-12-19 11:44:01 +00:00
Alan Modra
0bec1a8421 * common.h (DT_HIOS): Correct value. 2003-12-06 05:32:21 +00:00
Nick Clifton
8884595866 Add support for the M32R2 processor. 2003-12-03 17:38:48 +00:00
Alan Modra
9162364a39 * ppc.h (R_PPC_RELAX32PC): Define. 2003-11-06 02:57:08 +00:00
Corinna Vinschen
a9178a2f38 * sh.h (EF_SH4A, EF_SH4AL_DSP, EF_SH4_NOFPU, EF_SH4A_NOFPU): New. 
(EF_SH_MERGE_MACH): Combine them.
 2003-10-23 09:43:20 +00:00
Hans-Peter Nilsson
f4b9d8efb9 * mmix.h (R_MMIX_PUSHJ_STUBBABLE): New reloc number. 
(_bfd_mmix_before_linker_allocation): Rename from
	_bfd_mmix_prepare_linker_allocated_gregs.
	(_bfd_mmix_after_linker_allocation): Rename from
	_bfd_mmix_finalize_linker_allocated_gregs.
 2003-10-18 15:46:35 +00:00
Dave Brolley
9b1c30a763 2003-10-06 Dave Brolley <brolley@redhat.com> 
* frv.h (EF_FRV_CPU_FR550): New macro.
 2003-10-08 18:12:53 +00:00
Chris Demetriou
5f74bc130d [ bfd/ChangeLog ] 
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* archures.c (bfd_mach_mipsisa64r2): New define.
	* bfd-in2.h: Regenerate.
	* aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2.
	* cpu-mips.c (I_mipsisa64r2): New enum value.
	(arch_info_struct): Add entry for I_mipsisa64r2.
	* elfxx-mips.c (_bfd_elf_mips_mach)
	(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2.
	(mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case.
	(mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2.

[ binutils/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2.

[ gas/Changelog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs.
	* configure: Regenerate.
	* config/tc-mips.c (imm2_expr): New variable.
	(md_assemble, mips16_ip): Initialize imm2_expr.
	(ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2.
	(macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands.
	(macro): Handle M_DEXT and M_DINS.
	(validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands.
	(mips_ip): Likewise.
	(OPTION_MIPS64R2): New define.
	(md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2).
	OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2.
	(md_parse_option): Handle OPTION_MIPS64R2.
	(s_mipsset): Handle setting "mips64r2" ISA.
	(mips_cpu_info_table): Add mips64r2.
	(md_show_usage): Document -mips64r2 option.
	* doc/as.texinfo: Docuemnt -mips64r2 option.
	* doc/c-mips.texi: Likewise.

[ gas/testsuite/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* gas/mips/cp0-names-mips64r2.d: New file.
	* gas/mips/cp0sel-names-mips64r2.d: New file.
	* gas/mips/elf_arch_mips64r2.d: New file.
	* gas/mips/hwr-names-mips64r2.d: New file.
	* gas/mips/mips32r2-ill-fp64.l: New file.
	* gas/mips/mips32r2-ill-fp64.s: New file.
	* gas/mips/mips64r2-ill.l: New file.
	* gas/mips/mips64r2-ill.s: New file.
	* gas/mips/mips64r2.d: New file.
	* gas/mips/mips64r2.s: New file.
	* gas/mips/mips.exp: Define "mips64r2" arch, and run new tests.

[ include/elf/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h (E_MIPS_ARCH_64R2): New define.

[ include/opcode/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h: Document +E, +F, +G, +H, and +I operand types.
	Update documentation of I, +B and +C operand types.
	(INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines.
	(M_DEXT, M_DINS): New enum values.

[ ld/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* ldmain.c (get_emulation): Ignore "-mips64r2".

[ ld/testsuite/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* ld-mips-elf/mips-elf-flags.exp: Add tests for combinations
	with MIPS64r2.

[ opcodes/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_arch_choices): Add entry for "mips64r2"
	(print_insn_args): Add handing for +E, +F, +G, and +H.
	* mips-opc.c (I65): New define for MIPS64r2.
	(mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins",
	"dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh",
	and "dshd" for MIPS64r2.  Adjust "dror", "dror32", and "drorv" to
	be supported on MIPS64r2.
 2003-09-30 16:17:15 +00:00
DJ Delorie
d38eb334b6 * sh.h (R_SH_SWITCH8, R_SH_GNU_VTINHERIT, R_SH_GNU_VTENTRY, 
R_SH_LOOP_START,R_SH_LOOP_END): Move to "reserved" spaces.
(R_SH_DIR16, R_SH_DIR8, R_SH_DIR8UL, R_SH_DIR8UW, R_SH_DIR8U,
R_SH_DIR8SW, R_SH_DIR8S, R_SH_DIR4UL, R_SH_DIR4UW, R_SH_DIR4U,
R_SH_PSHA, R_SH_PSHL): New.

* elf32-sh.c (sh_elf_howto_table): R_SH_SWITCH8,
R_SH_GNU_VTINHERIT, R_SH_GNU_VTENTRY,
R_SH_LOOP_START,R_SH_LOOP_END moved to "reserved" spaces,
R_SH_DIR16, R_SH_DIR8, R_SH_DIR8UL, R_SH_DIR8UW, R_SH_DIR8U,
R_SH_DIR8SW, R_SH_DIR8S, R_SH_DIR4UL, R_SH_DIR4UW, R_SH_DIR4U,
R_SH_PSHA, R_SH_PSHL added.
(sh_reloc_map): Add R_SH_DIR16 and R_SH_DIR8.
(sh_elf_relocate_section): Support new relocs.
 2003-09-24 02:27:57 +00:00
Nick Clifton
5d71380f12 Add enum values for HP extensions to DWARF standard 2003-09-11 11:20:42 +00:00
Nick Clifton
8ad30312ff Add binutils support for v850e1 processor 2003-09-04 11:04:38 +00:00
Nick Clifton
87a7a0c093 Add PGI extensions 2003-08-21 14:03:23 +00:00
Nick Clifton
3b260895e3 Add MSP430 variants 2003-08-08 10:14:52 +00:00
Alan Modra
8cf3f35467 Convert to C90. 2003-08-07 02:25:50 +00:00
Eric Christopher
deaaf2f370 2003-07-28 Eric Christopher <echristo@redhat.com> 
* elf32-ppc.c (R_PPC_RELAX32): New relocation.
        (ppc_elf_install_value): New function.
        (ppc_elf_sort_rela): Remove.
        (ppc_elf_relax_section): Rewrite. Remove old relaxation
        and replace with out of range branch stubs.
        (ppc_elf_relocate_section): Handle R_PPC_RELAX32.

2003-07-28  Eric Christopher  <echristo@redhat.com>

        * ppc.h (R_PPC_RELAX32): New. Fake relocation.
 2003-07-29 06:42:51 +00:00
H.J. Lu
2f89ff8d8e bfd/ 
2003-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* elf-bfd.h (bfd_elf_special_section): New.
	(elf_backend_data): Add special_sections, a pointer to
	bfd_elf_special_section.
	(elf_section_type). New.
	(elf_section_flags): New.
	(_bfd_elf_get_sec_type_attr): New.

	* elf.c (_bfd_elf_make_section_from_shdr): Always use the
	real section type/flags.
	(special_sections): New.
	(get_special_section): New.
	(_bfd_elf_get_sec_type_attr): New.
	(_bfd_elf_new_section_hook): Check special_section to set
	elf_section_type and elf_section_flags.
	(elf_fake_sections): Don't use section name to set ELF section
	data.

	* elf32-m32r.c (m32r_elf_special_sections): New.
	(elf_backend_special_sections): Defined.

	* elf32-m68hc11.c (elf32_m68hc11_special_sections): New.
	(elf_backend_special_sections): Defined.

	* elf32-mcore.c (mcore_elf_special_sections): New.
	(elf_backend_special_sections): Defined.

	* elf32-ppc.c (ppc_elf_special_sections): New.
	(elf_backend_special_sections): Defined.

	* elf32-sh64.c (sh64_elf_special_sections): New.
	(elf_backend_special_sections): Defined.

	* elf32-v850.c (v850_elf_special_sections): New.
	(elf_backend_special_sections): Defined.

	* elf32-xtensa.c (elf_xtensa_special_sections): New.
	(elf_backend_special_sections): Defined.

	* elf64-alpha.c (elf64_alpha_special_sections): New.
	(elf_backend_special_sections): Defined.

	* elf64-hppa.c (elf64_hppa_special_sections): New.
	(elf_backend_special_sections): Defined.

	* elf64-ppc.c (ppc64_elf_special_sections): New.
	(elf_backend_special_sections): Defined.

	* elf64-sh64.c (sh64_elf64_special_sections): New.
	(elf_backend_special_sections): Defined.

	* elfxx-ia64.c (elfNN_ia64_special_sections): New.
	(elf_backend_special_sections): Defined.

	* elfxx-mips.c (_bfd_mips_elf_special_sections): New.

	* elfxx-mips.h (_bfd_mips_elf_special_sections): New.
	(elf_backend_special_sections): Defined.

	* elfxx-target.h (elf_backend_special_sections): New. Default
	to NULL.
	(elfNN_bed): Initialize special_sections.

	* section.c (bfd_abs_section): Remove const.
	(bfd_und_section): Likewise.
	(bfd_com_section): Likewise.
	(bfd_ind_section): Likewise.

gas/

2003-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/obj-elf.c (special_sections): Removed.
	(obj_elf_change_section): Call _bfd_elf_get_sec_type_attr. Set
	elf_section_type and elf_section_flags.
	(elf_frob_file): Set SHT_GROUP.

	* config/obj-elf.h (obj_sec_set_private_data): New.

	* config/tc-alpha.h (ELF_TC_SPECIAL_SECTIONS): Removed.
	* config/tc-ia64.h: Likewise.
	* config/tc-m32r.h: Likewise.
	* config/tc-m68hc11.h: Likewise.
	* config/tc-mcore.h: Likewise.
	* config/tc-mips.h: Likewise.
	* config/tc-ppc.h: Likewise.
	* config/tc-sh64.h: Likewise.
	* config/tc-v850.h: Likewise.
	* config/tc-xtensa.h: Likewise.

	* config/tc-v850.h (SHF_V850_GPREL): Removed.
	(SHF_V850_EPREL): Likewise.
	(SHF_V850_R0REL): Likewise.

	* subsegs.c (subseg_get): Call obj_sec_set_private_data if it
	is defined.

include/elf/

2003-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* v850.h (SHF_V850_GPREL): New.
	(SHF_V850_EPREL): Likewise.
	(SHF_V850_R0REL): Likewise.
 2003-07-25 14:35:56 +00:00
Alexandre Oliva
937b783bb4 2001-05-16 Alexandre Oliva <aoliva@redhat.com> 
* mn10300.h: Introduce GOTPC16, GOTOFF24, GOTOFF16 and
PLT16, and rename GOTPC to GOTPC32 and GOTOFF to GOTOFF32.
Renumbered all relocs.
2001-04-12  Alexandre Oliva  <aoliva@redhat.com>
* mn10300.h (R_MN10300_GOTPC, R_MN10300_GOTOFF,
R_MN10300_PLT32, R_MN10300_GOT32, R_MN10300_GOT24,
R_MN10300_GOT16, R_MN10300_COPY, R_MN10300_GLOB_DAT,
R_MN10300_JMP_SLOT, R_MN10300_RELATIVE): New relocs.
 2003-07-10 03:19:40 +00:00
Alexandre Oliva
61398eab09 2000-04-01 Alexandre Oliva <aoliva@cygnus.com> 
* mn10300.h (E_MN10300_MACH_AM33_2): Renamed from
E_MN10300_MACH_AM332.
2000-03-31  Alexandre Oliva  <aoliva@cygnus.com>
* mn10300.h (E_MN10300_MACH_AM332): Defined.
 2003-07-10 02:49:00 +00:00
Martin Schwidefsky
89af415b3f * s390.h (elf_s390_reloc_type): Add long displacement relocations 
R_390_20, R_390_GOT20, R_390_GOTPLT20 and R_390_TLS_GOTIE20.
 2003-07-01 14:46:26 +00:00
Andreas Jaeger
fd6ba1fc70 * mmix.h: Convert to ISO C90 prototypes. 
* mips.h: Likewise.

	* reloc-macros.h (START_RELOC_NUMBERS): Convert to ISO C90
	prototype.
	(RELOC_NUMBER): Remove !__STDC__ code.
 2003-06-29 13:51:25 +00:00
Nick Clifton
9692141b0a (GNU_ABI_TAG_NETBSD): New tag. 
(GNU_ABI_TAG_FREEBSD): New tag.
 2003-06-13 13:07:51 +00:00
Richard Sandiford
f4984206d8 include/elf/ 
* h8.h (E_H8_MACH_H8300SXN): New flag.

bfd/
	* archures.c (bfd_mach_h8300sxn): New architecture.
	* bfd-in2.h: Regenerate.
	* cpu-h8300.c (h8300_scan): Check for 'sxn'.
	(h8300sxn_info_struct): New.
	(h8300sx_info_struct): Link to it.
	* elf32-h8300.c (elf32_h8_mach): Add h8300sxn case.
	(elf32_h8_final_write_processing): Likewise.

gas/
	* config/tc-h8300.c (h8300sxnmode): New.
	(md_pseudo_table): Add .h8300sxn entry.  Sync others with FSF version.

ld/
	* configure.tgt (h8300*): Add h8300sxn emulations.
	* Makefile.am (ALL_EMULATIONS): Add eh8300sxn.o and eh8300sxnelf.o.
	(eh8300sxn.c, eh8300sxnelf.c): New rules.
	* Makefile.in: Regenerate.
	* emulparams/h8300sxnelf.sh, emulparams/h8300sxn.sh: New files.
 2003-06-10 07:09:31 +00:00
Nick Clifton
e30ddb24b3 Add pc-relative 32-bit reloc to v850 port. Fixes ld-elf/merge test failure. 2003-06-03 16:24:06 +00:00
Roland McGrath
129b8c20a8 . 2003-05-21 00:57:35 +00:00
Michael Snyder
da7456c170 2003-05-14 Michael Snyder <msnyder@redhat.com> 
From  Bernd Schmidt  <bernds@redhat.com>
	* h8.h (E_H8_MACH_H8300SX): New.
 2003-05-16 23:40:08 +00:00
Nick Clifton
8d9cd6b19b Add support for h8300hn and h8300sn 2003-04-24 12:36:08 +00:00
Joern Rennecke
ef23021837 bfd: 
* archures.c (enum bfd_architecture): Amend comment to refer to SuperH.
        * cpu-sh.c: Likewise.
        * elf32-sh.c: Likewise.
        * reloc.c (bfd_reloc_code_real): Likewise.
        * elf32-sh64-com.c: Change comment to refer to SuperH.
        * elf32-sh64.c: Likewise.
        * elf64-sh64.c: Likewise.
        * bfd-in2.h (enum bfd_architecture): Regenerate.
binutils:
        * readelf.c (get_machine_name) <EM_SH>: Amend return value
        to refer to SuperH.
gas:
        * config/tc-sh.c: Amend comment to refer to SuperH.
        * config/tc-sh.h: Likewise.
        (LISTING_HEADER): Amend to refer to SuperH.
        * config/tc-sh64.c: Change comment to refer to SuperH.
        * config/tc-sh64.h (LISTING_HEADER): Change to refer to SuperH.
        * doc/as.texinfo [SH, GENERIC]: Amend / Change to refer to SuperH.
        * doc/c-sh.texi: Amend to refer to SuperH.
        Add SuperH architecture documentation references.
        * doc/c-sh64.texi: Change to refer to SuperH.
include/elf:
        * common.h (EM_SH): Amend comment to refer to SuperH.
ld/testsuite:
        * ld-sh/sh64/crange3-cmpct.rd (Machine): Change to refer to SuperH.
        * ld-sh/sh64/crange3-media.rd (Machine): Likewise.
 2003-04-23 21:09:04 +00:00
Nick Clifton
26597c8633 Replace references to Mitsubishi M32R with references to Renesas M32R. 2003-04-22 16:22:26 +00:00