Richard Earnshaw
52e7f43db0
2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
...
gas/testsuite
* gas/arm/barrier.s: New file.
* gas/arm/barrier.d: New file.
* gas/arm/barrier-thumb.s: New file.
* gas/arm/barrier-thumb.d: New file.
* gas/arm/barrier-bad.s: New file.
* gas/arm/barrier-bad.d: New file.
* gas/arm/barrier-bad.l: New file.
* gas/arm/barrier-bad-thumb.s: New file.
* gas/arm/barrier-bad-thumb.d: New file.
* gas/arm/barrier-bad-thumb.l: New file.
gas/config
* tc-arm.c (OP_oBARRIER): Remove.
(OP_oBARRIER_I15): Add.
(po_barrier_or_imm): Add macro.
(parse_operands): Improve OP_oBARRIER_I15 operand parsing.
(do_barrier): Check correct immediate range.
(do_t_barrier): Likewise.
(barrier_opt_names): Add entries for more symbolic operands.
(insns): Replace OP_oBARRIER with OP_oBARRIER_I15 for barriers.
opcodes/
* arm-dis.c (print_insn_arm): Add cases for printing more
symbolic operands.
(print_insn_thumb32): Likewise.
2010-07-08 22:40:28 +00:00
Maciej W. Rozycki
c680e7f672
* mips-dis.c (print_insn_mips): Correct branch instruction type
...
determination.
2010-07-06 00:06:04 +00:00
Maciej W. Rozycki
9a2c708887
gas/
...
* config/tc-mips.c (nops_for_insn_or_target): Replace
MIPS16_INSN_BRANCH with MIPS16_INSN_UNCOND_BRANCH and
MIPS16_INSN_COND_BRANCH.
include/opcode/
* mips.h (MIPS16_INSN_UNCOND_BRANCH): New macro.
(MIPS16_INSN_BRANCH): Rename to...
(MIPS16_INSN_COND_BRANCH): ... this.
opcodes/
* mips-dis.c (print_mips16_insn_arg): Remove branch instruction
type and delay slot determination.
(print_insn_mips16): Extend branch instruction type and delay
slot determination to cover all instructions.
* mips16-opc.c (BR): Remove macro.
(UBR, CBR): New macros.
(mips16_opcodes): Update branch annotation for "b", "beqz",
"bnez", "bteqz" and "btnez". Add branch annotation for "jalrc"
and "jrc".
2010-07-06 00:02:46 +00:00
H.J. Lu
d7d9a9f820
Replace rdrnd with rdrand.
...
gas/testsuite/
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* gas/i386/rdrnd.s: Replace rdrnd with rdrand.
* gas/i386/rdrnd-intel.d: Likewise.
* gas/i386/rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd-intel.d: Likewise.
* gas/i386/x86-64-rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd.s: Likewise.
opcodes/
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* i386-dis.c (mod_table): Replace rdrnd with rdrand.
* i386-opc.tbl: Likewise.
* i386-tbl.h: Regenerated.
2010-07-05 17:14:22 +00:00
H.J. Lu
77321f5360
Fix a typo in comments for CpuFSGSBase.
...
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (CpuFSGSBase): Fix a typo in comments.
2010-07-05 16:40:32 +00:00
Andreas Schwab
3a5530eaab
Update.
2010-07-03 08:29:51 +00:00
Andreas Schwab
7102e95e49
gas/:
...
* config/tc-ppc.c (ppc_set_cpu): Cast PPC_OPCODE_xxx to ppc_cpu_t
before inverting.
binutils/:
* ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
ppc_cpu_t before inverting.
2010-07-03 08:27:23 +00:00
Alan Modra
bdc70b4a03
include/opcode/
...
* ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete.
Renumber other PPC_OPCODE defines.
gas/
* config/tc-ppc.c (ppc_set_cpu): Remove old opcode flags.
(ppc_setup_opcodes): Likewise. Simplify opcode selection.
opcodes/
* ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
* ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
(PPC64, MFDEC2): Update.
(NON32, NO371): Define.
(powerpc_opcode): Update to not use old opcode flags, and avoid
-m601 duplicates.
2010-07-03 06:51:56 +00:00
DJ Delorie
21375995bd
* m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
...
* m32c-ibld.c: Regenerate.
2010-07-03 04:09:56 +00:00
Alan Modra
81a0b7e2ae
* ppc-opc.c (PWR2COM): Define.
...
(PPCPWR2): Add PPC_OPCODE_COMMON.
(powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
"fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst",
"rac" from -mcom.
2010-07-03 03:33:17 +00:00
H.J. Lu
a00eb5e843
Update ChangeLog entry.
2010-07-01 21:57:04 +00:00
H.J. Lu
c7b8aa3a72
Support AVX Programming Reference (June, 2010)
...
gas/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* config/tc-i386.c (cpu_arch): Add .xsaveopt, .fsgsbase, .rdrnd
and .f16c.
* doc/c-i386.texi: Document xsaveopt, fsgsbase, rdrnd and f16c.
gas/testsuite/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* gas/i386/arch-10.s: Add xsaveopt.
* gas/i386/x86-64-arch-2.s: Likwise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/f16c-intel.d: New.
* gas/i386/f16c.d: Likewise.
* gas/i386/f16c.s: Likewise.
* gas/i386/fsgs-intel.d: Likewise.
* gas/i386/fsgs.d: Likewise.
* gas/i386/fsgs.s: Likewise.
* gas/i386/rdrnd-intel.d: Likewise.
* gas/i386/rdrnd.d: Likewise.
* gas/i386/rdrnd.s: Likewise.
* gas/i386/x86-64-f16c-intel.d: Likewise.
* gas/i386/x86-64-f16c.d: Likewise.
* gas/i386/x86-64-f16c.s: Likewise.
* gas/i386/x86-64-fsgs-intel.d: Likewise.
* gas/i386/x86-64-fsgs.d: Likewise.
* gas/i386/x86-64-fsgs.s: Likewise.
* gas/i386/x86-64-rdrnd-intel.d: Likewise.
* gas/i386/x86-64-rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd.s: Likewise.
* gas/i386/i386.exp: Run f16c, f16c-intel, fsgs, fsgs-intel,
rdrnd, rdrnd-intel, x86-64-f16c, x86-64-f16c-intel, x86-64-fsgs,
x86-64-fsgs-intel, x86-64-rdrnd, x86-64-rdrnd-intel.
* gas/i386/x86-64-xsave.s: Add tests for xsaveopt64.
* gas/i386/x86-64-xsave-intel.d: Updated.
* gas/i386/x86-64-xsave.d: Likewise.
opcodes/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* i386-dis.c (PREFIX_0FAE_REG_0): New.
(PREFIX_0FAE_REG_1): Likewise.
(PREFIX_0FAE_REG_2): Likewise.
(PREFIX_0FAE_REG_3): Likewise.
(PREFIX_VEX_3813): Likewise.
(PREFIX_VEX_3A1D): Likewise.
(prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
PREFIX_VEX_3A1D.
(vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
(mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
* i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
(cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
* i386-opc.h (CpuXsaveopt): New.
(CpuFSGSBase):Likewise.
(CpuRdRnd): Likewise.
(CpuF16C): Likewise.
(i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
cpuf16c.
* i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
2010-07-01 21:55:02 +00:00
Alan Modra
09a8ad8d8f
* ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
...
and mtocrf on EFS.
2010-07-01 02:29:12 +00:00
Alan Modra
360cfc9c8b
remove maxq-coff port
2010-06-29 04:17:34 +00:00
Alan Modra
dc898d5e26
cgen/
...
* cpu/mep.opc (mep_examine_ivc2_insns): Delete set but unused var.
opcodes/
* mep-dis.c: Regenerate.
2010-06-28 14:41:59 +00:00
Matthew Gretton-Dann
8e56076649
* gas/config/tc-arm.c (parse_neon_alignment): New function.
...
(parse_address_main): Fix Neon load/store alignment parsing.
* gas/testsuite/gas/arm/neon-ldst-align-bad.l: Update for Neon alignment syntax fix.
* gas/testsuite/gas/arm/neon-ldst-align-bad.s: Likewise.
* gas/testsuite/gas/arm/neon-ldst-es.d: Likewise.
* gas/testsuite/gas/arm/neon-ldst-es.s: Likewise.
* opcodes/arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
2010-06-28 09:10:25 +00:00
Alan Modra
c7e2358a88
fix set but unused variable warnings
2010-06-27 04:07:55 +00:00
Nick Clifton
6ffe3d995f
PR gas/11673
...
* m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
* gas/m68k/p11673.s: New test.
* gas/m68k/all.exp: Run the new test.
2010-06-16 16:27:37 +00:00
Nick Clifton
09ec0d177a
2010-06-16 Vincent Rivire <vincent.riviere@freesbee.fr>
...
PR binutils/11676
* m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
2010-06-16 Nick Clifton <nickc@redhat.com>
PR binutils/11676
* gas/m68k/pr11676.s: New test.
* gas/m68k/pr11676.d: Expected disassembly.
* gas/m68k/all.exp: Run the new test.
2010-06-16 15:12:51 +00:00
Alan Modra
e01d869a3b
gas/
...
* config/tc-ppc.c (md_assemble): Emit APUinfo section for
PPC_OPCODE_E500.
gas/testsuite/
* gas/ppc/e500.s: Add eieio, mbar and lwsync
* gas/ppc/e500.d: Likewise.
include/opcode/
* ppc.h (PPC_OPCODE_E500): Define.
opcodes/
* ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
* ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
touch floating point regs and are enabled by COM, PPC or PPCCOM.
Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
Treat lwsync as msync on e500.
2010-06-14 14:48:05 +00:00
Matthew Gretton-Dann
1f4e495053
* gas/testsuite/gas/arm/thumb-eabi.d: Add case for divided syntax encoding of movs.
...
* gas/testsuite/gas/arm/thumb.d: Likewise.
* gas/testsuite/gas/arm/thumb.s: Likewise.
* gas/testsuite/gas/arm/thumb2_it.d: Update for change in lsls/movs disassembly.
* gas/testsuite/gas/arm/thumb2_it_auto.d: Liekwise.
* gas/testsuite/gas/arm/thumb32.d: Likewise.
* ld/testsuite/ld-arm/arm-call.d: Handle change in lsls/movs disassembly.
* ld/testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise.
* ld/testsuite/ld-arm/farcall-thumb-thumb-blx-pic-veneer.d: Likewise.
* ld/testsuite/ld-arm/farcall-thumb-thumb-blx.d: Likewise.
* ld/testsuite/ld-arm/farcall-thumb-thumb-m-pic-veneer.d: Likewise.
* ld/testsuite/ld-arm/farcall-thumb-thumb-m.d: Likewise.
* ld/testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise.
* ld/testsuite/ld-arm/farcall-thumb-thumb.d: Likewise.
* ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad-noeabi.d: Likewise.
* ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d: Likewise.
* ld/testsuite/ld-arm/thumb2-bl-bad-noeabi.d: Likewise.
* ld/testsuite/ld-arm/thumb2-bl-bad.d: Likewise.
* opcodes/arm-dis.c (thumb-opcodes): Add disassembly for movs.
2010-06-07 10:43:52 +00:00
Matthew Gretton-Dann
9d82ec3801
* opcodes/arm-dis.c (print_insn_neon): Ensure disassembly of Neon
...
constants is the same on 32-bit and 64-bit hosts.
2010-05-28 16:04:21 +00:00
Nick Clifton
c3a6ea62fc
Fix typo in ChangeLog entry.
2010-05-27 10:45:52 +00:00
Nick Clifton
d8b24b9569
* m68k-dis.c (print_insn_m68k): Emit undefined instructions as
...
.short directives so that they can be reassembled.
2010-05-27 10:43:27 +00:00
Catherine Moore
9db8dccb17
2010-05-26 Catherine Moore <clm@codesourcery.com>
...
David Ung <davidu@mips.com>
* mips-opc.c: Change membership to I1 for instructions ssnop and
ehb.
2010-05-26 Catherine Moore <clm@codesoucery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
* gas/mips/set-arch.d: Expect ehb.
2010-05-26 21:49:30 +00:00
H.J. Lu
dfc8cf43a1
Add SIB.
...
2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (sib): New.
(get_sib): Likewise.
(print_insn): Call get_sib.
OP_E_memory): Use sib.
2010-05-26 16:08:23 +00:00
Catherine Moore
f79e2745b2
gas/
...
* config/tc-mips.c (is_opcode_valid): Remove expansionp.
(macro_build): Change invocation of is_opcode_valid.
(mips_ip): Likewise.
gas/testsuite/
* gas/mips/mips-no-jalx.l: Delete.
* gas/mips/mips-no-jalx.s: Delete.
* gas/mips/mips-jalx-2.d: New.
* gas/mips/mips-jalx-2.s: New.
* gas/mips/mips.exp (mips-jalx-2): Run new test.
(mips-no-jalx): Remove deleted test.
include/
* opcode/mips.h (INSN_MIPS16): Remove.
opcodes/
* mips-dis.c (mips_arch): Remove INSN_MIPS16.
* mips-opc.c (I16): Remove.
(mips_builtin_op): Reclassify jalx.
2010-05-26 12:59:56 +00:00
Alan Modra
51b5d4a8c5
* ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
...
divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
2010-05-19 03:44:36 +00:00
Alan Modra
85d4ac0b3c
Correct wclr encoding.
2010-05-13 06:30:09 +00:00
Nick Clifton
4547cb569c
2010-05-10 Andrew Stubbs <ams@codesourcery.com>
...
gas/
* config/tc-arm.c (aeabi_set_public_attributes): Set Tag_DIV_use.
gas/testsuite/
* gas/arm/attr-cpu-directive.d: Add Tag_DIV_use.
* gas/arm/attr-default.d: Likewise.
* gas/arm/attr-march-armv1.d: Likewise.
* gas/arm/attr-march-armv2.d: Likewise.
* gas/arm/attr-march-armv2a.d: Likewise.
* gas/arm/attr-march-armv2s.d: Likewise.
* gas/arm/attr-march-armv3.d: Likewise.
* gas/arm/attr-march-armv3m.d: Likewise.
* gas/arm/attr-march-armv4.d: Likewise.
* gas/arm/attr-march-armv4t.d: Likewise.
* gas/arm/attr-march-armv4txm.d: Likewise.
* gas/arm/attr-march-armv4xm.d: Likewise.
* gas/arm/attr-march-armv5.d: Likewise.
* gas/arm/attr-march-armv5t.d: Likewise.
* gas/arm/attr-march-armv5te.d: Likewise.
* gas/arm/attr-march-armv5tej.d: Likewise.
* gas/arm/attr-march-armv5texp.d: Likewise.
* gas/arm/attr-march-armv5txm.d: Likewise.
* gas/arm/attr-march-armv6-m.d: Likewise.
* gas/arm/attr-march-armv6.d: Likewise.
* gas/arm/attr-march-armv6j.d: Likewise.
* gas/arm/attr-march-armv6k.d: Likewise.
* gas/arm/attr-march-armv6kt2.d: Likewise.
* gas/arm/attr-march-armv6t2.d: Likewise.
* gas/arm/attr-march-armv6z.d: Likewise.
* gas/arm/attr-march-armv6zk.d: Likewise.
* gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/arm/attr-march-armv7-a.d: Likewise.
* gas/arm/attr-march-armv7.d: Likewise.
* gas/arm/attr-march-armv7a.d: Likewise.
* gas/arm/attr-march-iwmmxt.d: Likewise.
* gas/arm/attr-march-iwmmxt2.d: Likewise.
* gas/arm/attr-march-marvell-f.d: Likewise.
* gas/arm/attr-march-xscale.d: Likewise.
* gas/arm/attr-mcpu.d: Likewise.
* gas/arm/attr-mfpu-arm1020e.d: Likewise.
* gas/arm/attr-mfpu-arm1020t.d: Likewise.
* gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* gas/arm/attr-mfpu-arm7500fe.d: Likewise.
* gas/arm/attr-mfpu-fpa.d: Likewise.
* gas/arm/attr-mfpu-fpa10.d: Likewise.
* gas/arm/attr-mfpu-fpa11.d: Likewise.
* gas/arm/attr-mfpu-fpe.d: Likewise.
* gas/arm/attr-mfpu-fpe2.d: Likewise.
* gas/arm/attr-mfpu-fpe3.d: Likewise.
* gas/arm/attr-mfpu-maverick.d: Likewise.
* gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* gas/arm/attr-mfpu-neon.d: Likewise.
* gas/arm/attr-mfpu-softfpa.d: Likewise.
* gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* gas/arm/attr-mfpu-softvfp.d: Likewise.
* gas/arm/attr-mfpu-vfp.d: Likewise.
* gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* gas/arm/attr-mfpu-vfp10.d: Likewise.
* gas/arm/attr-mfpu-vfp3.d: Likewise.
* gas/arm/attr-mfpu-vfp9.d: Likewise.
* gas/arm/attr-mfpu-vfpv2.d: Likewise.
* gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv3.d: Likewise.
* gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/arm/attr-order.d: Likewise.
* gas/arm/attr-override-cpu-directive.d: Likewise.
* gas/arm/attr-override-mcpu.d: Likewise.
* gas/arm/eabi_attr_1.d: Likewise.
ld/testsuite/
* ld-arm/attr-merge-2.attr: Add Tag_DIV_use.
* ld-arm/attr-merge-2a.s: Likewise.
* ld-arm/attr-merge-2b.s: Likewise.
* ld-arm/attr-merge-3a.s: Likewise.
* ld-arm/attr-merge-3b.s: Likewise.
* ld-arm/attr-merge-4.attr: Likewise.
* ld-arm/attr-merge-5.attr: Likewise.
* ld-arm/attr-merge-6.attr: Likewise.
* ld-arm/attr-merge-7.attr: Likewise.
* ld-arm/attr-merge-arch-1.attr: Likewise.
* ld-arm/attr-merge-arch-2.attr: Likewise.
* ld-arm/attr-merge-unknown-2.d: Likewise.
* ld-arm/attr-merge-unknown-2r.d: Likewise.
* ld-arm/attr-merge-unknown-3.d: Likewise.
* ld-arm/attr-merge-vfp-1.d: Likewise.
* ld-arm/attr-merge-vfp-1r.d: Likewise.
* ld-arm/attr-merge-vfp-2.d: Likewise.
* ld-arm/attr-merge-vfp-2r.d: Likewise.
* ld-arm/attr-merge-vfp-3.d: Likewise.
* ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld-arm/attr-merge-vfp-4.d: Likewise.
* ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld-arm/attr-merge-vfp-5.d: Likewise.
* ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-00.d: Likewise.
* ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-02.d: Likewise.
* ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-04.d: Likewise.
* ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-20.d: Likewise.
* ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-22.d: Likewise.
* ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-40.d: Likewise.
* ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-44.d: Likewise.
* ld-arm/attr-merge.attr: Likewise.
2010-04-07 Jie Zhang <jie@codesourcery.com>
gas/
* config/tc-arm.c (aeabi_set_public_attributes): Set
Tag_ABI_HardFP_use to 1 if a single precision FPU is selected.
gas/testsuite/
* gas/arm/attr-mfpu-vfpxd.d: New test.
bfd/
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Merge
Tag_ABI_HardFP_use correctly.
ld/testsuite/
* ld-arm/attr-merge-vfp-6.d: New test.
* ld-arm/attr-merge-vfp-6r.d: New test.
* ld-arm/attr-merge-vfpv3xd.s: New test.
* ld-arm/arm-elf.exp: Add attr-merge-vfp-6 and attr-merge-vfp-6r.
2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
format.
(print_insn_thumb16): Add support for new %W format.
* gas/arm/thumb32.d: Fix expected disassembly of ldmia
instruction.
2010-05-11 17:36:33 +00:00
Tristan Gingold
6540b386f0
bfd/
...
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
bfd/doc/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
binutils/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
* doc/Makefile.in: Ditto.
gas/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
* doc/Makefile.in: Ditto.
gprof/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
ld/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
opcodes/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
2010-05-07 12:28:50 +00:00
Nick Clifton
3e01a7fd46
Updated Spanish translations.
2010-05-05 15:28:26 +00:00
Nick Clifton
9c9c98a59d
Updated translation templates.
...
Updated Bulgarian translation.
Updated Finnish translations.
Updated French translations.
Updated Vietnamese translations.
2010-04-22 14:37:16 +00:00
H.J. Lu
f07af43e36
Return bad_opcode on unknown bits in opcode.
...
2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
bits in opcode.
2010-04-16 21:35:24 +00:00
Nick Clifton
3d540e936b
bfd/ChangeLog
...
2010-04-09 Nick Clifton <nickc@redhat.com>
* aoutx.h (aout_link_input_bfd): Remove unused variable sym_count.
* elf-eh-frame.c (_bfd_elf_eh_frame_section_offset): Remove unused
variables htab and hdr_info and mark info parameter as unused.
* elf.c (prep_headers): Remove unused variable i_phdrp.
(_bfd_elf_write_object_contents): Remove unused variable i_ehdrp.
* elf32-i386.c (elf_i386_relocate_section): Mark variabled warned
as unused.
* peXXigen.c (pe_print_reloc): Remove unused variable datasize.
* verilog.c (verilog_write_section): Remove unused variable
address.
binutils/ChangeLog
2010-04-09 Nick Clifton <nickc@redhat.com>
* dwarf.c (process_debug_info): Remove unused variable
cu_abbrev_offset_ptr.
(display_debug_lines_decoded): Remove unused variable prev_line.
* elfedit.c (process_archive): Remove unused variable
file_name_size.
* ieee.c (ieee_start_compilation_unit): Remove unused variable
nindx.
(ieee_set_type): Remove unused variables info, targetindx and
baseindx.
* objdump.c (disassmble_byte): Remove unused variable done_dot.
* rddbg.c (read_section_stabs_debugging_info): Remove unused
variable other.
* readelf.c (dump_section_as_strings): Remove unused variable
addr.
(process_archive): Remove unused variable file_name_size.
* stabs.c (parse_stab_string): Mark desc parameter as unused.
Remove unused variable lineno.
(parse_stab_struct_type): Remove unused variable orig.
(stab_demangle_type): Remove unused variables constp, volatilep
and hold.
gas/ChangeLog
2010-04-09 Nick Clifton <nickc@redhat.com>
* as.c (create_obj_attrs_section): Remove unused variable addr.
* listing.c (listing_listing): Remove unused variable message.
* read.c: Remove unnecessary register type qualifiers.
(s_mri): Only define/use old_flag variable if MRI_MODE_CHANGE is
defined.
ld/ChangeLog
2010-04-09 Nick Clifton <nickc@redhat.com>
* ldlang.c (wild_sort): Remove unused variable section_name.
opcodes/ChangeLog
2010-04-09 Nick Clifton <nickc@redhat.com>
* i386-dis.c (print_insn): Remove unused variable op.
(OP_sI): Remove unused variable mask.
2010-04-09 14:40:18 +00:00
Alan Modra
397841b5ae
* configure: Regenerate.
2010-04-07 07:20:51 +00:00
Peter Bergner
cee62821d4
opcodes/
...
* ppc-opc.c (RBOPT): New define.
("dccci"): Enable for PPCA2. Make operands optional.
("iccci"): Likewise. Do not deprecate for PPC476.
gas/testsuite/
* gas/ppc/476.d ("dccci", "dci", "iccci"): Add tests.
* gas/ppc/476.s: Likewise.
* gas/ppc/a2.d ("dccci", "dci", "iccci", "ici"): Add tests.
* gas/ppc/a2.s: Likewise.
2010-04-06 16:04:34 +00:00
Nick Clifton
accf44633e
* cr16-opc.c (cr16_instruction): Fix typo in comment.
2010-04-06 15:41:43 +00:00
Joseph Myers
40b365969f
bfd:
...
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
(BFD32_BACKENDS): Add elf32-tic6x.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
* Makefile.in: Regenerate.
* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
(bfd_archures_list): Update.
* config.bfd (tic6x-*-elf): New.
* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
New.
* configure: Regenerate.
* cpu-tic6x.c, elf32-tic6x.c: New.
* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
(_bfd_target_vector): Update.
* bfd-in2.h, libbfd.h: Regenerate.
binutils:
* MAINTAINERS: Add self as TI C6X maintainer.
* NEWS: Add news entry for TI C6X support.
* readelf.c: Include elf/tic6x.h.
(guess_is_rela): Handle EM_TI_C6000.
(dump_relocations): Likewise.
(get_tic6x_dynamic_type): New.
(get_dynamic_type): Call it.
(get_machine_flags): Handle EF_C6000_REL.
(get_osabi_name): Handle machine-specific values only for relevant
machines. Handle C6X values.
(get_tic6x_segment_type): New.
(get_segment_type): Call it.
(get_tic6x_section_type_name): New.
(get_section_type_name): Call it.
(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
EM_TI_C6000.
gas:
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
* Makefile.in: Regenerate.
* NEWS: Add news entry for TI C6X support.
* app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
operands if TC_KEEP_OPERAND_SPACES.
* configure.tgt (tic6x-*-*): New.
* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
TC_PREDICATE_END_CHAR): Define.
* config/tc-tic6x.c, config/tc-tic6x.h: New.
* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TIC6X): Define.
* doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
* doc/c-tic6x.texi: New.
gas/testsuite:
* gas/tic6x: New directory and testcases.
include:
* dis-asm.h (print_insn_tic6x): Declare.
include/elf:
* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
* tic6x.h: New.
include/opcode:
* tic6x-control-registers.h, tic6x-insn-formats.h,
tic6x-opcode-table.h, tic6x.h: New.
ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
eelf32_tic6x_le.o.
(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
* NEWS: Add news entry for TI C6X support.
* configure.tgt (tic6x-*-*): New.
* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.
ld/testsuite:
* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
* ld-tic6x: New directory and testcases.
opcodes:
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
* Makefile.in: Regenerate.
* configure.in (bfd_tic6x_arch): New.
* configure: Regenerate.
* disassemble.c (ARCH_tic6x): Define if ARCH_all.
(disassembler): Handle TI C6X.
* tic6x-dis.c: New.
2010-03-25 21:12:36 +00:00
Mike Frysinger
1985c81cf5
Blackfin disassmbler: fix typo where M2.H was decoded as L2.H
2010-03-24 05:16:29 +00:00
Joseph Myers
f66187fdfe
* dis-buf.c (buffer_read_memory): Give error for reading just
...
before the start of memory.
2010-03-23 15:59:45 +00:00
Sebastian Pop
ce7d077ec0
2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
...
Quentin Neill <quentin.neill@amd.com>
opcodes/
* i386-dis.c (OP_LWP_I): Removed.
(reg_table): Do not use OP_LWP_I, use Iq.
(OP_LWPCB_E): Remove use of names16.
(OP_LWP_E): Same.
* i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
should not set the Vex.length bit.
* i386-tbl.h: Regenerated.
gas/
* testsuite/gas/i386/x86-64-lwp.s: Remove use of 16bit LWP insns.
* testsuite/gas/i386/lwp.s: Same.
* testsuite/gas/i386/x86-64-lwp.d: Updated.
* testsuite/gas/i386/lwp.d: Updated.
2010-03-23 02:56:24 +00:00
Alan Modra
63d0fa4e9e
* ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
2010-02-25 01:00:13 +00:00
Nick Clifton
c060226ad0
PR binutils/6773
...
* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
<prefix>asx. Replace <prefix>subaddx with <prefix>sax.
(thumb32_opcodes): Likewise.
* gas/arm/arch7em.d: Replace expected disassembly of
<prefix>addsubx with <prefix>asx. Also replace <prefix>subaddx
with <prefix>sax.
* gas/arm/archv6.d: Likewise.
* gas/arm/thumb32.d: Likewise.
2010-02-24 15:11:44 +00:00
Nick Clifton
ab7875de80
Updated Vietnamese translation.
2010-02-15 10:09:39 +00:00
Doug Evans
fee1d3e815
* lm32-opinst.c: Regenerate.
2010-02-13 04:38:57 +00:00
Doug Evans
9468ae8905
* cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
...
(print_address): Delete CGEN_PRINT_ADDRESS.
* fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
* lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
* m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
* xc16x-dis.c, * xstormy16-dis.c: Regenerate.
2010-02-12 04:42:28 +00:00
Doug Evans
37ec92403b
* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
...
* frv-desc.c, * frv-desc.h, * frv-opc.c,
* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
* mep-desc.c, * mep-desc.h, * mep-opc.c,
* mt-desc.c, * mt-desc.h, * mt-opc.c,
* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
2010-02-12 03:25:49 +00:00
H.J. Lu
c75ef631bd
Update copyright.
...
gas/
2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c: Update copyright.
opcodes/
2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c: Update copyright.
* i386-gen.c: Likewise.
* i386-opc.h: Likewise.
* i386-opc.tbl: Likewise.
2010-02-11 13:41:19 +00:00
Sebastian Pop
a683cc34e4
2010-02-10 Quentin Neill <quentin.neill@amd.com>
...
Sebastian Pop <sebastian.pop@amd.com>
gas:
* config/tc-i386.c (vec_imm4) New operand type.
(fits_in_imm4): New.
(VEX_check_operands): New.
(check_reverse): Call VEX_check_operands.
(build_modrm_byte): Reintroduce code for 5
operand insns. Fix whitespace.
gas/testsuite:
* gas/i386/x86-64-xop.d: Add vpermil2p[sd] tests.
* gas/i386/x86-64-xop.s: Likewise.
* gas/i386/xop.d: Likewise.
* gas/i386/xop.s: Likewise.
opcodes:
* i386-dis.c (OP_EX_VexImmW): Reintroduced
function to handle 5th imm8 operand.
(PREFIX_VEX_3A48): Added.
(PREFIX_VEX_3A49): Added.
(VEX_W_3A48_P_2): Added.
(VEX_W_3A49_P_2): Added.
(prefix table): Added entries for PREFIX_VEX_3A48
and PREFIX_VEX_3A49.
(vex table): Added entries for VEX_W_3A48_P_2 and
and VEX_W_3A49_P_2.
* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
for Vec_Imm4 operands.
* i386-opc.h (enum): Added Vec_Imm4.
(i386_operand_type): Added vec_imm4.
* i386-opc.tbl: Add entries for vpermilp[ds].
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2010-02-11 05:06:14 +00:00
Richard Sandiford
cdc51b0748
gas/
...
* config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
-mpwr6 and -mpwr7.
opcodes/
* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
and "pwr7". Move "a2" into alphabetical order.
2010-02-10 19:59:07 +00:00
Alan Modra
ce3d2015b2
include/
...
* opcode/ppc.h (PPC_OPCODE_TITAN): Define.
bfd/
* archures.c (bfd_mach_ppc_titan): Define.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add titan entry.
opcodes/
* ppc-dis.c (ppc_opts): Add titan entry.
* ppc-opc.c (TITAN, MULHW): Define.
(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
gas/
* config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
(ppc_mach): Handle titan.
* doc/c-ppc.texi: Mention -mtitan.
gas/testsuite/
* gas/ppc/titan.d, * gas/ppc/titan.s: New test.
* gas/ppc/ppc.exp: Run it.
2010-02-08 01:59:38 +00:00
Sebastian Pop
68339fdf88
2010-02-03 Quentin Neill <quentin.neill@amd.com>
...
gas/
* config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
(i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
* config/tc-i386.h (processor_type): Same.
* doc/c-i386.texi: Change amdfam15 to bdver1.
opcodes/
* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
to CPU_BDVER1_FLAGS
* i386-init.h: Regenerated.
testsuite/
* gas/i386/i386.exp: Rename amdfam15 test cases to bdver1.
* gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to
gas/i386/x86-64-nops-1-bdver1.d.
* gas/i386/nops-1-amdfam15.d: Renamed test case to
gas/i386/nops-1-bdver1.d.
2010-02-03 20:36:14 +00:00
Anthony Green
f3d55a94f3
Move NOP from 0x00 to 0x0f.
2010-02-03 12:47:06 +00:00
Daniel Jacobowitz
b0e28b39b7
gas/testsuite/
...
* gas/arm/dis-data.d: Update test name. Do not expect
.word output.
* gas/arm/dis-data2.d, gas/arm/dis-data2.s,
gas/arm/dis-data3.d, gas/arm/dis-data3.s: New tests.
opcodes/
* opcodes/arm-dis.c (struct arm_private_data): New.
(print_insn_coprocessor, print_insn_arm): Update to use struct
arm_private_data.
(is_mapping_symbol, get_map_sym_type): New functions.
(get_sym_code_type): Check the symbol's section. Do not check
mapping symbols.
(print_insn): Default to disassembling ARM mode code. Check
for mapping symbols separately from other symbols. Use
struct arm_private_data.
2010-01-29 16:47:55 +00:00
H.J. Lu
1c4809636b
Allow VL=1 on scalar FMA instructions.
...
gas/testsuite/
2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/fma-scalar-intel.d: New.
* gas/i386/fma-scalar.d: Likewise.
* gas/i386/fma-scalar.s: Likewise.
* gas/i386/x86-64-fma-scalar-intel.d: Likewise.
* gas/i386/x86-64-fma-scalar.d: Likewise.
* gas/i386/x86-64-fma-scalar.s: Likewise.
* gas/i386/i386.exp: Run fma-scalar, fma-scalar-intel,
x86-64-fma-scalar and x86-64-fma-scalar-intel.
opcodes/
2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (EXVexWdqScalar): New.
(vex_scalar_w_dq_mode): Likewise.
(prefix_table): Update entries for PREFIX_VEX_3899,
PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
PREFIX_VEX_38BD and PREFIX_VEX_38BF.
(intel_operand_size): Handle vex_scalar_w_dq_mode.
(OP_EX): Likewise.
2010-01-28 15:33:23 +00:00
H.J. Lu
539f890d01
Allow VL=1 on AVX scalar instructions.
...
gas/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (avxscalar): New.
(OPTION_MAVXSCALAR): Likewise.
(build_vex_prefix): Select vector_length for scalar instructions
based on avxscalar.
(md_longopts): Add OPTION_MAVXSCALAR.
(md_parse_option): Handle OPTION_MAVXSCALAR.
(md_show_usage): Add -mavxscalar=.
* doc/c-i386.texi: Document -mavxscalar=.
gas/testsuite/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/avx-scalar-intel.d: New.
* gas/i386/avx-scalar.d: Likewise.
* gas/i386/avx-scalar.s: Likewise.
* gas/i386/x86-64-avx-scalar-intel.d: Likewise.
* gas/i386/x86-64-avx-scalar.d: Likewise.
* gas/i386/x86-64-avx-scalar.s: Likewise.
* gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel,
x86-64-avx-scalar and x86-64-avx-scalar-intel.
opcodes/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (XMScalar): New.
(EXdScalar): Likewise.
(EXqScalar): Likewise.
(EXqScalarS): Likewise.
(VexScalar): Likewise.
(EXdVexScalarS): Likewise.
(EXqVexScalarS): Likewise.
(XMVexScalar): Likewise.
(scalar_mode): Likewise.
(d_scalar_mode): Likewise.
(d_scalar_swap_mode): Likewise.
(q_scalar_mode): Likewise.
(q_scalar_swap_mode): Likewise.
(vex_scalar_mode): Likewise.
(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
q_scalar_mode, q_scalar_swap_mode.
(OP_XMM): Handle scalar_mode.
(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
and q_scalar_swap_mode.
(OP_VEX): Handle vex_scalar_mode.
2010-01-27 14:34:40 +00:00
H.J. Lu
208b4d786e
Remove trailing { Bad_Opcode }.
2010-01-24 23:22:43 +00:00
H.J. Lu
448b213a86
Remove trailing { Bad_Opcode } in vex_len_table.
...
2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
2010-01-24 21:35:13 +00:00
H.J. Lu
47cf8fa043
Remove trailing { Bad_Opcode }.
...
2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
2010-01-24 20:39:40 +00:00
H.J. Lu
592d1631a4
Remove trailing "(bad)" entries and replace { "(bad)", { XX } }
...
with { Bad_Opcode }.
2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (Bad_Opcode): New.
(bad_opcode): Likewise.
(dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
(dis386_twobyte): Likewise.
(reg_table): Likewise.
(prefix_table): Likewise.
(x86_64_table): Likewise.
(vex_len_table): Likewise.
(vex_w_table): Likewise.
(mod_table): Likewise.
(rm_table): Likewise.
(float_reg): Likewise.
(reg_table): Remove trailing "(bad)" entries.
(prefix_table): Likewise.
(x86_64_table): Likewise.
(vex_len_table): Likewise.
(vex_w_table): Likewise.
(mod_table): Likewise.
(rm_table): Likewise.
(get_valid_dis386): Handle bytemode 0.
2010-01-24 18:24:23 +00:00
H.J. Lu
712366da0a
Replace "Vex" with "Vex=3" on AVX scalar instructions.
...
2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (VEXScalar): New.
* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
instructions.
* i386-tbl.h: Regenerated.
2010-01-24 00:59:13 +00:00
H.J. Lu
706e820514
Correct month.
2010-01-21 17:32:32 +00:00
H.J. Lu
73bb672904
Add xsave64 and xrstor64.
...
gas/testsuite/
2010-02-21 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-xsave.s: Add tests for xsave64 and xrstor64.
* gas/i386/x86-64-xsave-intel.d: Updated.
* gas/i386/x86-64-xsave.d: Likewise.
opcodes/
2010-02-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
* i386-opc.tbl: Add xsave64 and xrstor64.
* i386-tbl.h: Regenerated.
2010-01-21 17:30:14 +00:00
Nick Clifton
99ea83aac3
PR 11170
...
* arm-dis.c (print_arm_address): Do not ignore negative bit in PC
based post-indexed addressing.
2010-01-20 10:54:03 +00:00
Sebastian Pop
a6461c0251
2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
...
gas/
* config/tc-i386.c (md_assemble): Before accessing the IMM field
check that it's not an XOP insn.
gas/testsuite/
* gas/i386/x86-64-xop.d: Add missing patterns.
* gas/i386/x86-64-xop.s: Same.
* gas/i386/xop.d: Same.
* gas/i386/xop.s: Same.
opcodes/
* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
* i386-tbl.h: Regenerated.
2010-01-15 21:24:13 +00:00
H.J. Lu
a2a7d12cfc
Replace VEX.DNS with VEX.NDS in comments.
...
2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
comments.
2010-01-14 19:35:36 +00:00
H.J. Lu
b9733481ab
Add names_mm, names_xmm and names_ymm.
...
2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (names_mm): New.
(intel_names_mm): Likewise.
(att_names_mm): Likewise.
(names_xmm): Likewise.
(intel_names_xmm): Likewise.
(att_names_xmm): Likewise.
(names_ymm): Likewise.
(intel_names_ymm): Likewise.
(att_names_ymm): Likewise.
(print_insn): Set names_mm, names_xmm and names_ymm.
(OP_MMX): Use names_mm, names_xmm and names_ymm.
(OP_XMM): Likewise.
(OP_EM): Likewise.
(OP_EMC): Likewise.
(OP_MXC): Likewise.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(OP_VEX): Likewise.
(OP_EX_VexReg): Likewise.
(OP_Vex_2src): Likewise.
(OP_Vex_2src_1): Likewise.
(OP_Vex_2src_2): Likewise.
(OP_REG_VexI4): Likewise.
2010-01-14 17:29:18 +00:00
H.J. Lu
5e6718e49c
Update comments
...
2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (print_insn): Update comments.
2010-01-13 16:06:12 +00:00
H.J. Lu
d869730db3
Remove rex_original
...
2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (rex_original): Removed.
(ckprefix): Remove rex_original.
(print_insn): Update comments.
2010-01-13 04:03:20 +00:00
Ralf Wildenhues
3725885a65
Sync Libtool from GCC.
...
/:
* libtool.m4: Sync from git Libtool.
* ltmain.sh: Likewise.
* ltoptions.m4: Likewise.
* ltversion.m4: Likewise.
* lt~obsolete.m4: Likewise.
sim/iq2000/:
* configure: Regenerate.
sim/d10v/:
* configure: Regenerate.
sim/m32r/:
* configure: Regenerate.
sim/frv/:
* configure: Regenerate.
sim/:
* avr/configure: Regenerate.
* cris/configure: Regenerate.
* microblaze/configure: Regenerate.
sim/h8300/:
* configure: Regenerate.
sim/mn10300/:
* configure: Regenerate.
sim/erc32/:
* configure: Regenerate.
sim/arm/:
* configure: Regenerate.
sim/m68hc11/:
* configure: Regenerate.
sim/lm32/:
* configure: Regenerate.
sim/sh64/:
* configure: Regenerate.
sim/v850/:
* configure: Regenerate.
sim/cr16/:
* configure: Regenerate.
sim/moxie/:
* configure: Regenerate.
sim/m32c/:
* configure: Regenerate.
sim/mips/:
* configure: Regenerate.
sim/mcore/:
* configure: Regenerate.
sim/sh/:
* configure: Regenerate.
gprof/:
* Makefile.in: Regenerate.
* configure: Regenerate.
opcodes/:
* Makefile.in: Regenerate.
* configure: Regenerate.
gas/:
* Makefile.in: Regenerate.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
ld/:
* configure: Regenerate.
gdb/testsuite/:
* gdb.cell/configure: Regenerate.
binutils/:
* Makefile.in: Regenerate.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
bfd/:
* Makefile.in: Regenerate.
* configure: Regenerate.
bfd/doc/:
* Makefile.in: Regenerate.
2010-01-09 21:11:44 +00:00
Doug Evans
b7cd1872af
* cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
...
* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
* xstormy16-ibld.c: Regenerate.
2010-01-07 18:05:45 +00:00
Sebastian Pop
69dd98654a
2010-01-06 Quentin Neill <quentin.neill@amd.com>
...
gas/
* config/tc-i386.c (cpu_arch): Add amdfam15.
(i386_align_code): Add PROCESSOR_AMDFAM15 cases.
* config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
* doc/c-i386.texi: Add amdfam15.
opcodes/
* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
* i386-init.h: Regenerated.
testsuite/
* gas/i386/i386.exp: Add new amdfam15 test cases.
* gas/i386/nops-1-amdfam15.d: New.
2010-01-06 22:52:47 +00:00
Nick Clifton
e3e535bc58
* arm-dis.c (print_insn): Fixed search for next
...
symbol and data dumping condition, and the
initial mapping symbol state.
* gas/arm/dis-data.d: New test case.
* gas/arm/dis-data.s: New file.
2010-01-06 15:02:45 +00:00
Doug Evans
fe8afbc48f
cpu/
...
* m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
(f-dsp-40-u20, f-dsp-40-u24): Ditto.
opcodes/
* cgen-ibld.in: #include "cgen/basic-modes.h".
* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
* xstormy16-ibld.c: Regenerate.
2010-01-06 05:30:19 +00:00
Nick Clifton
2edcd24424
PR 11123
...
* arm-dis.c (print_insn_coprocessor): Initialise value.
2010-01-04 10:18:32 +00:00
Alan Modra
0dc9305793
bfd/
...
* archures.c: Add bfd_mach_ppc_e500mc64.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add entry for
bfd_mach_ppc_e500mc64.
gas/
* config/tc-ppc.c (md_show_usage): Document -me500mc64.
opcodes/
* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
2010-01-04 02:32:56 +00:00
Doug Evans
05994f45db
* cgen-asm.in: Update copyright year.
...
* cgen-dis.in: Update copyright year.
* cgen-ibld.in: Update copyright year.
* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2010-01-02 18:50:59 +00:00
H.J. Lu
43ecc30f09
Move 2009 binutils ChangeLog to ChangeLog-2009.
2010-01-01 18:06:10 +00:00
H.J. Lu
2426c15ff8
Replace VexNDS, VexNDD and VexLWP with VexVVVV.
...
gas/
2009-12-19 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Check vexvvvv instead
of vexnds and vexndd.
(build_modrm_byte): Check vexvvvv instead of vexnds, vexndd
and vexlwp.
opcodes/
2009-12-19 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove VexNDS, VexNDD and
VexLWP. Add VexVVVV.
* i386-opc.h (VexNDS): Removed.
(VexNDD): Likewise.
(VexLWP): Likewise.
(VEXXDS): New.
(VEXNDD): Likewise.
(VEXLWP): Likewise.
(VexVVVV): Likewise.
(i386_opcode_modifier): Remove vexnds, vexndd and vexlwp.
Add vexvvvv.
* i386-opc.tbl: Replace VexNDS with VexVVVV=1, VexNDD with
VexVVVV=2 and VexLWP with VexVVVV=3.
* i386-tbl.h: Regenerated.
2009-12-19 18:36:27 +00:00
H.J. Lu
94ff3a50d8
Move Imm1 before Imm8.
...
2009-12-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_types): Move Imm1 before Imm8.
2009-12-18 21:07:58 +00:00
Nick Clifton
ff4a8d2b93
PR binutils/10924
...
* config/tc-arm.c (do_ldstv4): Do not allow r15 as the destination
register.
(do_mrs): Likewise.
(do_mul): Likewise.
* arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
unique register numbers. Extend support for %<>R format to
thumb32 and coprocessor instructions.
* gas/arm/unpredictable.s: Add more unpredictable instructions.
* gas/arm/unpredictable.d: Add expected disassemblies.
2009-12-17 09:52:18 +00:00
H.J. Lu
2eb952a4d9
Remove ByteOkIntel.
...
gas/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Set i.suffix to 0 in
Intel syntax if size is ignored and b/l/w suffixes are
illegal.
(check_byte_reg): Remove byteokintel check.
opcodes/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove ByteOkIntel.
* i386-opc.h (ByteOkIntel): Removed.
(i386_opcode_modifier): Remove byteokintel.
* i386-opc.tbl: Remove ByteOkIntel.
* i386-tbl.h: Regenerated.
2009-12-16 20:08:32 +00:00
H.J. Lu
7f399153c6
Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode.
...
gas/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Replace vex0f, vex0f38,
vex0f3a, xop08, xop09 and xop0a with vexopcode.
opcodes/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
Vex0F3A, XOP08, XOP09 and XOP0A. Add VexOpcode.
* i386-opc.h (Vex0F): Removed.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(VexOpcode): New.
(VEX0F): Likewise.
(VEX0F38): Likewise.
(VEX0F3A): Likewise.
(XOP08): Defined as a macro.
(XOP09): Likewise.
(XOP0A): Likewise.
(i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
xop09 and xop0a. Add vexopcode.
* i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
* i386-tbl.h: Regenerated.
2009-12-16 15:43:16 +00:00
H.J. Lu
25ac7f26dd
Fix a typo in ChangeLog.
2009-12-16 05:31:40 +00:00
H.J. Lu
8c43a48b28
Replace VEX2SOURCES with XOP2SOURCES.
...
gas/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Check XOP2SOURCES
instead VEX2SOURCES.
opcodes/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (VEX2SOURCES): Renamed to ...
(XOP2SOURCES): This.
2009-12-16 05:18:11 +00:00
H.J. Lu
8cd7925b45
Replace Vex2Sources and Vex3Sources with VexSources.
...
gas/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Check vexsources
instead of vex3sources.
(build_modrm_byte): Check vexsources instead of vex2sources
and vex3sources.
opcodes/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove Vex3Sources and
Vex2Sources. Add VexSources.
* i386-opc.h ()Vex2Sources: Removed.
(Vex3Sources): Likewise.
(VEX2SOURCES): New.
(VEX3SOURCES): Likewise.
(VexSources): Likewise.
(i386_opcode_modifier): Remove vex2sources and vex3sources.
Add vexsources.
* i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
Vex3Sourceswith VexSources=2.
* i386-tbl.h: Regenerated.
2009-12-16 04:00:35 +00:00
H.J. Lu
1ef99a7be9
Remove VexW0 and VexW1. Add VexW.
...
gas/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1
with vexw.
(build_modrm_byte): Likewise.
opcodes/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1. Add
VexW.
* i386-opc.h (VexW0): Removed.
(VexW1): Likewise.
(VEXW0): New.
(VEXW1): Likewise.
(VexW): Likewise.
(i386_opcode_modifier): Remove vexw0 and vexw1. Add vexw.
* i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
Vex=2.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-12-16 02:10:45 +00:00
H.J. Lu
bcf2684fb0
Add VEX_W_3818_P_2_M_0.
...
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (VEX_W_3818_P_2_M_0): New.
(vex_w_table): Add VEX_W_3818_P_2_M_0.
(mod_table): Use VEX_W_3818_P_2_M_0.
2009-12-15 23:33:51 +00:00
H.J. Lu
a179a9fdaa
Reformat vex_w_table.
...
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (vex_w_table): Reformat.
2009-12-15 22:20:50 +00:00
H.J. Lu
53aa04a0be
Add VEX_W_382X_P_2_M_0.
...
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (VEX_W_382X_P_2_M_0): New.
(vex_w_table): Add VEX_W_382X_P_2_M_0.
(mod_table): Use VEX_W_382X_P_2_M_0.
2009-12-15 22:13:05 +00:00
H.J. Lu
efdb52b70e
Reformat vex_w_table.
...
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (vex_w_table): Reformat.
2009-12-15 21:37:51 +00:00
H.J. Lu
9e30b8e093
Add USE_VEX_W_TABLE, VEX_W_TABLE and VEX_W_XXX.
...
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (USE_VEX_W_TABLE): New.
(VEX_W_TABLE): Likewise.
(VEX_W_XXX): Likewise.
(vex_w_table): Likewise.
(prefix_table): Use VEX_W_XXX.
(vex_table): Likewise.
(vex_len_table): Likewise.
(mod_table): Likewise.
(get_valid_dis386): Handle USE_VEX_W_TABLE.
* i386-opc.tbl: Add VexW0 to AVX instructions where the VEX.W bit
isn't used.
* i386-tbl.h: Regenerated.
2009-12-15 18:56:09 +00:00
H.J. Lu
e3c58833bf
Define VEX128 and VEX256.
...
gas/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Use VEX256.
opcodes/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (VEX128): New.
(VEX256): Likewise.
2009-12-15 16:36:59 +00:00
H.J. Lu
4c807e7262
Reformat vex_len_table.
...
2009-12-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (vex_len_table): Reformat.
2009-12-15 01:42:57 +00:00
H.J. Lu
976f1fde11
Rename MOD_VEX_51 to MOD_VEX_50.
...
2009-12-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (MOD_VEX_51): Renamed to ...
(MOD_VEX_50): This.
(vex_table): Updated.
(mod_table): Likewise.
2009-12-14 20:22:16 +00:00
Nick Clifton
ab8e2090b6
PR binutils/10924
...
* arm-dis.c (arm_opcodes): Specify %R in cases where using r15
results in unpredictable behaviour.
(print_insn_arm): Handle %R.
* gas/arm/unpredictable.s: New test case - checks the disassembly
of instructions with unpredictable behaviour.
* gas/arm/unpredictable.d: New file - expected disassembly.
2009-12-14 16:38:23 +00:00
H.J. Lu
759a05ce24
Set vex.w to 0 for VEX C5 prefix.
...
2009-12-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (get_valid_dis386): Set vex.w to 0 for VEX C5
prefix.
(print_insn): Don't set vex.w here.
2009-12-12 01:17:41 +00:00
H.J. Lu
5639ff8726
2009-12-11 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (print_insn): Set vex.w to 0.
2009-12-12 00:13:11 +00:00
Sebastian Pop
02e647f941
2009-12-11 Quentin Neill <quentin.neill@amd.com>
...
gas/testsuite/
* gas/i386/fma4.d: Add test cases.
* gas/i386/fma4.s: Add test cases.
* gas/i386/x86-64-fma4.d: Add test cases.
* gas/i386/x86-64-fma4.s: Add test cases.
opcodes/
* i386-dis.c (get_vex_imm8): Extend logic to apply in all
cases, to avoid fetching ahead for the immediate bytes when
OP_E_memory has already been called. Fix indentation.
2009-12-11 20:38:51 +00:00