* elf32-arm.c (elf32_arm_final_link_relocate): Set sym_flags
for the mode of target PLT entries.
(allocate_dynrelocs): Only adjust symbol type if setting its
value.
ld/testsuite/
* ld-arm/farcall-mixed-lib.d: Update.
* doc/as.texinfo: Document that Blackfin GAS does not
accept SYMBOL = VALUE.
ld/testsuite/
* ld-elf/sec64k.exp: Use ".set" instead of "=" for bfin-*-*.
* elf32-ppc.c (shared_stub_entry, stub_entry): Use r12, not r11.
(ppc_elf_relax_section): Use symbol index to distinguish
relocatable stubs.
ld/testsuite/
* ld-powerpc/relax.s: New.
* ld-powerpc/relax.d: New.
* ld-powerpc/relaxr.d: New.
* ld-powerpc/powerpc.exp: Add new tests.
* elf32-arm.c (elf32_arm_stub_type): Add arm_stub_a8_veneer_lwm.
(arm_build_one_stub): Build a8 veneers as a separate pass.
(cortex_a8_erratum_scan): Add prev_num_a8_fixes and stub_changed_p
parameters. Use them to check if we create a different a8 fixup
than the previous pass.
(elf32_arm_size_stubs): Move scope of stub_changed and
prev_num_a8_fixes into main loop.
(elf32_arm_build_stubs): Build a8 veneers in a second pass.
ld/testsuite/
* ld-arm/cortex-a8-far-1.s: New.
* ld-arm/cortex-a8-far-2.s: New.
* ld-arm/cortex-a8-far.d: New.
* ld-arm/arm-elf.exp: Add new test.
2009-07-21 H.J. Lu <hongjiu.lu@intel.com>
PR ld/10426
* elflink.c (elf_link_add_object_symbols): Turn an IFUNC symbol
from a DSO into a normal FUNC symbol.
(elf_link_output_extsym): Turn an undefined IFUNC symbol into
a normal FUNC symbol.
ld/testsuite/
2009-07-21 H.J. Lu <hongjiu.lu@intel.com>
PR ld/10426
* ld-ifunc/ifunc.exp: Check test-1 and libtest-2.so. Updated.
* ld-ifunc/test-1.c: New.
* ld-ifunc/test-2.c: Likewise.
(_bfd_mips_elf_size_dynamic_sections): For CPUs without load
interlocking, the last PLT entry needs a nop in the branch delay slot.
(_bfd_mips_elf_finish_dynamic_symbol): For CPUs with load itnerlocking,
output the last two PLT entries in reverse order.
* ld-mips-elf/pic-and-nonpic-3b.dd,
ld-mips-elf/pic-and-nonpic-5b.dd,
ld-mips-elf/pic-and-nonpic-6-o32.dd: Updated to use new PLT entries.
2009-07-16 H.J. Lu <hongjiu.lu@intel.com>
* elf32-i386.c (elf_i386_relocate_section): Don't get local
STT_GNU_IFUNC symbol for relocatable link.
* elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise.
ld/testsuite/
2009-07-16 H.J. Lu <hongjiu.lu@intel.com>
* ld-ifunc/ifunc-5r-local-i386.d: New.
* ld-ifunc/ifunc-5r-local-x86-64.d: Likewise.
* arm-dis.c (coprocessor): Print the LDC and STC versions of the
LFM and SFM instructions as comments,.
Improve consistency of formatting for instructions displayed as
comments and decimal values displayed with their hexadecimal
equivalents.
Formatting tidy ups.
Updated expected disassembler regexps.
* arm-dis.c (enum opcode_sentinels): New: Used to mark the
boundary between variaant and generic coprocessor instuctions.
(coprocessor): Use it.
Fix architecture version of MCRR and MRRC instructions.
(arm_opcdes): Fix patterns for STRB and STRH instructions.
(print_insn_coprocessor): Check architecture and extension masks.
Print a hexadecimal version of any decimal constant that is
outside of the range of -16 to +32.
(print_arm_address): Add a return value of the offset used in the
adress, if it is worth printing a hexadecimal version of it.
(print_insn_neon): Print a hexadecimal version of any decimal
constant that is outside of the range of -16 to +32.
(print_insn_arm): Likewise.
(print_insn_thumb16): Likewise.
(print_insn_thumb32): Likewise.
PR 10297
* arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
of an undefined instruction.
(arm_opcodes): Use it.
(thumb_opcod): Use it.
(thumb32_opc): Use it.
Update expected disassembly regrexps in GAS and LD testsuites.
2009-06-27 H.J. Lu <hongjiu.lu@intel.com>
PR ld/10337
* elf.c (bfd_section_from_shdr): Don't change sh_link for
SHT_REL/SHT_RELA sections on executable nor shared library.
Treat SHT_REL/SHT_RELA sections with sh_link set to SHN_UNDEF
as a normal section.
ld/testsuite/
2009-06-27 H.J. Lu <hongjiu.lu@intel.com>
PR ld/10337
* ld-ifunc/binutils.exp: New.
* ld-pe/aligncomm-1.c (size_t): Add typedef.
(main): Use it for casting pointer to scalar.
* ld-pe/aligncomm-2.c: Likewise.
* ld-pe/aligncomm-3.c: Likewise.
* ld-pe/aligncomm-4.c: Likewise.
* ld-scripts/empty-address.exp: Make sure that for x86_64-*-mingw*
target imagebase is set to zero.
* ld-scripts/weak.exp: Don't fail for x86_64-*-mingw* target.
bfd/
* elf32-arm.c (elf32_arm_size_stubs): Use PLT address as
destination for defined dynamic symbols when deciding whether to
insert a stub or not.
(allocate_dynrelocs): Make sure functions are not marked as Thumb
when actually accessed through a PLT, even when generating a
shared lib.
ld/testsuite:
* ld-arm/farcall-mixed-app.s: Add new references to check more
modes switching.
* ld-arm/farcall-mixed-lib1.s: Likewise.
* ld-arm/farcall-mixed-app-v5.d: Update expected result.
* farcall-mixed-app.d: Likewise.
* ld-arm/farcall-mixed-lib.d: Likewise.
2009-06-19 H.J. Lu <hongjiu.lu@intel.com>
* elf32-i386.c (elf_i386_tls_transition): Add a parameter,
r_symndx. Report local symbol name on error.
(elf_i386_check_relocs): Updated. Report local symbol name on
error.
(elf_i386_gc_sweep_hook): Updated.
(elf_i386_relocate_section): Likewise.
* elf64-x86-64.c (elf64_x86_64_tls_transition): Add a parameter,
r_symndx. Report local symbol name on error.
(elf64_x86_64_check_relocs): Updated. Report local symbol name
on error.
(elf64_x86_64_gc_sweep_hook): Updated.
(elf64_x86_64_relocate_section): Likewise.
ld/testsuite/
2009-06-19 H.J. Lu <hongjiu.lu@intel.com>
* ld-i386/i386.exp: Run tlsgd2.
* ld-i386/tlsgd2.d: New.
* ld-i386/tlsgd2.s: Likewise.
* ld-x86-64/tlsgd3.d: Updated.
--enable-auto-import to the linker.
* ld-pe/vers-script-1.d: Replace '\$' by '_' in all symbol names.
* ld-pe/vers-script-3.d: Likewise.
* ld-pe/vers-script-4.d: Likewise.
* ld-pe/vers-script-dll.c: Likewise.
* lib/ld-lib.exp (proc is_pecoff_format): Also return true for
"*-*-cegcc*" targets.
