Michael Meissner
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aeb1f26ba8
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Provide better statistics, particularly for doing VLIW work; Fix ldb to correctly sign extend
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1996-10-22 19:49:37 +00:00 |
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Martin Hunt
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eca43eb1f5
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Mon Oct 21 16:16:26 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* interp.c (sim_resume): Change the way single-stepping and exceptions
are handled so single-stepping works again.
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1996-10-21 23:17:43 +00:00 |
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Michael Meissner
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d6fe5ca568
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Make read/write memory functions inlined
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1996-10-16 22:16:21 +00:00 |
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Michael Meissner
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57bc1a721a
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Better error messages when a program stops due to signal; support d10v getpid/kill
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1996-10-15 15:44:10 +00:00 |
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Michael Meissner
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a49a15ade8
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Make exit/stop return correct exit value; Add line number tracing.
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1996-09-18 13:23:31 +00:00 |
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Michael Meissner
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215ac9533c
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Fix brf0{t,f}.s <label> -> instruction not to execute instruction if branch succeeds
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1996-09-15 03:46:52 +00:00 |
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Michael Meissner
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1eaaf3050e
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First cut at dealing with canadian crosses; make -t in debugger set d10v_debug if DEBUG
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1996-09-04 18:50:13 +00:00 |
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Michael Meissner
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7eebfc6296
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More debug support; Enable -t/-v to work correctly; Add --enable-sim-cflags configure switch
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1996-09-04 17:42:51 +00:00 |
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Michael Meissner
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87178dbdf7
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Enhance debug support
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1996-09-04 15:41:43 +00:00 |
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Martin Hunt
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d70b4d426b
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Wed Aug 28 17:33:19 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* Makefile.in, d10v_sim.h, interp.c: Fix byte-order problems.
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1996-08-29 00:35:11 +00:00 |
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Martin Hunt
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2934d1c925
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Thu Aug 1 17:05:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* ChangeLog, Makefile.in, configure, configure.in, d10v_sim.h,
gencode.c, interp.c, simops.c: Created.
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1996-08-02 00:23:31 +00:00 |
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