* config/tc-d10v.c (md_assemble): Check to see if prev_seg
is initialized before using it.
(d10v_cleanup): No longer uses its argument, so make it void.
* config/tc-d10v.h (d10v_cleanup): Change prototype.
(relax_segment, case rs_org): Move code inside braces. Move locals
target,after inside too.
(relax_segment, case rs_machine_dependent): Guts moved to ...
(relax_frag): New function.
Call md_prepare_relax_scan if defined.
* config/tc-m68k.h (md_prepare_relax_scan): Renamed from
M68K_AIM_KLUDGE.
(tc_fix_adjustable): Don't adjust relocs against weak symbols or
pc-relative relocs.
* config/tc-mn10300.c (md_begin): Set linkrelax.
(md_assemble): Create fixups as needed.
(md_apply_fix3): Gut. It shouldn't ever get called anymore.
First stab at fixups/relocs.
operands are assumed to be 32bits. Use "bits" field to hold the
number of bits in the main instruction word for MN10300_OPERAND_SPLIT.
(mn10300_check_operand): MN10300_OPERAND_SPLIT operands are assumed
to be 32bits.
the extension part of the instruction if necessary.
(mn10300_insert_operand): Accept pointer to extension word
argument. Make insn a pointer argument too. Return type
is now void. All callers changed.
So we can correct insert operands into any instruction except those
which have 32bit operands.
alpha_macro emit field to expect a const argument, and change the
arg field to be const. Fix some spacing to follow the GNU
standard.
Fri Nov 1 10:32:03 1996 Richard Henderson <rth@tamu.edu>
* config/tc-alpha.c (md_parse_option): Add knowledge of 21164pc
(pca56) and 21264 (ev6) cpus.
(md_apply_fix): Private relocation types are now negative.
(alpha_force_relocation): Likewise.
(tc_gen_reloc): Likewise.
(emit_insn): Likewise.
(emit_ldXu): Do the right thing when the hardware can do byte insns.
(emit_stX): Likewise.
(emit_sextX): Likewise.
* config/tc-v850.c: Fix some indention problems.
(md_relax_table): Define for D9->D99 branch displacement
relaxing.
(md_convert_frag): Do something useful instead of aborting.
(md_estimate_size_before_relax): Likewise.
(md_assemble): Note if the matching instruction has a relaxable
operand. If it does, allocate frag with frag_var and don't
do any fixups.
So we can do 9bit displacement to 22bit displacement relaxing.
hacks to improve parsing of complex hi, lo, zda, etc
expressions.
(md_assemble): Don't demand and eat a trailing ')' after finding
a v850 relocation prefix. Sign extend the constant in a
BFD_RELOC_LO16 expression. Do eat a trailing ')' after a complete
operand.
(parse_cons_expression_v850): Don't eat a trailing ')' after
finding a v850 relocation prefix.
Trying to get nec's sample code to assemble. Why oh why didn't JT try
to assemble any of their code...
(TC_CONS_FIX_NEW): Likewise.
* config/tc-v850.c (parse_cons_expression_v850): New function.
(cons_fix_new_v850): Likewise.
So we can handle ".hword lo(_foo)".
