Commit graph

930 commits

Author SHA1 Message Date
H.J. Lu
0138187e9f Add --with-system-zlib in gas
This patch adds --with-system-zlib and remove --with-zlib in gas.

gas/

	* Makefile.am (ZLIBINC): New.
	(AM_CFLAGS): Add $(ZLIBINC).
	* as.c: (show_usage): Don't check HAVE_ZLIB_H.
	(parse_args): Likewise.
	* compress-debug.c: Don't check HAVE_ZLIB_H to include <zlib.h>.
	(compress_init): Don't check HAVE_ZLIB_H.
	(compress_data): Likewise.
	(compress_finish): Likewise.
	* configure.ac (AM_ZLIB): Removed.
	(zlibinc): New.  AC_SUBST.
	Add --with-system-zlib.
	* Makefile.in: Regenerated.
	* config.in: Likewise.
	* configure: Likewise.
	* doc/Makefile.in: Likewise.

gas/testsuite/

	* gas/i386/dw2-compress-1.d: Expect .zdebug_info.
2015-03-31 03:56:12 -07:00
Nick Clifton
1740ba0cec Add support for G13 and G14 flag bits in RL78 ELF binaries.
inc	* rl78.h (E_FLAG_RL78_G10): Redefine.
	(E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13
	E_FLAG_RL78_G14): New flags.

bin	* readelf.c (get_machine_flags): Decode RL78's G13 and G14 flags.

gas	* config/tc-rl78.c (enum options): Add G13 and G14.
	(md_longopts): Add -mg13 and -mg14.
	(md_parse_option): Handle -mg13 and -mg14.
	(md_show_usage): List -mg13 and -mg14.
	* doc/c-rl78.texi: Add description of -mg13 and -mg14 options.

bfd	* elf32-rl78.c (rl78_cpu_name): New function.  Prints the name of
	the RL78 core based upon the flags.
	(rl78_elf_merge_private_bfd_data): Handle merging of G13 and G14
	flags.
	(rl78_elf_print_private_bfd_data): Use rl78_cpu_name.
	(elf32_rl78_machine): Always return bfd_mach_rl78.
2015-03-19 15:37:43 +00:00
Jon Turney
273a49858f Fix debug section compression so that it is only performed if it would make the section smaller.
PR binutils/18087
gas	* doc/as.texinfo: Note that when gas compresses debug sections the
	compression is only performed if it makes the section smaller.
	* write.c (compress_debug): Do not compress a debug section if
	doing so would make it larger.

tests	* gas/i386/dw2-compress-1.d: Do not expect the .debug_abbrev or
	.debug_info sections to be compressed.

binu	* doc/binutils.texi: Note that when objcopy compresses debug
	sections the compression is only performed if it makes the section
	smaller.

bfd	* coffgen.c (make_a_section_from_file): Only prepend a z to a
	debug section's name if the section was actually compressed.
	* elf.c (_bfd_elf_make_section_from_shdr): Likewise.
	* compress.c (bfd_init_section_compress_status): Do not compress
	the section if doing so would make it bigger.  In such cases leave
	the section alone and return COMPRESS_SECTION_NONE.
2015-03-18 15:47:13 +00:00
Ganesh Gopalasubramanian
029f352261 Add znver1 processor 2015-03-17 21:49:15 +05:30
Andrew Bennett
7ef0d2976a Add i6400 entry to the MIPS CPU table.
gas/

	* config/tc-mips.c (mips_cpu_info_table): Add i6400 entry.
	* doc/c-mips.texi: Document i6400 -march option.
2015-03-12 16:37:09 +00:00
Kyrylo Tkachov
4469186b99 [gas][ARM] Document supported ARMv8 cores.
2015-02-25  Matthew Wahab  <matthew.wahab@arm.com>

	* doc/c-arm.texi (-mcpu=): Add cortex-a53, cortex-a57 and
	cortex-a72.
2015-02-25 13:40:08 +00:00
Nick Clifton
685080f210 Adds support for generating notes in V850 binaries.
bfd	* elf32-v850.c (v850_set_note): New function.  Creates a Renesas
	style note entry.
	(v850_elf_make_note_section): New function.  Creates a note
	section.
	(v850_elf_create_sections): New function.  Create a note section
	if one is not already present.
	(v850_elf_set_note): New function.  Adds a note to a bfd.
	(v850_elf_copy_private_bfd_data): New function.  Copies V850
	notes.
	(v850_elf_merge_notes): New function.  Merges V850 notes.
	(print_v850_note): New function.  Displays a V850 note.
	(v850_elf_print_notes): New function. Displays all notes attached
	to a bfd.
	(v850_elf_merge_private_bfd_data): Call v850_elf_merge_notes.
	(v850_elf_print_private_bfd_data): Call v850_elf_print_notes.
	(v850_elf_fake_sections): Set the type of the V850 note section.
	* bfd-in.h (v850_elf_create_sections): Add prototype.
	(v850_elf_set_note): Add prototype.
	* bfd-in2.h: Regenerate.

binutils* readelf.c (get_machine_flags): Remove deprecated V850 machine
	flags.
	(get_v850_section_type_name): New function.  Handles V850 special
	sections.
	(get_section_type_name): Add support for V850.
	(get_v850_elf_note_type): New function.  Returns the name of a
	V850 note.
	(print_v850_note): New function.  Prints a V850 note.
	(process_v850_notes): New function.  Prints V850 notes.
	(process_note_sections): Add support for V850.

binutils/testsute
	* binutils-all/objcopy.exp: Skip the strip-10 test for the V850.

gas	* config/tc-v850.c (soft_float): New variable.
	(v850_data_8): New variable.
	(md_show_usage): Add -msoft-float/-mhard-float.
	(md_parse_option): Likewise.
	(md_begin): Set the default value of soft_float.
	(v850_md_end): New function.  Creates a note section.
	* config/tc-v850.h (md_end): Define.
	* doc/c-v850.texi: Document -msoft-float/-mhard-float.

gas/testsuite
	* gas/elf/elf.exp: Add special version of the section2 test for
	the V850.
	* gas/elf/section2.e-v850: New file.

include/elf
	* v850.h (EF_RH850_SIMD): Delete deprecated flag.
	(EF_RH850_CACHE): Likewise.
	(EF_RH850_MMU): Likewise.
	(EF_RH850_DATA_ALIGN8): Likewise.
	(SHT_RENESAS_IOP): Fix typo in name.
	(SHT_RENESAS_INFO): Define.
	(V850_NOTE_SECNAME): Define.
	(SIZEOF_V850_NOTE): Define.
	(V850_NOTE_NAME): Define.
	(enum v850_notes): New enum.
	(NUM_V850_NOTES): Define.

ld/ChangeLog
2015-02-24  Nick Clifton  <nickc@redhat.com>

	* Makefile.am (ev850.c): Add dependency upon
	$(srcdir)/emultempl/v850elf.em.
	(ev850_rh850.c): Likewise.
	* Makefile.in: Regenerate.
	* emultempl/v850elf.em: New file.
	* emulparams/v850.sh (EXTRA_EM_FILE): Define.
	* emulparams/v850_rh850.sh (EXTRA_EM_FILE): Define.
	* scripttempl/v850.sc: Add .note.renesas section.
	* scripttempl/v850_rh850.sc: Likewise.

ld/testsuite
	* ld-elf/extract-symbol-1sec.d: Expect to fail on the V850.
2015-02-24 17:54:09 +00:00
Yoshinori Sato
5518c738a4 Add support for the h8300-linux target.
ld	* Makefile.am: (ALL_EMULATION_SOURCES): Add new emulations.
	* Makefile.in: Regenerate.
	* configure.tgt: Add h8300-*-linux
	* emulparams/h8300elf_linux.sh: Add new emulation.
	* emulparams/h8300helf_linux.sh: Likewise.
	* emulparams/h8300self_linux.sh: Likewise.
	* emulparams/h8300sxelf_linux.sh: Likewise.

bfd	* config.bfd: Add h8300-*-linux.
	* configure.ac: Add h8300_elf32_linux_vec.
	* configure: Regenerate.
	* elf32-h8300.c: Likewise.
	* targets.c(_bfd_target_vector): Likewise.

gas	* config/tc-h8300.c (line_separater_chars): Add a version for
	h8300-linux that includes a separator.
	(default_mach): New variable.
	(md_main): Use it.
	(md_longopts): Add '--march' option.
	(md_parse_option): Parse the new option.
	* config/tc-h8300.h (TARGET_FORMAT): Add elf32-h8300-linux.
	* configure.tgt: Add h8300-*-linux
	* doc/c-h8300.texi: Document --march.
2015-02-23 17:04:53 +00:00
Alan Modra
5c9352f317 gas doc warning fixes
* doc/as.texinfo (Local Symbol Names): Don't use ':' in pxref.
	* doc/c-i386.texi: Reorder i386-Bugs after i386-Arch.
2015-02-19 14:14:51 +10:30
Jiong Wang
2abdd192f1 [AArch64] Add support for Cortex-A72
2015-02-04  Matthew Wahab  <matthew.wahab@arm.com>

	* config/tc-aarch64.c (aarch64_cpus): Add support for Cortex-A72.
	* doc/c-aarch64.texi (-mcpu=): Add "cortex-a72".
2015-02-04 19:17:12 +00:00
Jiong Wang
8e02d7f520 [AARCH64] Document .arch and .arch_extension directive
2015-02-03  Renlin Li  <renlin.li@arm.com>

  gas/
    * doc/c-aarch64.texi (.arch): Document the directive.
    (.arch_extension): Likewise.
2015-02-03 14:02:24 +00:00
Andreas Krebbel
1e2e8c529c S/390: Add support for IBM z13.
- 32 128 bit vector registers (overlapping with the existing 16 64 bit
  floating point registers)
- vector double instructions
- vector integer instructions
- scalar vector instructions (allowing to have more floating point
  registers for scalar operations)
- vector string instructions

gas/ChangeLog:

	* config/tc-s390.c (struct pd_reg): Remove.
	(pre_defined_registers): Remove.
	(REG_NAME_CNT): Remove.
	(reg_name_search): Calculate the register number instead of doing
	a lookup.
	(register_name, tc_s390_regname_to_dw2regnum): Adopt to the new
	reg_name_search signature.
	(s390_parse_cpu): Support the new arch string z13.
	(s390_insert_operand): Support for vector registers with the extra
	field for the fifth bit of each vector register operand.
	(md_gather_operand): Adjust to the new handling of optional
	parameters.

	* doc/as.texinfo: Document the z13 cpu string.

gas/testsuite/ChangeLog:

	* gas/s390/esa-g5.d: Add a variant without the optional operand.
	* gas/s390/esa-g5.s: Likewise.
	* gas/s390/esa-z9-109.d: Likewise.
	* gas/s390/esa-z9-109.s: Likewise.
	* gas/s390/zarch-z9-109.d: Likewise.
	* gas/s390/zarch-z9-109.s: Likewise.
	* gas/s390/zarch-z10.d: For variants with a zero optional argument
	it is not dumped by objdump anymore.
	* gas/s390/zarch-zEC12.d: Likewise.

	* gas/s390/zarch-z13.d: New file.
	* gas/s390/zarch-z13.s: New file.
	* gas/s390/s390.exp: Run the test for the z13 files.

include/opcode/ChangeLog:

	* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_Z13.

ld/testsuite/ChangeLog:

	* ld-s390/tlsbin.dd: The nopr register operand is optional and not
	printed if 0 anymore.

opcodes/ChangeLog:

	* s390-dis.c (s390_extract_operand): Support vector register
	operands.
	(s390_print_insn_with_opcode): Support new operands types and add
	new handling of optional operands.
	* s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
	and include opcode/s390.h instead.
	(struct op_struct): New field `flags'.
	(insertOpcode, insertExpandedMnemonic): New parameter `flags'.
	(dumpTable): Dump flags.
	(main): Parse flags from the s390-opc.txt file.  Add z13 as cpu
	string.
	* s390-opc.c: Add new operands types, instruction formats, and
	instruction masks.
	(s390_opformats): Add new formats for .insn.
	* s390-opc.txt: Add new instructions.
2015-01-16 12:28:58 +01:00
Philipp Tomsich
ea0d6bb94c This patch adds the necessary support to the assembler to allow wiring
the X-Gene scheduling description up in the respective GCC backend.

	* config/tc-arm.c (arm_cpus): Add support for APM X-Gene 1 and
	X-Gene 2.
	* doc/c-arm.texi (ARM Options): Mention xgene1 and xgene2.
2015-01-09 20:00:14 +00:00
Alan Modra
2f5346cd7c Regenerate Makeile.in file for copyright update 2015-01-02 22:27:27 +10:30
Alan Modra
b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Andrew Burgess
f5be95254d AVR: Document linker relaxation related options.
Adds documentation describing the -mlink-relax and -mno-link-relax
command line options.

gas/ChangeLog:

	* doc/c-avr.texi: Document -mlink-relax and -mno-link-relax.
2014-12-24 21:28:34 +00:00
Eric Botcazou
b6605dddac Add Visium support to gas
gas/
	* configure.tgt: Add Visium support.
	* Makefile.am (TARGET_CPU_CFILES): Move config/tc-vax.c around
	and add config/tc-visium.c.
	(TARGET_CPU_HFILES): Move config/tc-vax.h around and add
	config/tc-visium.h.
	* Makefile.in: Regenerate.
	* config/tc-visium.c: New file.
	* config/tc-visium.h: Likewise.
	* po/POTFILES.in: Regenerate.
gas/testsuite/
	* gas/elf/elf.exp: Skip ifunc-1 for Visium.
	* gas/visium/: New directory.
2014-12-06 16:42:26 +01:00
Terry Guo
a715796ba1 Support ARM Cortex-M7
include/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro.
	(FPU_VFP_V5D16): Likewise.
	(FPU_VFP_V5_SP_D16): Likewise.
	(FPU_ARCH_VFP_V5D16): Likewise.
	(FPU_ARCH_VFP_V5_SP_D16): Likewise.

bfd/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Support FPv5.

binutils/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* readelf.c (arm_attr_tag_FP_arch): Extended to support FPv5.

gas/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* config/tc-arm.c (fpu_vfp_ext_armv8xd): New.
	(arm_cpus): Support cortex-m7.
	(arm_fpus): Support fpv5-sp-d16 and fpv5-d16.
	(do_vfp_nsyn_cvt_fpv8): Generate error when use D register for S
	register only target like FPv5-SP-D16.
	(do_neon_cvttb_1): Likewise.
	(do_vfp_nsyn_fpv8): Likewise.
	(do_vrint_1): Likewise.
	(aeabi_set_public_attributes): Set proper FP arch for FPv5.
	* doc/c-arm.texi: Document new cpu and fpu names for cortex-m7.

gas/testsuite/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* gas/arm/armv7e-m+fpv5-d16.s: New.
	* gas/arm/armv7e-m+fpv5-d16.d: Likewise.
	* gas/arm/armv7e-m+fpv5-sp-d16.s: Likewise.
	* gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise.

ld/testsuite/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* ld-arm/attr-merge-vfp-4-sp.s: New test source file.
	* ld-arm/attr-merge-vfp-5-sp.s: Likewise.
	* ld-arm/attr-merge-vfp-5.s: Likewise.
	* ld-arm/attr-merge-vfp-8.d: New test.
	* ld-arm/attr-merge-vfp-8r.d: Likewise.
	* ld-arm/attr-merge-vfp-9.d: Likewise.
	* ld-arm/attr-merge-vfp-9r.d: Likewise.
	* ld-arm/attr-merge-vfp-10.d: Likewise.
	* ld-arm/attr-merge-vfp-10r.d: Likewise.
	* ld-arm/attr-merge-vfp-11.d: Likewise.
	* ld-arm/attr-merge-vfp-11r.d: Likewise.
	* ld-arm/attr-merge-vfp-12.d: Likewise.
	* ld-arm/attr-merge-vfp-12r.d: Likewise.
	* ld-arm/attr-merge-vfp-13.d: Likewise.
	* ld-arm/attr-merge-vfp-13r.d: Likewise.
	* ld-arm/attr-merge-vfp-14.d: Likewise.
	* ld-arm/attr-merge-vfp-14r.d: Likewise.
	* ld-arm/arm-elf.exp: Run the new tests.
2014-11-21 11:36:06 +08:00
Philipp Tomsich
0a9ce86daf [AArch64] Add xgene2. 2014-11-18 11:24:14 +00:00
Philipp Tomsich
070cb95614 [AArch64] Add xgene1.
The name xgene1 superceeds xgene-1.  We retain support for the
original xgene-1 for compatibility but drop it from documentation.
2014-11-18 11:19:05 +00:00
Ilya Tocar
14f195c9a0 Add AVX512VBMI instructions
gas/

	* config/tc-i386.c (cpu_arch): Add .avx512vbmi.
	* doc/c-i386.texi: Document it.

opcodes/

	* i386-dis-evex.c (evex_table): Add vpermi2b, vpermt2b, vpermb,
	vpmultishiftqb.
	* i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F3883, EVEX_W_0F3883_P_2.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512VBMI_FLAGS.
	(cpu_flags): Add CpuAVX512VBMI.
	* i386-opc.h (enum): Add CpuAVX512VBMI.
	(i386_cpu_flags): Add cpuavx512vbmi.
	* i386-opc.tbl: Add vpmadd52luq, vpmultishiftqb, vpermb, vpermi2b,
	vpermt2b.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

/gas/testsuite/

	* gas/i386/i386.exp: Run new tests.
	* gas/i386/avx512vbmi-intel.d: New file.
	* gas/i386/avx512vbmi.d: Likewise.
	* gas/i386/avx512vbmi.s: Likewise.
	* gas/i386/avx512vbmi_vl-intel.d: Likewise.
	* gas/i386/avx512vbmi_vl.d: Likewise.
	* gas/i386/avx512vbmi_vl.s: Likewise.
	* gas/i386/x86-64-avx512vbmi-intel.d: Likewise.
	* gas/i386/x86-64-avx512vbmi.d: Likewise.
	* gas/i386/x86-64-avx512vbmi.s: Likewise.
	* gas/i386/x86-64-avx512vbmi_vl-intel.d: Likewise.
	* gas/i386/x86-64-avx512vbmi_vl.d: Likewise.
	* gas/i386/x86-64-avx512vbmi_vl.s: Likewise.
2014-11-17 06:03:41 -08:00
Ilya Tocar
2cc1b5aad8 Add AVX512IFMA instructions
gas/

	* config/tc-i386.c (cpu_arch): Add .avx512ifma.
	* doc/c-i386.texi: Document it.

opcodes/

	* i386-dis-evex.c (evex_table): Add vpmadd52luq, vpmadd52huq.
	* i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F38B4,
	PREFIX_EVEX_0F38B5.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512IFMA_FLAGS.
	(cpu_flags): Add CpuAVX512IFMA.
	* i386-opc.h (enum): Add CpuAVX512IFMA.
	(i386_cpu_flags): Add cpuavx512ifma.
	* i386-opc.tbl: Add vpmadd52huq, vpmadd52luq.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

/gas/testsuite/

	* gas/i386/i386.exp: Run new tests.
	* gas/i386/avx512ifma-intel.d: New file.
	* gas/i386/avx512ifma.d: Likewise.
	* gas/i386/avx512ifma.s: Likewise.
	* gas/i386/avx512ifma_vl-intel.d: Likewise.
	* gas/i386/avx512ifma_vl.d: Likewise.
	* gas/i386/avx512ifma_vl.s: Likewise.
	* gas/i386/x86-64-avx512ifma-intel.d: Likewise.
	* gas/i386/x86-64-avx512ifma.d: Likewise.
	* gas/i386/x86-64-avx512ifma.s: Likewise.
	* gas/i386/x86-64-avx512ifma_vl-intel.d: Likewise.
	* gas/i386/x86-64-avx512ifma_vl.d: Likewise.
	* gas/i386/x86-64-avx512ifma_vl.s: Likewise.
2014-11-17 06:03:24 -08:00
Ilya Tocar
9d8596f079 Add pcommit instruction
gas/

	* config/tc-i386.c (cpu_arch): Add .pcommit.
	* doc/c-i386.texi: Document it.

/opcodes

	* i386-dis.c (PREFIX enum): Add PREFIX_RM_0_0FAE_REG_7.
	(prefix_table): Add pcommit.
	* i386-gen.c (cpu_flag_init): Add CPU_PCOMMIT_FLAGS.
	(cpu_flags): Add CpuPCOMMIT.
	* i386-opc.h (enum): Add CpuPCOMMIT.
	(i386_cpu_flags): Add cpupcommit.
	* i386-opc.tbl: Add pcommit.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

/gas/testsuite/

	* gas/i386/i386.exp: Run new tests.
	* gas/i386/pcommit-intel.d: New file.
	* gas/i386/pcommit.d: Likewise.
	* gas/i386/pcommit.s: Likewise.
	* gas/i386/x86-64-pcommit-intel.d: Likewise.
	* gas/i386/x86-64-pcommit.d: Likewise.
	* gas/i386/x86-64-pcommit.s: Likewise.
2014-11-17 05:56:47 -08:00
Ilya Tocar
c5e7287a1a Add clwb instruction
gas/

	* config/tc-i386.c (cpu_arch): Add .clwb.
	* doc/c-i386.texi: Document it.

opcodes/
	* i386-dis.c (PREFIX enum): Add PREFIX_0FAE_REG_6.
	(prefix_table): Add clwb.
	* i386-gen.c (cpu_flag_init): Add CPU_CLWB_FLAGS.
	(cpu_flags): Add CpuCLWB.
	* i386-opc.h (enum): Add CpuCLWB.
	(i386_cpu_flags): Add cpuclwb.
	* i386-opc.tbl: Add clwb.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

gas/testsuite/

	* gas/i386/i386.exp: Run new tests.
	* gas/i386/clwb-intel.d: New file.
	* gas/i386/clwb.d: Likewise.
	* gas/i386/clwb.s: Likewise.
	* gas/i386/x86-64-clwb-intel.d: Likewise.
	* gas/i386/x86-64-clwb.d: Likewise.
	* gas/i386/x86-64-clwb.s: Likewise.
2014-11-17 05:56:37 -08:00
H.J. Lu
1dfc6506b7 Correct x86 assembler manual
* config/tc-i386.c (cpu_arch): Re-arrange avx512* and xsave*
	items.

	* doc/c-i386.texi: Re-arrange avx512* and xsave*.  Add
	clflushopt and se1.  Remove duplicated entries.
2014-11-14 08:36:04 -08:00
Naveen H.S
2c62985659 MIPS: Add Octeon 3 support
binutils:
2014-10-31  Andrew Pinski  <apinski@cavium.com>
            Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

	* readelf.c (print_mips_isa_ext): Print the value of Octeon3.

gas:
2014-10-31  Andrew Pinski  <apinski@cavium.com>
            Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

	* config/tc-mips.c (CPU_IS_OCTEON): Handle CPU_OCTEON3.
	(mips_cpu_info_table): Octeon3 enables virt ase.
	* doc/c-mips.texi: Document octeon3 as an acceptable value for
	-march=.

gas/testsuite:
2014-10-31  Andrew Pinski  <apinski@cavium.com>
            Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

	* gas/mips/mips.exp: Add support for Octeon3 architecture.
	Also add in support for running Octeon3 tests.
	* gas/mips/octeon3.d: New test.
	* gas/mips/octeon3.s: New test source.

opcodes:
2014-10-31  Andrew Pinski  <apinski@cavium.com>
            Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

	* mips-dis.c (mips_arch_choices): Add octeon3.
	* mips-opc.c (IOCT): Include INSN_OCTEON3.
	(IOCT2): Likewise.
	(IOCT3): New define.
	(IVIRT): New define.
	(mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0,
	tlbinv, tlbinvf, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp, tlti
	IVIRT instructions.
	Extend mtm0, mtm1, mtm2, mtp0, mtp1, mtp2 instructions to take another
	operand for IOCT3.

bfd:
2014-10-31  Andrew Pinski  <apinski@cavium.com>
            Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

	* archures.c: Add octeon3 for mips target.
	* bfd-in2.h: Regenerate.
	* bfd/cpu-mips.c: Define I_mipsocteon3.
	nfo_struct): Add octeon3 support.
	* bfd/elfxx-mips.c: (_bfd_elf_mips_mach): Add support for
	octeon3.
	(mips_set_isa_flags): Add support for octeon3.
	(bfd_mips_isa_ext): Add bfd_mach_mips_octeon3.
	(mips_mach_extensions): Make bfd_mach_mips_octeon3 an
	extension of bfd_mach_mips_octeon2.
	(print_mips_isa_ext): Print the value of Octeon3.
2014-10-31 13:50:10 -07:00
Matthew Fortune
f179c51249 MIPS Documentation fixes
gas/
	* doc/as.texinfo: Update the MIPS FP ABI descriptions.
	* doc/c-mips.texi: Spell check and correct throughout.
2014-10-22 10:48:02 +01:00
Andrew Pinski
55fbd9927b [AARCH64] Add thunderx support to gas
This patch adds -mcpu=thunderx support to gas.

OK? Tested with no regressions.

ChangeLog:
	* config/tc-aarch64.c (aarch64_cpus):
	Add thunderx.
	* doc/c-aarch64.texi: Document that thunderx
	is a valid processor name.
2014-10-21 10:51:01 -07:00
Matthew Fortune
8bd9785878 Fix bad @value references in MIPS documentation
gas/

	* doc/c-mips.texi: Fix bad @value references.
2014-10-17 20:25:53 +01:00
Jose E. Marchesi
3d68f91c0f This is a series of patches that add support for the SPARC M7 cpu to
binutils.  They were discussed and approved here:

  https://sourceware.org/ml/binutils/2014-10/msg00038.html
2014-10-09 13:16:53 +01:00
Ilya Tocar
d3d3c6db1a Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
It is used to control which value is encoded in rounding control bits
for SAE-only EVEX instructions.

gas/
	* config/tc-i386.c (evexrcig): New.
	(build_evex_prefix): Force rounding bits.
	(OPTION_MEVEXRCIG): New.
	(md_longopts): Add mevexrcig.
	(md_parse_option): Handle OPTION_MEVEXRCIG.
	(md_show_usage): Document mevexrcig.
	* doc/c-i386.texi (mevexrcig): Document new option.

gas/testsuite/
	* gas/i386/avx512dq-rcig.s: New.
	* gas/i386/avx512dq-rcigrd-intel.d: Likewise.
	* gas/i386/avx512dq-rcigrd.d: Likewise.
	* gas/i386/avx512dq-rcigrne-intel.d: Likewise.
	* gas/i386/avx512dq-rcigrne.d: Likewise.
	* gas/i386/avx512dq-rcigru-intel.d: Likewise.
	* gas/i386/avx512dq-rcigru.d: Likewise.
	* gas/i386/avx512dq-rcigrz-intel.d: Likewise.
	* gas/i386/avx512dq-rcigrz.d: Likewise.
	* gas/i386/avx512er-rcig.s: Likewise.
	* gas/i386/avx512er-rcigrd-intel.d: Likewise.
	* gas/i386/avx512er-rcigrd.d: Likewise.
	* gas/i386/avx512er-rcigrne-intel.d: Likewise.
	* gas/i386/avx512er-rcigrne.d: Likewise.
	* gas/i386/avx512er-rcigru-intel.d: Likewise.
	* gas/i386/avx512er-rcigru.d: Likewise.
	* gas/i386/avx512er-rcigrz-intel.d: Likewise.
	* gas/i386/avx512er-rcigrz.d: Likewise.
	* gas/i386/avx512f-rcig.s: Likewise.
	* gas/i386/avx512f-rcigrd-intel.d: Likewise.
	* gas/i386/avx512f-rcigrd.d: Likewise.
	* gas/i386/avx512f-rcigrne-intel.d: Likewise.
	* gas/i386/avx512f-rcigrne.d: Likewise.
	* gas/i386/avx512f-rcigru-intel.d: Likewise.
	* gas/i386/avx512f-rcigru.d: Likewise.
	* gas/i386/avx512f-rcigrz-intel.d: Likewise.
	* gas/i386/avx512f-rcigrz.d: Likewise.
	* gas/i386/x86-64-avx512dq-rcig.s: Likewise.
	* gas/i386/x86-64-avx512dq-rcigrd-intel.d: Likewise.
	* gas/i386/x86-64-avx512dq-rcigrd.d: Likewise.
	* gas/i386/x86-64-avx512dq-rcigrne-intel.d: Likewise.
	* gas/i386/x86-64-avx512dq-rcigrne.d: Likewise.
	* gas/i386/x86-64-avx512dq-rcigru-intel.d: Likewise.
	* gas/i386/x86-64-avx512dq-rcigru.d: Likewise.
	* gas/i386/x86-64-avx512dq-rcigrz-intel.d: Likewise.
	* gas/i386/x86-64-avx512dq-rcigrz.d: Likewise.
	* gas/i386/x86-64-avx512er-rcig.s: Likewise.
	* gas/i386/x86-64-avx512er-rcigrd-intel.d: Likewise.
	* gas/i386/x86-64-avx512er-rcigrd.d: Likewise.
	* gas/i386/x86-64-avx512er-rcigrne-intel.d: Likewise.
	* gas/i386/x86-64-avx512er-rcigrne.d: Likewise.
	* gas/i386/x86-64-avx512er-rcigru-intel.d: Likewise.
	* gas/i386/x86-64-avx512er-rcigru.d: Likewise.
	* gas/i386/x86-64-avx512er-rcigrz-intel.d: Likewise.
	* gas/i386/x86-64-avx512er-rcigrz.d: Likewise.
	* gas/i386/x86-64-avx512f-rcig.s: Likewise.
	* gas/i386/x86-64-avx512f-rcigrd-intel.d: Likewise.
	* gas/i386/x86-64-avx512f-rcigrd.d: Likewise.
	* gas/i386/x86-64-avx512f-rcigrne-intel.d: Likewise.
	* gas/i386/x86-64-avx512f-rcigrne.d: Likewise.
	* gas/i386/x86-64-avx512f-rcigru-intel.d: Likewise.
	* gas/i386/x86-64-avx512f-rcigru.d: Likewise.
	* gas/i386/x86-64-avx512f-rcigrz-intel.d: Likewise.
	* gas/i386/x86-64-avx512f-rcigrz.d: Likewise.
	* gas/i386/i386.exp: Run new tests.
2014-09-16 08:45:28 -07:00
Andrew Bennett
7361da2c95 Add support for MIPS R6.
bfd/
 	* aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6.
 	* archures.c (bfd_architecture): Likewise.
 	* bfd-in2.h (bfd_architecture): Likewise.
 	(bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
 	BFD_RELOC_MIPS_19_PCREL_S2.
 	* cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6.
 	* elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2
 	R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
 	(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
 	* elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2,
	R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16
	and R_MIPS_PCLO16.
 	(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
 	* elfn32-mips.c: Likewise.
 	* elfxx-mips.c (MIPSR6_P): New define.
 	(mipsr6_exec_plt_entry): New array.
	(hi16_reloc_p): Add support for R_MIPS_PCHI16.
	(lo16_reloc_p): Add support for R_MIPS_PCLO16.
 	(aligned_pcrel_reloc_p): New function.
 	(mips_elf_relocation_needs_la25_stub): Add support for relocs:
 	R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
 	(mips_elf_calculate_relocation): Add support for relocs:
 	R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2,
 	R_MIPS_PCHI16 and R_MIPS_PCLO16.
 	(_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6.
	(mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16.
 	(_bfd_mips_elf_check_relocs): Add support for relocs:
	R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
 	(_bfd_mips_elf_relocate_section): Add a check for unaligned
 	pc relative relocs.
 	(_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6
 	plt entry.
 	(mips_set_isa_flags): Add support for mips32r6 and mips64r6.
 	(_bfd_mips_elf_print_private_bfd_data): Likewise.
 	(mips_32bit_flags_p): Add support for mips32r6.
 	* libbfd.h (bfd_reloc_code_real_names): Add entries for
 	BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2,
 	BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2.
 	* reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
 	BFD_RELOC_MIPS_19_PCREL_S2.

binutils/
 	* readelf.c (get_machine_flags): Add support for mips32r6 and
 	mips64r6.

elfcpp/
 	* mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants.

gas/
 	* config/tc-mips.c (mips_nan2008): New static global.
	(mips_flag_nan2008): Removed.
	(LL_SC_FMT): New define.
	(COP12_FMT): Updated.
	(ISA_IS_R6): New define.
 	(ISA_HAS_64BIT_REGS): Add mips64r6.
 	(ISA_HAS_DROR): Likewise.
 	(ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6.
 	(ISA_HAS_ROR): Likewise.
 	(ISA_HAS_ODD_SINGLE_FPR): Likewise.
 	(ISA_HAS_MXHC1): Likewise.
 	(hilo_interlocks): Likewise.
 	(md_longopts): Likewise.
	(ISA_HAS_LEGACY_NAN): New define.
 	(options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6.
 	(mips_ase): Add field rem_rev.
 	(mips_ases): Updated to add which ISA an ASE was removed in.
 	(mips_isa_rev): Add support for mips32r6 and mips64r6.
 	(mips_check_isa_supports_ase): Add support to check if an ASE
 	has been removed in the specified MIPS ISA revision.
 	(validate_mips_insn): Skip '-' character.
	(macro_build): Likewise.
	(mips_check_options): Prevent R6 working with fp32, mips16,
	micromips, or branch relaxation.
	(file_mips_check_options): Set R6 floating point registers to
	64 bit.  Also deal with the nan2008 option.
 	(limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
 	(operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV
	and OP_NON_ZERO_REG.
 	(match_check_prev_operand): New static function.
 	(match_same_rs_rt_operand): New static function.
	(match_non_zero_reg_operand): New static function.
 	(match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV
	and OP_NON_ZERO_REG.
 	(insns_between): Added case to deal with forbidden slots.
 	(append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2
 	and BFD_RELOC_MIPS_26_PCREL_S2.
 	(match_insn): Add support for operands -A, -B, +' and +".  Also
 	skip '-' character.
 	(mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo.
 	(md_parse_option): Add support for mips32r6 and mips64r6.  Also
	update the nan option handling.
 	(md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2.
 	(mips_force_relocation): Prevent forced relaxation for MIPS r6.
 	(md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
 	(s_mipsset): Add support for mips32r6 and mips64r6.
	(s_nan): Update to support the new nan2008 framework.
 	(tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
	(mips_elf_final_processing): Updated to use the mips_nan2008.
 	(mips_cpu_info_table): Add entries for mips32r6 and mips64r6.
	(macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref
	macros for R6.
	(mips_fix_adjustable): Make PC relative R6 relocations relative
	to the symbol and not the section.
 	* configure.ac: Add support for mips32r6 and mips64r6.
 	* configure: Regenerate.
 	* doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line
 	options.
	* doc/as.texinfo: Likewise.

gas/testsuite/
	* gas/mips/24k-triple-stores-1.s: If testing for r6 prevent
	non-supported instructions from being tested.
	* gas/mips/24k-triple-stores-2.s: Likewise.
	* gas/mips/24k-triple-stores-3.s: Likewise.
	* gas/mips/24k-triple-stores-6.s: Likewise.
	* gas/mips/beq.s: Likewise.
	* gas/mips/eva.s: Likewise.
	* gas/mips/ld-zero-3.s: Likewise.
	* gas/mips/mips32-cp2.s: Likewise.
	* gas/mips/mips32.s: Likewise.
	* gas/mips/mips4.s: Likewise.
	* gas/mips/add.s: Don't test the add instructions if r6, and
	add padding.
	* gas/mips/add.d: Check for a triple dot not a nop at the end of the
	disassembly output.
	* gas/mips/micromips@add.d: Likewise.
	* gas/mips/mipsr6@24k-branch-delay-1.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-1.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-2.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-3.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-6.d: New file.
	* gas/mips/mipsr6@add.d: New file.
	* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file.
	* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file.
	* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file.
	* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file.
	* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file.
	* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file.
	* gas/mips/mipsr6@beq.d: New file.
	* gas/mips/mipsr6@bge.d: New file.
	* gas/mips/mipsr6@bgeu.d: New file.
	* gas/mips/mipsr6@blt.d: New file.
	* gas/mips/mipsr6@bltu.d: New file.
	* gas/mips/mipsr6@branch-misc-1.d: New file.
	* gas/mips/mipsr6@branch-misc-2-64.d: New file.
	* gas/mips/mipsr6@branch-misc-2pic-64.d: New file.
	* gas/mips/mipsr6@branch-misc-4-64.d: New file.
	* gas/mips/mipsr6@cache.d: New file.
	* gas/mips/mipsr6@eva.d: New file.
	* gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file.
	* gas/mips/mipsr6@jal-svr4pic.d: New file.
	* gas/mips/mipsr6@ld-zero-2.d: New file.
	* gas/mips/mipsr6@ld-zero-3.d: New file.
	* gas/mips/mipsr6@loc-swap-dis.d: New file.
	* gas/mips/mipsr6@mips32-cp2.d: New file.
	* gas/mips/mipsr6@mips32-imm.d: New file.
	* gas/mips/mipsr6@mips32.d: New file.
	* gas/mips/mipsr6@mips32r2.d: New file.
	* gas/mips/mipsr6@mips4-fp.d: New file.
	* gas/mips/mipsr6@mips4-fp.l: New file.
	* gas/mips/mipsr6@mips4-fp.s: New file.
	* gas/mips/mipsr6@mips4.d: New file.
	* gas/mips/mipsr6@mips5-fp.d: New file.
	* gas/mips/mipsr6@mips5-fp.l: New file.
	* gas/mips/mipsr6@mips5-fp.s: New file.
	* gas/mips/mipsr6@mips64.d: New file.
	* gas/mips/mipsr6@msa-branch.d: New file.
	* gas/mips/mipsr6@msa.d: New file.
	* gas/mips/mipsr6@pref.d: New file.
	* gas/mips/mipsr6@relax-swap3.d: New file.
	* gas/mips/r6-64-n32.d: New file.
	* gas/mips/r6-64-n64.d: New file.
	* gas/mips/r6-64-removed.l: New file.
	* gas/mips/r6-64-removed.s: New file.
	* gas/mips/r6-64.s: New file.
	* gas/mips/r6-attr-none-double.d: New file.
	* gas/mips/r6-n32.d: New file.
	* gas/mips/r6-n64.d: New file.
	* gas/mips/r6-removed.l: New file.
	* gas/mips/r6-removed.s: New file.
	* gas/mips/r6.d: New file.
	* gas/mips/r6.s: New file.
	* gas/mips/mipsr6@mips32-dsp.d: New file.
	* gas/mips/mipsr6@mips32-dspr2.d: New file.
	* gas/mips/mipsr6@mips32r2-ill.l: New file.
	* gas/mips/mipsr6@mips32r2-ill.s: New file.
	* gas/mips/cache.s: Add r6 instruction varients.
	* gas/mips/mips.exp: Add support for the mips32r6 and mips64r6
	architectures.  Also prevent non r6 supported tests from running.
	Finally, add in support for running the new r6 tests.
	(run_dump_test_arch): Add support for mipsr6 tests.
	(run_list_test_arch): Add support for using files of the
	form arch@testname.l .

include/elf/
 	* mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3,
 	R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
 	(E_MIPS_ARCH_32R6): New define.
 	(E_MIPS_ARCH_64R6): New define.

include/opcode/
 	* mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT,
 	OP_CHECK_PREV and OP_NON_ZERO_REG.  Add descriptions for the MIPS R6
	instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B,
	 +I, +O, +R, +:, +\, +", +;
	(mips_check_prev_operand): New struct.
 	(INSN2_FORBIDDEN_SLOT): New define.
 	(INSN_ISA32R6): New define.
 	(INSN_ISA64R6): New define.
	(INSN_UPTO32R6): New define.
	(INSN_UPTO64R6): New define.
	(mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6.
 	(ISA_MIPS32R6): New define.
 	(ISA_MIPS64R6): New define.
 	(CPU_MIPS32R6): New define.
 	(CPU_MIPS64R6): New define.
 	(cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6.

ld/
 	* ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6.

opcodes/
 	* mips-dis.c (mips_arch_choices): Add entries for mips32r6 and
 	mips64r6.
 	(parse_mips_dis_option): Allow MSA and virtualization support for
 	mips64r6.
 	(mips_print_arg_state): Add fields dest_regno and seen_dest.
 	(mips_seen_register): New function.
 	(print_insn_arg): Refactored code to use mips_seen_register
	function.  Add support for OP_SAME_RS_RT, OP_CHECK_PREV and
	OP_NON_ZERO_REG.  Changed OP_REPEAT_DEST_REG case to print out
	the register rather than aborting.
 	(print_insn_args): Add length argument.  Add code to correctly
	calculate the instruction address for pc relative instructions.
	(validate_insn_args): New static function.
 	(print_insn_mips): Prevent jalx disassembling for r6.  Use
	validate_insn_args.
	(print_insn_micromips): Use validate_insn_args.
	all the arguments are valid.
	* mips-formats.h (PREV_CHECK): New define.
 	* mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s,
 	-t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +;
 	(RD_pc): New define.
 	(FS): New define.
 	(I37): New define.
 	(I69): New define.
 	(mips_builtin_opcodes): Add MIPS R6 instructions.  Exclude recoded
 	MIPS R6 instructions from MIPS R2 instructions.
2014-09-15 12:15:55 +01:00
Ilya Tocar
d022bddd4f Add -momit_lock_prefix=[no|yes] option
This option serves as a workaround for processors, which fail on lock
prefix.

gas/
	* config/tc-i386.c (omit_lock_prefix): New.
	(output_insn): Omit lock prefix if omit_lock_prefix is true.
	(OPTION_omit_lock_prefix): New.
	(md_longopts): Add momit-lock-prefix.
	(md_parse_option): Handle momit-lock-prefix.
	(md_show_usage): Add momit-lock-prefix=[no|yes].
	* doc/c-i386.texi (momit-lock-prefix): Document.

gas/testsuite/

	* gas/i386/i386.exp: Run new tests.
	* gas/i386/omit-lock-no.d: New.
	* gas/i386/omit-lock-yes.d: Ditto.
	* gas/i386/omit-lock.s: Ditto.
2014-08-06 08:32:01 -07:00
Matthew Fortune
351cdf24d2 [MIPS] Implement O32 FPXX, FP64 and FP64A ABI extensions
Specification:
https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking

include/

	* elf/mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define.
	(Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64.
	(Val_GNU_MIPS_ABI_FP_64): Redefine.
	(Val_GNU_MIPS_ABI_FP_XX): Define.
	(Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures.
	(AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define.
	(AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise.
	(AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise.
	(AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise.
	(AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise.
	(AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise.
	(AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise.
	(AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise.
	(AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise.
	(AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise.
	(AFL_EXT_LOONGSON_2F): Likewise.
	(bfd_mips_elf_swap_abiflags_v0_in): Prototype.
	(bfd_mips_elf_swap_abiflags_v0_out): Likewise.
	(bfd_mips_isa_ext): Likewise.

bfd/

	* elfxx-mips.c (ABI_O32_P, MIPS_ELF_ABIFLAGS_SECTION_NAME_P): New macro.
	(mips_elf_obj_tdata): Add abiflags and abiflags_valid fields.
	(bfd_mips_elf_swap_abiflags_v0_in): New function.
	(bfd_mips_elf_swap_abiflags_v0_out): Likewise.
	(_bfd_mips_elf_section_from_shdr): Handle SHT_MIPS_ABIFLAGS.
	(_bfd_mips_elf_fake_sections): Likewise.
	(_bfd_mips_elf_always_size_sections): Handle .MIPS.abiflags.
	(_bfd_mips_elf_additional_program_headers): Account for new
	PT_MIPS_ABIFLAGS program header.
	(_bfd_mips_elf_modify_segment_map): Create PT_MIPS_ABIFLAGS segment and
	associate with .MIPS.abiflags.
	(_bfd_mips_elf_gc_mark_extra_sections): New function.
	(bfd_mips_isa_ext, update_mips_abiflags_isa): New static function.
	(infer_mips_abiflags): Likewise.
	(_bfd_mips_elf_final_link): Handle .MIPS.abiflags.
	(mips_32bit_flags_p): Moved higher.
	(mips_elf_merge_obj_attributes, _bfd_mips_fp_abi_string): Error
	checking for FP ABIs.
	(_bfd_mips_elf_merge_private_bfd_data): Restructure and add abiflags
	checks.  Check EF_MIPS_FP64 flag consistency.
	(print_mips_ases, print_mips_isa_ext): New static function.
	(print_mips_fp_abi_value, get_mips_reg_size): Likewise.
	(_bfd_mips_elf_print_private_bfd_data): Display abiflags data.
	(_bfd_mips_post_process_headers): Set EI_ABIVERSION = 3 for
	Val_GNU_MIPS_ABI_FP_64 or Val_GNU_MIPS_ABI_FP_64A.
	* elfxx-mips.h (_bfd_mips_elf_gc_mark_extra_sections): New prototype.
	* elf32-mips.c (elf_backend_gc_mark_extra_sections): Implement.
	* elfn32-mips.c (elf_backend_gc_mark_extra_sections): Implement.
	* elf64-mips.c (elf_backend_gc_mark_extra_sections): Implement.

binutils/

	* readelf.c (get_mips_segment_type): Display name for PT_MIPS_ABIFLAGS.
	(get_mips_section_type_name): Display name for SHT_MIPS_ABIFLAGS.
	(display_mips_gnu_attribute): Abstracted fp abi printing to...
	(print_mips_fp_abi_value): New static function. Handle new FP ABIs.
	(print_mips_ases, print_mips_isa_ext): New static functions.
	(get_mips_reg_size): Likewise.
	(process_mips_specific): Display abiflags data.

elfcpp/

	* elfcpp.h (PT_MIPS_ABIFLAGS): New program header type.

gas/

	* config/tc-mips.c (mips_flags_frag): New static global.
	(struct mips_set_options): Add oddspreg field.
	(file_mips_opts, mips_opts): Initialize oddspreg.
	(ISA_HAS_ODD_SINGLE_FPR): Add CPU argument and update for R5900 and
	Loongson-3a.
	(enum options, md_longopts, md_parse_option): Add -mfpxx, -modd-spreg
	and -mno-odd-spreg options.
	(md_begin): Create .MIPS.abiflags section.
	(fpabi_incompatible_with, fpabi_requires): New static function.
	(check_fpabi): Likewise.
	(mips_check_options): Handle fp=xx and oddspreg restrictions.
	(file_mips_check_options): Set oddspreg by default for fp=xx.
	(mips_oddfpreg_ok): Re-write function.
	(check_regno): Check odd numbered registers regardless of FPR size.
	For fp != 32 use as_bad instead of as_warn.
	(match_float_constant): Rewrite check regarding FP register width.  Add
	support for generating constants when MXHC1 is present.  Handle fp=xx
	to comply with the ABI.
	(macro): Update M_LI_DD similarly to match_float_constant.  Generate
	MTHC1 when available.  Check that correct code can be generated for
	fp=xx and fp=64 ABIs.
	(parse_code_option, s_mipsset): Add fp=xx, oddspreg and nooddspreg
	options.
	(mips_convert_ase_flags): New static function.
	(mips_elf_final_processing): Use fpabi == Val_GNU_MIPS_ABI_FP_OLD_64
	to determine when to add the EF_MIPS_FP64 flag.  Populate the
	.MIPS.abiflags section.
	(md_mips_end): Update .gnu_attribute based on command line and .module
	as applicable.  Use check_fpabi to ensure .gnu.attribute and command
	line/.module options are consistent.
	* doc/as.texinfo: Add missing -mgp64/-mfp64 options and document new
	-mfpxx, -modd-spreg and -mno-odd-spreg options.
	* doc/c-mips.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg,
	gnu_attribute values and FP ABIs.

ld/

	* emulparams/elf32bmip.sh: Add .MIPS.abiflags.
	* emulparams/elf32bmipn32-defs.sh: Likewise.
	* emulparams/elf64bmip-defs.sh: Likewise.

opcodes/

	* micromips-opc.c (COD, LCD) New macros.
	(cfc1, ctc1): Remove FP_S attribute.
	(dmfc1, mfc1, mfhc1): Add LCD attribute.
	(dmtc1, mtc1, mthc1): Add COD attribute.
	* mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.

binutils/testsuite/

	* binutils-all/readelf.s: Account for .MIPS.abiflags and
	.gnu.attributes.
	* binutils-all/readelf.ss-tmips: Likewise.
	* binutils-all/strip-3.d: Likewise.

gas/testsuite/

	* gas/mips/attr-gnu-4-0.d: New.
	* gas/mips/attr-gnu-4-0.s: Likewise.
	* gas/mips/attr-gnu-4-1-mfp32.l: Likewise.
	* gas/mips/attr-gnu-4-1-mfp32.s: Likewise.
	* gas/mips/attr-gnu-4-1-mfp64.l: Likewise.
	* gas/mips/attr-gnu-4-1-mfp64.s: Likewise.
	* gas/mips/attr-gnu-4-1-mfpxx.s: Likewise.
	* gas/mips/attr-gnu-4-1-msingle-float.l: Likewise.
	* gas/mips/attr-gnu-4-1-msingle-float.s: Likewise.
	* gas/mips/attr-gnu-4-1-msoft-float.l: Likewise.
	* gas/mips/attr-gnu-4-1-msoft-float.s: Likewise.
	* gas/mips/attr-gnu-4-1.d: Likewise.
	* gas/mips/attr-gnu-4-1.s: Likewise.
	* gas/mips/attr-gnu-4-2-mdouble-float.l: Likewise.
	* gas/mips/attr-gnu-4-2-mdouble-float.s: Likewise.
	* gas/mips/attr-gnu-4-2-msoft-float.l: Likewise.
	* gas/mips/attr-gnu-4-2-msoft-float.s: Likewise.
	* gas/mips/attr-gnu-4-2.d: Likewise.
	* gas/mips/attr-gnu-4-2.s: Likewise.
	* gas/mips/attr-gnu-4-3-mhard-float.l: Likewise.
	* gas/mips/attr-gnu-4-3-mhard-float.s: Likewise.
	* gas/mips/attr-gnu-4-3.d: Likewise.
	* gas/mips/attr-gnu-4-3.s: Likewise.
	* gas/mips/attr-gnu-4-4.l: Likewise.
	* gas/mips/attr-gnu-4-4.s: Likewise.
	* gas/mips/attr-gnu-4-5-64.l: Likewise.
	* gas/mips/attr-gnu-4-5-64.s: Likewise.
	* gas/mips/attr-gnu-4-5.d: Likewise.
	* gas/mips/attr-gnu-4-5.l: Likewise.
	* gas/mips/attr-gnu-4-5.s: Likewise.
	* gas/mips/attr-gnu-4-6-64.l: Likewise.
	* gas/mips/attr-gnu-4-6-64.s: Likewise.
	* gas/mips/attr-gnu-4-6.d: Likewise.
	* gas/mips/attr-gnu-4-6.l: Likewise.
	* gas/mips/attr-gnu-4-6.s: Likewise.
	* gas/mips/attr-gnu-4-6-msingle-float.l: Likewise.
	* gas/mips/attr-gnu-4-6-msingle-float.s: Likewise.
	* gas/mips/attr-gnu-4-6-msoft-float.l: Likewise.
	* gas/mips/attr-gnu-4-6-msoft-float.s: Likewise.
	* gas/mips/attr-gnu-4-6-noodd.l: Likewise.
	* gas/mips/attr-gnu-4-6-noodd.s: Likewise.
	* gas/mips/attr-gnu-4-7-64.l: Likewise.
	* gas/mips/attr-gnu-4-7-64.s: Likewise.
	* gas/mips/attr-gnu-4-7-msingle-float.l: Likewise.
	* gas/mips/attr-gnu-4-7-msingle-float.s: Likewise.
	* gas/mips/attr-gnu-4-7-msoft-float.l: Likewise.
	* gas/mips/attr-gnu-4-7-msoft-float.s: Likewise.
	* gas/mips/attr-gnu-4-7-odd.l: Likewise.
	* gas/mips/attr-gnu-4-7-odd.s: Likewise.
	* gas/mips/attr-gnu-4-7.d: Likewise.
	* gas/mips/attr-gnu-4-7.l: Likewise.
	* gas/mips/attr-gnu-4-7.s: Likewise.
	* gas/mips/attr-none-double.d: Likewise.
	* gas/mips/attr-none-o32-fp64.d: Likewise.
	* gas/mips/attr-none-o32-fp64-nooddspreg.d
	* gas/mips/attr-none-o32-fpxx.d: Likewise.
	* gas/mips/attr-none-single-float.d: Likewise.
	* gas/mips/attr-none-soft-float.d: Likewise.
	* gas/mips/elf_arch_mips32r3.d: Likewise.
	* gas/mips/elf_arch_mips32r5.d: Likewise.
	* gas/mips/elf_arch_mips64r3.d: Likewise.
	* gas/mips/elf_arch_mips64r5.d: Likewise.
	* gas/mips/li-d.d: Likewise.
	* gas/mips/li-d.s: Likewise.
	* gas/mips/module-check-warn.l: Likewise.
	* gas/mips/module-check-warn.s: Likewise.
	* gas/mips/module-check.d: Likewise.
	* gas/mips/module-check.s: Likewise.
	* gas/mips/module-mfp32.d: Likewise.
	* gas/mips/module-mfp32.s: Likewise.
	* gas/mips/module-mfp64.d: Likewise.
	* gas/mips/module-mfp64.s: Likewise.
	* gas/mips/module-mfp64-noodd.d: Likewise.
	* gas/mips/module-mfp64-noodd.s: Likewise.
	* gas/mips/module-mfpxx.d: Likewise.
	* gas/mips/module-mfpxx.s: Likewise.
	* gas/mips/module-msingle-float.d: Likewise.
	* gas/mips/module-msingle-float.s: Likewise.
	* gas/mips/module-msoft-float.d: Likewise.
	* gas/mips/module-msoft-float.s: Likewise.
	* gas/mips/module-set-mfpxx.d: Likewise.
	* gas/mips/module-set-mfpxx.s: Likewise.
	* gas/mips/fpxx-oddfpreg.d: Likewise.
	* gas/mips/fpxx-oddfpreg.l: Likewise.
	* gas/mips/fpxx-oddfpreg.s: Likewise.
	* gas/mips/no-odd-spreg.d: Likewise.
	* gas/mips/odd-spreg.d: Likewise.
	* gas/elf/section2.e-mips: Adjust expected output.
	* gas/mips/attr-gnu-abi-fp-1.d: Likewise.
	* gas/mips/attr-gnu-abi-msa-1.d: Likewise.
	* gas/mips/call-nonpic-1.d: Likewise.
	* gas/mips/elf_arch_mips1.d: Likewise.
	* gas/mips/elf_arch_mips2.d: Likewise.
	* gas/mips/elf_arch_mips3.d: Likewise.
	* gas/mips/elf_arch_mips32.d: Likewise.
	* gas/mips/elf_arch_mips32r2.d: Likewise.
	* gas/mips/elf_arch_mips4.d: Likewise.
	* gas/mips/elf_arch_mips5.d: Likewise.
	* gas/mips/elf_arch_mips64.d: Likewise.
	* gas/mips/elf_arch_mips64r2.d: Likewise.
	* gas/mips/elf_ase_micromips-2.d: Likewise.
	* gas/mips/elf_ase_micromips.d: Likewise.
	* gas/mips/elf_ase_mips16-2.d: Likewise.
	* gas/mips/elf_ase_mips16.d: Likewise.
	* gas/mips/module-defer-warn1.d: Likewise.
	* gas/mips/module-override.d: Likewise.
	* gas/mips/n32-consec.d: Likewise.
	* gas/mips/nan-2008-1.d: Likewise.
	* gas/mips/nan-2008-2.d: Likewise.
	* gas/mips/nan-2008-3.d: Likewise.
	* gas/mips/nan-2008-4.d: Likewise.
	* gas/mips/nan-legacy-1.d: Likewise.
	* gas/mips/nan-legacy-2.d: Likewise.
	* gas/mips/nan-legacy-3.d: Likewise.
	* gas/mips/nan-legacy-4.d: Likewise.
	* gas/mips/nan-legacy-5.d: Likewise.
	* gas/mips/tmips16-e.d: Likewise.
	* gas/mips/tmips16-f.d: Likewise.
	* gas/mips/tmipsel16-e.d: Likewise.
	* gas/mips/tmipsel16-f.d: Likewise.
	* gas/testsuite/gas/mips/mips.exp: Add new tests.

ld/testsuite/

	* ld-mips-elf/abiflags-strip1-ph.d: New.
	* ld-mips-elf/abiflags-strip2-ph.d: Likewise.
	* ld-mips-elf/abiflags-strip3-ph.d: Likewise.
	* ld-mips-elf/abiflags-strip4-ph.d: Likewise.
	* ld-mips-elf/abiflags-strip5-ph.d: Likewise.
	* ld-mips-elf/abiflags-strip6-ph.d: Likewise.
	* ld-mips-elf/abiflags-strip7-ph.d: Likewise.
	* ld-mips-elf/abiflags-strip8-ph.d: Likewise.
	* ld-mips-elf/abiflags-strip9-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-0-n32-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-0-n64-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-0-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-06.d: Likewise.
	* ld-mips-elf/attr-gnu-4-07.d: Likewise.
	* ld-mips-elf/attr-gnu-4-08.d: Likewise.
	* ld-mips-elf/attr-gnu-4-1-n32-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-1-n64-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-1-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-16.d: Likewise.
	* ld-mips-elf/attr-gnu-4-17.d: Likewise.
	* ld-mips-elf/attr-gnu-4-18.d: Likewise.
	* ld-mips-elf/attr-gnu-4-2-n32-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-2-n64-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-2-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-26.d: Likewise.
	* ld-mips-elf/attr-gnu-4-27.d: Likewise.
	* ld-mips-elf/attr-gnu-4-28.d: Likewise.
	* ld-mips-elf/attr-gnu-4-3-n32-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-3-n64-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-3-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-36.d: Likewise.
	* ld-mips-elf/attr-gnu-4-37.d: Likewise.
	* ld-mips-elf/attr-gnu-4-38.d: Likewise.
	* ld-mips-elf/attr-gnu-4-4-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-46.d: Likewise.
	* ld-mips-elf/attr-gnu-4-47.d: Likewise.
	* ld-mips-elf/attr-gnu-4-48.d: Likewise.
	* ld-mips-elf/attr-gnu-4-5-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-50.d: Likewise.
	* ld-mips-elf/attr-gnu-4-52.d: Likewise.
	* ld-mips-elf/attr-gnu-4-53.d: Likewise.
	* ld-mips-elf/attr-gnu-4-54.d: Likewise.
	* ld-mips-elf/attr-gnu-4-55.d: Likewise.
	* ld-mips-elf/attr-gnu-4-56.d: Likewise.
	* ld-mips-elf/attr-gnu-4-57.d: Likewise.
	* ld-mips-elf/attr-gnu-4-58.d: Likewise.
	* ld-mips-elf/attr-gnu-4-6-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-6.s: Likewise.
	* ld-mips-elf/attr-gnu-4-60.d: Likewise.
	* ld-mips-elf/attr-gnu-4-61.d: Likewise.
	* ld-mips-elf/attr-gnu-4-62.d: Likewise.
	* ld-mips-elf/attr-gnu-4-63.d: Likewise.
	* ld-mips-elf/attr-gnu-4-64.d: Likewise.
	* ld-mips-elf/attr-gnu-4-65.d: Likewise.
	* ld-mips-elf/attr-gnu-4-66.d: Likewise.
	* ld-mips-elf/attr-gnu-4-67.d: Likewise.
	* ld-mips-elf/attr-gnu-4-68.d: Likewise.
	* ld-mips-elf/attr-gnu-4-7-ph.d: Likewise.
	* ld-mips-elf/attr-gnu-4-7.s: Likewise.
	* ld-mips-elf/attr-gnu-4-70.d: Likewise.
	* ld-mips-elf/attr-gnu-4-71.d: Likewise.
	* ld-mips-elf/attr-gnu-4-72.d: Likewise.
	* ld-mips-elf/attr-gnu-4-73.d: Likewise.
	* ld-mips-elf/attr-gnu-4-74.d: Likewise.
	* ld-mips-elf/attr-gnu-4-75.d: Likewise.
	* ld-mips-elf/attr-gnu-4-76.d: Likewise.
	* ld-mips-elf/attr-gnu-4-77.d: Likewise.
	* ld-mips-elf/attr-gnu-4-78.d: Likewise.
	* ld-mips-elf/attr-gnu-4-8.s: Likewise.
	* ld-mips-elf/attr-gnu-4-81.d: Likewise.
	* ld-mips-elf/empty.s: Likewise.
	* ld-mips-elf/attr-gnu-4-00.d: Adjust expected output.
	* ld-mips-elf/attr-gnu-4-01.d: Likewise.
	* ld-mips-elf/attr-gnu-4-02.d: Likewise.
	* ld-mips-elf/attr-gnu-4-03.d: Likewise.
	* ld-mips-elf/attr-gnu-4-04.d: Likewise.
	* ld-mips-elf/attr-gnu-4-05.d: Likewise.
	* ld-mips-elf/attr-gnu-4-10.d: Likewise.
	* ld-mips-elf/attr-gnu-4-11.d: Likewise.
	* ld-mips-elf/attr-gnu-4-14.d: Likewise.
	* ld-mips-elf/attr-gnu-4-15.d: Likewise.
	* ld-mips-elf/attr-gnu-4-2.s: Likewise.
	* ld-mips-elf/attr-gnu-4-20.d: Likewise.
	* ld-mips-elf/attr-gnu-4-22.d: Likewise.
	* ld-mips-elf/attr-gnu-4-24.d: Likewise.
	* ld-mips-elf/attr-gnu-4-25.d: Likewise.
	* ld-mips-elf/attr-gnu-4-3.s: Likewise.
	* ld-mips-elf/attr-gnu-4-30.d: Likewise.
	* ld-mips-elf/attr-gnu-4-33.d: Likewise.
	* ld-mips-elf/attr-gnu-4-34.d: Likewise.
	* ld-mips-elf/attr-gnu-4-35.d: Likewise.
	* ld-mips-elf/attr-gnu-4-40.d: Likewise.
	* ld-mips-elf/attr-gnu-4-41.d: Likewise.
	* ld-mips-elf/attr-gnu-4-42.d: Likewise.
	* ld-mips-elf/attr-gnu-4-43.d: Likewise.
	* ld-mips-elf/attr-gnu-4-44.d: Likewise.
	* ld-mips-elf/attr-gnu-4-45.d: Likewise.
	* ld-mips-elf/attr-gnu-4-5.s: Likewise.
	* ld-mips-elf/attr-gnu-4-51.d: Likewise.
	* ld-mips-elf/attr-gnu-8-00.d: Likewise.
	* ld-mips-elf/attr-gnu-8-01.d: Likewise.
	* ld-mips-elf/attr-gnu-8-02.d: Likewise.
	* ld-mips-elf/attr-gnu-8-10.d: Likewise.
	* ld-mips-elf/attr-gnu-8-11.d: Likewise.
	* ld-mips-elf/attr-gnu-8-20.d: Likewise.
	* ld-mips-elf/attr-gnu-8-22.d: Likewise.
	* ld-mips-elf/jalx-2.dd: Likewise.
	* ld-mips-elf/mips16-pic-1.gd: Likewise.
	* ld-mips-elf/mips16-pic-2.gd: Likewise.
	* ld-mips-elf/mips16-pic-3.gd: Likewise.
	* ld-mips-elf/mips16-pic-4a.gd: Likewise.
	* ld-mips-elf/multi-got-no-shared.d: Likewise.
	* ld-mips-elf/nan-2008.d: Likewise.
	* ld-mips-elf/nan-legacy.d: Rework test.
	* ld-mips-elf/pic-and-nonpic-3a.gd: Likewise.
	* ld-mips-elf/pic-and-nonpic-3b.gd: Likewise.
	* ld-mips-elf/pic-and-nonpic-5b.gd: Likewise.
	* ld-mips-elf/pic-and-nonpic-6.ld: Likewise.
	* ld-mips-elf/rel32-n32.d: Likewise.
	* ld-mips-elf/rel32-o32.d: Likewise.
	* ld-mips-elf/rel64.d: Likewise.
	* ld-mips-elf/tls-multi-got-1.r: Likewise.
	* ld-elf/group.ld: Discard .MIPS.abiflags and .gnu.attributes.
	* ld-elf/orphan-region.ld: Likewise.
	* ld-elf/orphan.ld: Likewise.
	* ld-mips-elf/compressed-plt-1.ld: Likewise.
	* ld-mips-elf/dyn-sec64.ld: Likewise.
	* ld-mips-elf/got-dump-1.ld: Likewise.
	* ld-mips-elf/got-dump-2.ld: Likewise.
	* ld-mips-elf/got-page-1.ld: Likewise.
	* ld-mips-elf/mips-dyn.ld: Likewise.
	* ld-mips-elf/mips-lib.ld: Likewise.
	* ld-mips-elf/pic-and-nonpic-3a.ld: Likewise.
	* ld-mips-elf/pic-and-nonpic-3b.ld: Likewise.
	* ld-mips-elf/pic-and-nonpic-4b.ld: Likewise.
	* ld-mips-elf/pic-and-nonpic-5b.ld: Likewise.
	* ld-mips-elf/region1.t: Likewise.
	* ld-mips-elf/stub-dynsym-1.ld: Likewise.
	* ld-mips-elf/tls-hidden3.ld: Likewise.
	* ld-mips-elf/vxworks1.ld: Likewise.
	* ld-scripts/overlay-size.t: Likewise.
	* ld-mips-elf/elf-rel-got-n32-embed.d: Remove .MIPS.abiflags from
	objects.
	* ld-mips-elf/elf-rel-got-n32.d: Likewise.
	* ld-mips-elf/elf-rel-got-n64-embed.d: Likewise.
	* ld-mips-elf/elf-rel-got-n64-linux.d: Likewise.
	* ld-mips-elf/elf-rel-got-n64.d: Likewise.
	* ld-mips-elf/elf-rel-xgot-n32.d: Likewise.
	* ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise.
	* ld-mips-elf/elf-rel-xgot-n64.d: Likewise.
	* ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise.
	* ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise.
	* ld-mips-elf/mips-elf.exp: Add new tests.
2014-07-29 11:27:59 +01:00
Ilya Tocar
90a915bf0c Add AVX512DQ instructions and their AVX512VL variants.
gas/

	* config/tc-i386.c (cpu_arch): Add .avx512dq, CPU_AVX512DQ_FLAGS.
	* doc/c-i386.texi: Document avx512dq/.avx512dq.

gas/testsuite/

	* gas/i386/avx512dq-intel.d: New.
	* gas/i386/avx512dq.d: New.
	* gas/i386/avx512dq.s: New.
	* gas/i386/avx512dq_vl-intel.d: New.
	* gas/i386/avx512dq_vl.d: New.
	* gas/i386/avx512dq_vl.s: New.
	* gas/i386/i386.exp: Run new AVX-512 tests.
	* gas/i386/x86-64-avx512dq-intel.d: New.
	* gas/i386/x86-64-avx512dq.d: New.
	* gas/i386/x86-64-avx512dq.s: New.
	* gas/i386/x86-64-avx512dq_vl-intel.d: New.
	* gas/i386/x86-64-avx512dq_vl.d: New.
	* gas/i386/x86-64-avx512dq_vl.s: New.

opcodes/

	* i386-dis-evex.h: Updated.
	* i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
	PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
	PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
	PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
	PREFIX_EVEX_0F3A67.
	(VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
	VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
	(VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
	EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
	EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
	EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
	EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
	EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
	EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
	(prefix_table): Add entries for new instructions.
	(vex_len_table): Ditto.
	(vex_w_table): Ditto.
	(OP_E_memory): Update xmmq_mode handling.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
	(cpu_flags): Add CpuAVX512DQ.
	* i386-init.h: Regenerared.
	* i386-opc.h (CpuAVX512DQ): New.
	(i386_cpu_flags): Add cpuavx512dq.
	* i386-opc.tbl: Add AVX512DQ instructions.
	* i386-tbl.h: Regenerate.
2014-07-22 10:23:49 -07:00
Ilya Tocar
1ba585e8f4 Add support for AVX512BW instructions and their AVX512VL versions.
gas/

	* config/tc-i386.c (cpu_arch): Add .avx512bw, CPU_AVX512BW_FLAGS.
	* doc/c-i386.texi: Document avx512bw/.avx512bw.

gas/testsuite/

	* gas/i386/avx512bw-intel.d: New.
	* gas/i386/avx512bw-opts-intel.d: New.
	* gas/i386/avx512bw-opts.d: New.
	* gas/i386/avx512bw-opts.s: New.
	* gas/i386/avx512bw-wig.s: New.
	* gas/i386/avx512bw-wig1-intel.d: New.
	* gas/i386/avx512bw-wig1.d: New.
	* gas/i386/avx512bw.d: New.
	* gas/i386/avx512bw.s: New.
	* gas/i386/avx512bw_vl-intel.d: New.
	* gas/i386/avx512bw_vl-opts-intel.d: New.
	* gas/i386/avx512bw_vl-opts.d: New.
	* gas/i386/avx512bw_vl-opts.s: New.
	* gas/i386/avx512bw_vl-wig.s: New.
	* gas/i386/avx512bw_vl-wig1-intel.d: New.
	* gas/i386/avx512bw_vl-wig1.d: New.
	* gas/i386/avx512bw_vl.d: New.
	* gas/i386/avx512bw_vl.s: New.
	* gas/i386/i386.exp: Run new AVX-512 tests.
	* gas/i386/x86-64-avx512bw-intel.d: New.
	* gas/i386/x86-64-avx512bw-opts-intel.d: New.
	* gas/i386/x86-64-avx512bw-opts.d: New.
	* gas/i386/x86-64-avx512bw-opts.s: New.
	* gas/i386/x86-64-avx512bw-wig.s: New.
	* gas/i386/x86-64-avx512bw-wig1-intel.d: New.
	* gas/i386/x86-64-avx512bw-wig1.d: New.
	* gas/i386/x86-64-avx512bw.d: New.
	* gas/i386/x86-64-avx512bw.s: New.
	* gas/i386/x86-64-avx512bw_vl-intel.d: New.
	* gas/i386/x86-64-avx512bw_vl-opts-intel.d: New.
	* gas/i386/x86-64-avx512bw_vl-opts.d: New.
	* gas/i386/x86-64-avx512bw_vl-opts.s: New.
	* gas/i386/x86-64-avx512bw_vl-wig.s: New.
	* gas/i386/x86-64-avx512bw_vl-wig1-intel.d: New.
	* gas/i386/x86-64-avx512bw_vl-wig1.d: New.
	* gas/i386/x86-64-avx512bw_vl.d: New.
	* gas/i386/x86-64-avx512bw_vl.s: New.

opcodes/

	* i386-dis-evex.h: Add new instructions (prefixes bellow).
	* i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
	(enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
	(PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
	PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
	PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
	PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
	PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
	PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
	PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
	PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
	PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
	PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
	PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
	PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
	PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
	PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
	PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
	PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
	PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
	PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
	PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
	PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
	(VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
	VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
	VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
	VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
	VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
	VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
	VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
	VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
	VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
	VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
	VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
	(VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
	EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
	EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
	EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
	EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
	EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
	EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
	(prefix_table): Add entries for new instructions.
	(vex_table) : Ditto.
	(vex_len_table): Ditto.
	(vex_w_table): Ditto.
	(intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
	mask_bd_mode handling.
	(OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
	handling.
	(OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
	handling.
	(OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
	(OP_EX): Add dqw_swap_mode handling.
	(OP_VEX): Add mask_bd_mode handling.
	(OP_Mask): Add mask_bd_mode handling.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
	(cpu_flags): Add CpuAVX512BW.
	* i386-init.h: Regenerated.
	* i386-opc.h (CpuAVX512BW): New.
	(i386_cpu_flags): Add cpuavx512bw.
	* i386-opc.tbl: Add AVX512BW instructions.
	* i386-tbl.h: Regenerate.
2014-07-22 10:23:44 -07:00
Ilya Tocar
b28d1bda54 Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.
gas/

	* config/tc-i386.c (cpu_arch): Add .avx512vl, CPU_AVX512VL_FLAGS.
	(build_vex_prefix): Don't abort on VEX.W.
	(check_VecOperands): Support BROADCAST_1TO4 and BROADCAST_1TO2.
	(check_VecOperations): Ditto.
	* doc/c-i386.texi: Document avx512vl/.avx512vl.

gas/testsuite/

	* gas/i386/avx512f_vl-intel.d: New.
	* gas/i386/avx512f_vl-opts-intel.d: New.
	* gas/i386/avx512f_vl-opts.d: New.
	* gas/i386/avx512f_vl-opts.s: New.
	* gas/i386/avx512f_vl-wig.s: New.
	* gas/i386/avx512f_vl-wig1-intel.d: New.
	* gas/i386/avx512f_vl-wig1.d: New.
	* gas/i386/avx512f_vl.d: New.
	* gas/i386/avx512f_vl.s: New.
	* gas/i386/i386.exp: Run new AVX-512 tests.
	* gas/i386/x86-64-avx512f_vl-intel.d: New.
	* gas/i386/x86-64-avx512f_vl-opts-intel.d: New.
	* gas/i386/x86-64-avx512f_vl-opts.d: New.
	* gas/i386/x86-64-avx512f_vl-opts.s: New.
	* gas/i386/x86-64-avx512f_vl-wig.s: New.
	* gas/i386/x86-64-avx512f_vl-wig1-intel.d: New.
	* gas/i386/x86-64-avx512f_vl-wig1.d: New.
	* gas/i386/x86-64-avx512f_vl.d: New.
	* gas/i386/x86-64-avx512f_vl.s: New.

opcodes/

	* i386-dis.c (intel_operand_size): Support 128/256 length in
	vex_vsib_q_w_dq_mode.
	(OP_E_memory): Add ymmq_mode handling, handle new broadcast.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
	(cpu_flags): Add CpuAVX512VL.
	* i386-init.h: Regenerated.
	* i386-opc.h (CpuAVX512VL): New.
	(i386_cpu_flags): Add cpuavx512vl.
	(BROADCAST_1TO4, BROADCAST_1TO2): Define.
	* i386-opc.tbl: Add AVX512VL instructions.
	* i386-tbl.h: Regenerate.
2014-07-22 10:23:40 -07:00
Alan Modra
1110793abe Update "configure.in" in comments and doco
bfd/
	* Makefile.am: Update "configure.in" comments.
	* PORTING: Likewise.
	* aoutx.h: Likewise.
	* configure.host: Likewise.
	* doc/bfdint.texi: Likewise.
	* targets.c: Likewise.
	* warning.m4: Likewise.
	* Makefile.in: Regenerate.
gas/
	* doc/internals.texi: Update "configure.in" comments.
	* acinclude.m4: Likewise.
	* config/tc-sparc.c: Likewise.
ld/
	* configure.ac: Update "configure.in" comments.
	* configure: Regenerate.
2014-07-04 15:06:40 +09:30
Alan Modra
35eafcc71b Rename configure.in to configure.ac
bfd/
	* configure.ac: Rename from configure.in.
	* Makefile.in: Regenerate.
	* config.in: Regenerate.
	* doc/Makefile.in: Regenerate.
opcodes/
	* configure.ac: Rename from configure.in.
	* Makefile.in: Regenerate.
	* config.in: Regenerate.
binutils/
	* configure.ac: Rename from configure.in.
	* Makefile.in: Regenerate.
	* config.in: Regenerate.
	* doc/Makefile.in: Regenerate.
gas/
	* configure.ac: Rename from configure.in.
	* Makefile.in: Regenerate.
	* config.in: Regenerate.
	* doc/Makefile.in: Regenerate.
gprof/
	* configure.ac: Rename from configure.in.
	* configure.ac: Rename from configure.in.
	* Makefile.in: Regenerate.
	* gconfig.in: Regenerate.
ld/
	* configure.ac: Rename from configure.in.
	* Makefile.in: Regenerate.
	* config.in: Regenerate.
2014-07-04 13:40:28 +09:30
Alan Modra
82b57a900f Remove some more bfd/configure.in dependencies
Missed from 2e98a7bd

bfd/
	* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove configure.in.
	* Makefile.in: Regenerate.
gas/
	* doc/Makefile.am (CONFIG_STATUS_DEPENDENCIES): Delete.
	* doc/Makefile.in: Regenerate.
2014-07-04 13:25:49 +09:30
Alan Modra
2e98a7bd88 Use modern AC_INIT in configure.in
This removes usage of the obsolete AC_INIT and AM_INIT_AUTOMAKE in all
binutils configure.in files.  The BFD version is now in bfd/version.m4
rather than bfd/configure.in, which allows automake to automatically
track this dependency.

bfd/
	* version.m4: New file.
	* configure.in: Include version.m4.
	(AC_INIT): Update.
	* Makefile.am (RELEASE): Delete.
	(bfdver.h): Depend on development.sh, use instead of RELEASE.
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
opcodes/
	* configure.in: Include bfd/version.m4.
	(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
	(BFD_VERSION): Delete.
	* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
	* configure: Regenerate.
	* Makefile.in: Regenerate.
binutils/
	* configure.in: Include bfd/version.m4.
	(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
	(BFD_VERSION): Delete.
	* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
	* configure: Regenerate.
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
gas/
	* configure.in: Include bfd/version.m4.
	(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
	(BFD_VERSION): Delete.
	* configure.com: Get bfd version from bfd/version.m4.
	* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
	* configure: Regenerate.
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
gprof/
	* configure.in: Include bfd/version.m4.
	(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
	(BFD_VERSION): Delete.
	* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
	* configure: Regenerate.
	* Makefile.in: Regenerate.
ld/
	* configure.in: Include bfd/version.m4.
	(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
	(BFD_VERSION): Delete.
	* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
	* configure: Regenerate.
	* Makefile.in: Regenerate.
2014-07-04 12:41:26 +09:30
Barney Stratford
f36e88862f Add support for the AVR Tiny series of microcontrollers.
* archures.c: add avrtiny architecture for avr target.
	* bfd-in2.h: Regenerate.
	* cpu-avr.c (arch_info_struct): add avrtiny arch info.
	* elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16
	added for 16 bit LDS/STS instruction of avrtiny arch.
	(avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to
	BFD_RELOC_AVR_LDS_STS_16.
	(bfd_elf_avr_final_write_processing): select machine number avrtiny arch.
	(elf32_avr_object_p): set machine number for avrtiny arch.
	* libbfd.h: Regenerate.
	* reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc.

         * config/tc-avr.c (mcu_types): Add avrtiny arch.
	Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20
	and attiny40.
	(md_show_usage): Add avrtiny arch in usage message.
	(avr_operand): validate and issue error for invalid register for avrtiny.
	add new reloc exp for 16 bit lds/sts instruction.
	(md_apply_fix): check 16 bit lds/sts operand for out of range and encode.
	(md_assemble): check ISA for arch and issue diagnostic.

	* include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number.
	(R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number.
	* include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA.
	(AVR_ISA_2xxxa): define ISA without LPM.
	(AVR_ISA_AVRTINY): define avrtiny arch ISA.
	Add doc for contraint used in 16 bit lds/sts.
	Adjust ISA group for icall, ijmp, pop and push.
	Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints.
	* opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
	(print_insn_avr): do not select opcode if insn ISA is avrtiny and machine
	is not avrtiny.

	* Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source.
	(eavrtiny.c): add rules for avrtiny emulation source.
	* Makefile.in: Regenerate.
	* configure.tgt: Add avrtiny to avr target emulations.
	* scripttempl/avrtiny.sc: New file.
	linker script template for avrtiny arch.
	* emulparams/avrtiny.sh: New file.
	emulation parameters for avrtiny arch.
2014-07-01 10:20:17 +01:00
Martin Storsjo
34fd659b79 [AArch64] Fix the documentation on :pg_hi21: 2014-06-06 07:29:19 +01:00
Nick Clifton
69227609dc Change -mz command line option to -my for the MSP430 port of GAS.
* config/tc-msp430.c (OPTION_WARN_INTR_NOPS): Use y instead of z.
	(OPTION_NO_WARN_INTR_NOPS): Use Y instead of Z.
	* doc/c-msp430.texi: Update command line option description.

	* gas/msp430/bad.d: Use -my not -mz.
2014-06-03 08:49:02 +01:00
mfortune
919731affb Add MIPS .module directive
gas/

	* config/tc-mips.c (file_mips_opts_checked): New static global.
	(s_module): New static function.
	(file_ase): Remove.
	(mips_pseudo_table): Add .module handler.
	(mips_set_ase): Add opts argument and use instead of mips_opts.
 	(md_assemble): Use file_mips_check_options.
	(md_parse_option): Update to use file_mips_opts instead of mips_opts.
	(mips_set_architecture): Delete function.  Moved to...
	(mips_after_parse_args): Here.  All logic now applies to
	file_mips_opts first and then copies the final state to mips_opts.
	Move error checking and defaults inference to mips_check_options and
	file_mips_check_options.
	(mips_check_options): New static function.  Common option checking for
	command line, .module and .set.  Use .module values in error messages
	instead of refering to command line options.
	(file_mips_check_options): New static function.  A wrapper for
	mips_check_options with file_mips_opts.  Updates BFD arch based on
	final options.
	(s_mipsset): Split into s_mipsset and parse_code_option.  Settings
	supported by both .set and .module are moved to parse_code_option.
	Warnings and errors are kept in s_mipsset because when
	parse_code_option is used with s_module the warnings are deferred
	until code is generated.  Any setting supporting 'default' value is
	kept in s_mipsset as it is not applicable to s_module. Inferred
	settings are also kept in s_mipsset as s_module does not infer any
	settings.  Use mips_check_options.
	(parse_code_option): New static function derived from s_mipsset.
	(s_module): New static function that implements .module.  Allows file
	level settings to be changed until code is generated.
	(s_cpload, s_cpsetup, s_cplocal): Use file_mips_check_options.
	(s_cprestore, s_cpreturn, s_cpadd, mips_address_bytes): Likewise.
	(mips_elf_final_processing): Update file_ase to file_mips_opts.ase.
	(md_mips_end): Use file_mips_check_options.
	* doc/c-mips.texi: Document .module.

gas/testsuite

	* gas/mips/mips.exp: Add new tests.  Use 64-bit ABI for relax-bc1any.
	Fix micromips arch definition to use mips64r2 consistently.
	* gas/mips/module-defer-warn1.s: New.
	* gas/mips/module-defer-warn1.d: New.
	* gas/mips/module-defer-warn2.s: New.
	* gas/mips/module-defer-warn2.l: New.
	* gas/mips/module-override.d: New.
	* gas/mips/module-override.s: New.
	* gas/mips/mips-gp32-fp64.l: Update expected output.
	* gas/mips/mips-gp64-fp32-pic.l: Update expected output.
	* gas/mips/mips-gp64-fp32.l: Update expected output.
2014-05-20 23:46:43 +01:00
Kaushik Phata
856ea05ccf This adds support for marking RL78 binaries as either supporting 32-bit
or 64-bit doubles.  It also makes the linker complain if the user attempts
to link together binaries with different sized doubles.

	* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Complain if
	64-bit doubles objects mix with 32-bit doubles objects.
	(rl78_elf_print_private_bfd_data): Describe 64-bit doubles flag.

	* readelf.c (get_machine_flags): Handle RL78 64-bit doubles flag.

	* config/tc-rl78.c (enum options): Add OPTION_32BIT_DOUBLES
	and OPTION_64BIT_DOUBLES.
	(md_longopts): Add -m32bit-doubles and -m64bit-doubles.
	(md_parse_option): Parse -m32bit-doubles and -m64bit-doubles.
	(md_show_usage): Show all of the RL78 options.
	(rl78_float_cons): New static functions.
	(md_pseudo_table): Update handler for "double".
2014-05-16 14:57:10 +01:00
Andrew Bennett
ae52f48306 Add MIPS r3 and r5 support.
This patch firstly adds support for mips32r3 mips32r5, mips64r3
and mips64r5.  Secondly it adds support for the eretnc instruction.

ChangeLog:

bfd/
	* aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3,
	mips32r5 and mips64r5.
	* archures.c (bfd_architecture): Likewise.
	* bfd-in2.h (bfd_architecture): Likewise.
	* cpu-mips.c (arch_info_struct): Likewise.
	* elfxx-mips.c (mips_set_isa_flags): Likewise.

gas/
	* tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3
	and mips64r5.
	(ISA_HAS_64BIT_FPRS): Likewise.
	(ISA_HAS_ROR): Likewise.
	(ISA_HAS_ODD_SINGLE_FPR): Likewise.
	(ISA_HAS_MXHC1): Likewise.
	(hilo_interlocks): Likewise.
	(md_longopts): Likewise.
	(ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5.
	(ISA_HAS_DROR): Likewise.
	(options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and
	OPTION_MIPS64R5.
	(mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and
	mips64r5.
	(md_parse_option): Likewise.
	(s_mipsset): Likewise.
	(mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3
	and mips64r5.  Also change p5600 entry to be mips32r5.
	* configure.in: Add support for mips32r3, mips32r5, mips64r3 and
	mips64r5.
	* configure: Regenerate.
	* doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and
	-mips64r5 command line options.
	* doc/as.texinfo: Likewise.

gas/testsuite/
	* gas/mips/mips.exp: Add MIPS32r5 tests.  Also add the mips32r3,
	mips32r5, mips64r3 and mips64r5 isas to the testsuite.
	* gas/mips/r5.s: New test.
	* gas/mips/r5.d: Likewise.

include/opcode/
	* mips.h (INSN_ISA_MASK): Updated.
	(INSN_ISA32R3): New define.
	(INSN_ISA32R5): New define.
	(INSN_ISA64R3): New define.
	(INSN_ISA64R5): New define.
	(INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32
	INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered.
	(mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and
	mips64r5.
	(INSN_UPTO32R3): New define.
	(INSN_UPTO32R5): New define.
	(INSN_UPTO64R3): New define.
	(INSN_UPTO64R5): New define.
	(ISA_MIPS32R3): New define.
	(ISA_MIPS32R5): New define.
	(ISA_MIPS64R3): New define.
	(ISA_MIPS64R5): New define.
	(CPU_MIPS32R3): New define.
	(CPU_MIPS32R5): New define.
	(CPU_MIPS64R3): New define.
	(CPU_MIPS64R5): New define.

opcodes/
	* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
	(I34): New define.
	(I36): New define.
	(I66): New define.
	(I68): New define.
	* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
	mips64r5.
	(parse_mips_dis_option): Update MSA and virtualization support to
	allow mips64r3 and mips64r5.
2014-05-07 11:47:29 +01:00
Andrew Bennett
7d64c587c1 Add support for the MIPS eXtended Physical Address (XPA) ASE.
ChangeLog:

binutils/
	* doc/binutils.texi: Document the disassemble MIPS XPA instructions
	command line option.

gas/
	* config/tc-mips.c (options): Add OPTION_XPA and OPTION_NO_XPA.
 	(md_longopts): Add xpa and no-xpa command line options.
 	(mips_ases): Add MIPS XPA ASE.
 	(mips_cpu_info_table): Update p5600 entry to allow the XPA ASE.
 	* doc/as.texinfo: Document the MIPS XPA command line options.
 	* doc/c-mips.texi: Document the MIPS XPA command line options,
 	and assembler directives.

gas/testsuite/
 	* gas/mips/mips.exp: Add xpa tests.
 	* gas/mips/xpa.s: New test.
 	* gas/mips/xpa.d: Likewise.

include/
 	* opcode/mips.h (ASE_XPA): New define.

opcodes/
 	* mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
 	to allow the MIPS XPA ASE.
 	(parse_mips_dis_option): Process the -Mxpa option.
 	* mips-opc.c (XPA): New define.
 	(mips_builtin_opcodes): Add MIPS XPA instructions and move the
 	locations of the ctc0 and cfc0 instructions.
2014-04-23 13:01:18 +01:00
Christian Svensson
73589c9dbd Remove support for the (deprecated) openrisc and or32 configurations and replace
with support for the new or1k configuration.
2014-04-22 15:57:47 +01:00
Andrew Bennett
bbaa46c0f3 Add support for the MIPS P5600 family of CPUs.
ChangeLog:

2014-04-10  Andrew Bennett  <andrew.bennett@imgtec.com>

	* config/tc-mips.c (mips_cpu_info_table): Add P5600
	configuation.
	* doc/c-mips.texi: Document p5600.
2014-04-10 10:20:50 +01:00
Denis Chertykov
af910977fb * config/tc-avr.c: Add specified_mcu variable for selected mcu.
(enum options): add OPTION_RMW_ISA for -mrmw option.
	(struct option md_longopts): Add mrmw option.
	(md_show_usage): add -mrmw option description.
	(md_parse_option): Update isa details if -mrmw option specified.
	* doc/c-avr.texi: Add doc for new option -mrmw.
	* gas/avr/avr.exp: Run new tests.
	* gas/avr/rmw.d: Add test for additional ISA support.
	* gas/avr/rmw.s: Ditto.
2014-03-29 09:53:16 +04:00
Denis Chertykov
ed0251d24b * gas/ChangeLog: Revert
* gas/config/tc-avr.c: Revert
	* gas/doc/c-avr.texi: Revert
	* gas/testsuite/ChangeLog: Revert
	* gas/testsuite/gas/avr/avr.exp: Revert
	* gas/testsuite/gas/avr/rmw.d: Revert
	* gas/testsuite/gas/avr/rmw.s: Revert

	This reverts commit d24e46e3e2.
2014-03-29 09:46:33 +04:00
Denis Chertykov
d24e46e3e2 * config/tc-avr.c: Add specified_mcu variable for selected mcu.
(enum options): add OPTION_RMW_ISA for -mrmw option.
	(struct option md_longopts): Add mrmw option.
	(md_show_usage): add -mrmw option description.
	(md_parse_option): Update isa details if -mrmw option specified.
	* doc/c-avr.texi: Add doc for new option -mrmw.
	* gas/avr/avr.exp: Run new tests.
	* gas/avr/rmw.d: Add test for additional ISA support.
	* gas/avr/rmw.s: Ditto.
2014-03-29 09:41:32 +04:00
David Weatherford
a82c7d9030 Add support to the Xtensa target for creating trampolines for out-of-range branches.
* tc-xtensa.c (xtensa_check_frag_count, xtensa_create_trampoline_frag)
    (xtensa_maybe_create_trampoline_frag, init_trampoline_frag)
    (find_trampoline_seg, search_trampolines, get_best_trampoline)
    (check_and_update_trampolines, add_jump_to_trampoline)
    (dump_trampolines): New function.
    (md_parse_option): Add cases for --[no-]trampolines options.
    (md_assemble, finish_vinsn, xtensa_end): Add call to
    xtensa_check_frag_count.
    (xg_assemble_vliw_tokens): Add call to
    xtensa_maybe_create_trampoline_frag.
    (xtensa_relax_frag): Relax fragments with RELAX_TRAMPOLINE state.
    (relax_frag_immed): Relax jump instructions that cannot reach its
    target.
    * tc-xtensa.h (xtensa_relax_statesE::RELAX_TRAMPOLINE): New relax
    state.

    * as.texinfo: Document --[no-]trampolines command-line options.
    * c-xtensa.texi: Document trampolines relaxation and command line
    options.

    * frags.c (get_frag_count, clear_frag_count): New function.
    (frag_alloc): Increment totalfrags counter.
    * frags.h (get_frag_count, clear_frag_count): New function.

    * all.exp: Add test for trampoline relaxation.
    * trampoline.d: Trampoline relaxation expected dump.
    * trampoline.s: Trampoline relaxation test source.
2014-03-21 11:53:42 +00:00
Jose E. Marchesi
ec92c392f7 This patch adds support for the hyperprivileged registers %hstick_offset
and %hstick_enable to the Sparc assembler.

	* config/tc-sparc.c (hpriv_reg_table): Added entries for
	%hstick_offset and %hstick_enable.
	* doc/c-sparc.texi (Sparc-Regs): Document the %hstick_offset and
	%hstick_enable hyperprivileged registers.

	* sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
	%hstick_enable added.

	* gas/sparc/rdhpr.s: Test rd %hstick_offset and %hstick_enable.
	* gas/sparc/rdhpr.d: Likewise.

	* gas/sparc/wrhpr.s: Test wr %hstick_offset and %hstick_enable.
	* gas/sparc/wrhpr.d: Likewise.
2014-03-19 16:43:41 +00:00
Daniel Gutson
2e6976a881 Add support for ARM assembler produced by CodeCompositor Studio.
* config/tc-arm.c (codecomposer_syntax): New flag that states whether the
	CCS syntax compatibility mode is on or off.
	(asmfunc_states): New enum to represent the asmfunc directive state.
	(asmfunc_state): New variable holding the asmfunc directive state.
	(comment_chars): Rename to arm_comment_chars.
	(line_separator_chars): Rename to arm_line_separator_chars.
	(s_ccs_ref): New function that handles the .ref directive.
	(asmfunc_debug): New function.
	(s_ccs_asmfunc): New function that handles the .asmfunc directive.
	(s_ccs_endasmfunc): New function that handles the .endasmfunc directive.
	(s_ccs_def): New function that handles the .def directive.
	(tc_start_label_without_colon): New function.
	(md_pseudo_table): Added new CCS directives.
	(arm_ccs_mode): New function that handles the -mccs command line option.
	(arm_long_opts): Added new -mccs command line option.
	* config/tc-arm.h (LABELS_WITHOUT_COLONS): New macro.
	(TC_START_LABEL_WITHOUT_COLON): New macro.
	(tc_start_label_without_colon): Added extern function declaration.
	(tc_comment_chars): Define.
	(tc_line_separator_chars): Define.
	* app.c (do_scrub_begin): Use tc_line_separator_chars, if defined.
	* read.c (read_begin): Likewise.
	* doc/as.texinfo: Add documentation for the -mccs command line
	option.
	* doc/c-arm.texi: Likewise.
	* doc/internals.texi: Document tc_line_separator_chars.
	* NEWS: Mention the new feature.

	* gas/arm/ccs.s: New test case.
	* gas/arm/ccs.d: New expected disassembly.
2014-03-19 14:31:25 +00:00
Yufeng Zhang
a52e6fd34a Enable verbose error messages by default for AArch64 gas.
gas/

	* config/tc-aarch64.c (aarch64_opts): Add new option
	"mno-verbose-error".
	(verbose_error_p): Initialize to 1.
	* doc/c-aarch64.texi (AArch64 Options): Document -mverbose-error
	and -mno-verbose-error.

gas/testsuite/

	* gas/aarch64/illegal.d: Pass -mno-verbose-error.
	* gas/aarch64/verbose-error.s: Add more verbose message testcases.
	* gas/aarch64/verbose-error.l: Ditto.
2014-03-18 17:41:43 +00:00
Richard Earnshaw
df359aa7ab AArch64: Clean up docs and document -mcpu and -march.
2014-03-13  Richard Earnshaw  <rearnsha@arm.com>
	    Jiong Wang  <Jiong.Wang@arm.com>

	* doc/c-aarch64.texi: Clean up some formatting issues.
	(AArch64 Options): Document -mcpu and -march.
	(AArch64 Extensions): New node.
2014-03-13 17:10:04 +00:00
Tristan Gingold
167ad85bf0 Add pe/x86_64 bigobj file format.
bfd/
	* peicode.h (pe_ILF_object_p): Adjust, as the version number
	has been read.
	(pe_bfd_object_p): Also read version number to detect ILF.
	* pe-x86_64.c (COFF_WITH_PE_BIGOBJ): Define.
	(x86_64pe_bigobj_vec): Define
	* coffcode.h (bfd_coff_backend_data): Add _bfd_coff_max_nscns field.
	(bfd_coff_max_nscns): New macro.
	(coff_compute_section_file_positions): Use unsigned int for
	target_index.  Compare with bfd_coff_max_nscns.
	(bfd_coff_std_swap_table, ticoff0_swap_table, ticoff1_swap_table):
	Set a value for _bfd_coff_max_nscns.
	(header_bigobj_classid): New constant.
	(coff_bigobj_swap_filehdr_in, coff_bigobj_swap_filehdr_out)
	(coff_bigobj_swap_sym_in, coff_bigobj_swap_sym_out)
	(coff_bigobj_swap_aux_in, coff_bigobj_swap_aux_out): New
	functions.
	(bigobj_swap_table): New table.
	* libcoff.h: Regenerate.
	* coff-sh.c (bfd_coff_small_swap_table): Likewise.
	* coff-alpha.c (alpha_ecoff_backend_data): Add value for
	_bfd_coff_max_nscns.
	* coff-mips.c (mips_ecoff_backend_data): Likewise.
	* coff-rs6000.c (bfd_xcoff_backend_data)
	(bfd_pmac_xcoff_backend_data): Likewise.
	* coff64-rs6000.c (bfd_xcoff_backend_data)
	(bfd_xcoff_aix5_backend_data): Likewise.
	* targets.c (x86_64pe_bigobj_vec): Declare.
	* configure.in (x86_64pe_bigobj_vec): New vector.
	* configure: Regenerate.
	* config.bfd: Add bigobj object format for Windows targets.

gas/
	* config/tc-i386.c (use_big_obj): Declare.
	(OPTION_MBIG_OBJ): Define.
	(md_longopts): Add -mbig-obj option.
	(md_parse_option): Handle it.
	(md_show_usage): Display help for this option.
	(i386_target_format): Use bigobj for x86-64 if -mbig-obj.
	* doc/c-i386.texi: Document the option.

gas/testsuite/
	* gas/pe/big-obj.d, gas/pe/big-obj.s: Add test.
	* gas/pe/pe.exp: Add test.

include/coff/
	* pe.h (struct external_ANON_OBJECT_HEADER_BIGOBJ): Declare.
	(FILHSZ_BIGOBJ): Define.
	(struct external_SYMBOL_EX): Declare.
	(SYMENT_BIGOBJ, SYMESZ_BIGOBJ): Define.
	(union external_AUX_SYMBOL_EX): Declare.
	(AUXENT_BIGOBJ, AUXESZ_BIGOBJ): Define.
	* internal.h (struct internal_filehdr): Change type
	of f_nscns.
2014-03-13 09:33:07 +01:00
Alan Modra
fa47fa9246 autoreconf
Regenerate Makefile.in in bfd, binutils, gas, gold, gprof, ld, opcodes.
Regenerate gas/config.in.
2014-03-12 15:02:00 +10:30
Denis Chertykov
255d9eec05 * gas/tc-avr.c: Add new devices
avr25: ata5272, attiny828
	avr35: ata5505, attiny1634
	avr4: atmega8a, ata6285, ata6286, atmega48pa
	avr5: at90pwm161, ata5790, ata5795, atmega164pa, atmega165pa,
	atmega168pa, atmega32a, atmega64rfr2, atmega644rfr2, atmega64a,
	atmega16hva2
	avr51: atmega128a, atmega1284
	avrxmega2: atxmega16a4u, atxmega16c4, atxmega32a4u, atxmega32c4,
	atxmega32e5, atxmega16e5, atxmega8e5
	avrxmega4: atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3,
	atxmega64c3, atxmega64d4
	avrxmega6: atxmega128a3u, atxmega128b3, atxmega128c3,
	atxmega128d4, atxmega192a3u, atxmega192c3, atxmega256a3u,
	atxmega256c3, atxmega384c3, atxmega384d3
	avrxmega7: atxmega128a4u
	* doc/c-avr.texi: Ditto.
2014-03-06 18:59:05 +04:00
Alan Modra
4b95cf5c0c Update copyright years 2014-03-05 22:16:15 +10:30
Nick Clifton
65d7bab591 This patch enhances the MSP430 port of GAS so that, if requested, it will
generate warning messages about an instruction that changes the interrupt
state not being followed by a NOP instruction.

	* config/msp430/msp430.c: Replace known mcu array with known
	msp430 ISA mcu name array.
	Accept any name for -mmcu option.
	Add -mz option to warn about missing NOP following an interrupt
	status change.
	(check_for_nop): New.
	(msp430_operands): Emit a warning, if requested, when an interrupt
	changing instruction is not followed by a NOP.
	* doc/c-msp430.c: Document -mz option.

	* gas/msp430/bad.d: Add -mz option.
	* gas/msp430/bad.s: Add more cases where warnings should be
	generated.
	* gas/msp430/bad.l: Add expected warning messages.
2014-03-03 17:27:55 +00:00
Ilya Tocar
dcf893b581 Add support for CPUID PREFETCHWT1
Latest AVX512 spec
http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf
Has CPUID PREFETCHWT1 for prefetchwt1 instruction, which we list as AVX512PF.
This patch introduces CPUID PREFETCHWT1.

gas/

        * config/tc-i386.c (cpu_arch): Add .prefetchwt1.
        * doc/c-i386.texi: Document .prefetchwt1/prefetchwt1.

opcodes/

        * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
        (cpu_flags): Add CpuPREFETCHWT1.
        * i386-init.h: Regenerate.
        * i386-opc.h (CpuPREFETCHWT1): New.
        (i386_cpu_flags): Add cpuprefetchwt1.
        * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
        * i386-tbl.h: Regenerate.

gas/testsuite

        * gas/i386/avx512pf-intel.d: Remove prefetchwt1.
        * gas/i386/avx512pf.s: Ditto.
        * gas/i386/avx512pf.d: Ditto.
        * gas/i386/x86-64-avx512pf-intel.d: Ditto.
        * gas/i386/x86-64-avx512pf.s: Ditto.
        * gas/i386/x86-64-avx512pf.d: Ditto.
        * gas/i386/prefetchwt1-intel.d: New file.
        * gas/i386/prefetchwt1.s: Ditto.
        * gas/i386/prefetchwt1.d: Ditto.
        * gas/i386/x86-64-prefetchwt1-intel.d: Ditto.
        * gas/i386/x86-64-prefetchwt1.s: Ditto.
        * gas/i386/x86-64-prefetchwt1.d: Ditto.
2014-02-21 08:04:00 -08:00
Ilya Tocar
963f35869d Add clflushopt, xsaves, xsavec, xrstors
gas/

2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>

	* config/tc-i386.c (cpu_arch): Add .clflushopt, .xsavec, .xsaves.
	* doc/c-i386.texi: Document .xsavec/xsavec/.xsaves/xsaves/
	clflushopt/.clfushopt.

gas/testsuite/

2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>

	* gas/i386/clflushopt-intel.d: New.
	* gas/i386/clflushopt.d: Ditto.
	* gas/i386/clflushopt.s: Ditto.
	* gas/i386/i386.exp: Run new tests.
	* gas/i386/x86-64-clflushopt-intel.d: New.
	* gas/i386/x86-64-clflushopt.d: Ditto.
	* gas/i386/x86-64-clflushopt.s: Ditto.
	* gas/i386/x86-64-xsavec-intel.d: Ditto.
	* gas/i386/x86-64-xsavec.d: Ditto.
	* gas/i386/x86-64-xsavec.s: Ditto.
	* gas/i386/x86-64-xsaves-intel.d: Ditto.
	* gas/i386/x86-64-xsaves.d: Ditto.
	* gas/i386/x86-64-xsaves.s: Ditto.
	* gas/i386/xsavec-intel.d: Ditto.
	* gas/i386/xsavec.d: Ditto.
	* gas/i386/xsavec.s: Ditto.
	* gas/i386/xsaves-intel.d: Ditto.
	* gas/i386/xsaves.d: Ditto.
	* gas/i386/xsaves.s: Ditto.

opcodes/

2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>

	* i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
	MOD_0FC7_REG_5.
	(PREFIX enum): Add PREFIX_0FAE_REG_7.
	(reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
	(prefix_table): Add clflusopt.
	(mod_table): Add xrstors, xsavec, xsaves.
	* i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
	CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
	(cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
	* i386-init.h: Regenerate.
	* i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
	xsaves64, xsavec, xsavec64.
	* i386-tbl.h: Regenerate.
2014-02-12 07:50:24 -08:00
Sandra Loosemore
1c2de46353 Nios II large-GOT relocations
2014-02-03  Sandra Loosemore  <sandra@codesourcery.com>

	include/elf/
	* nios2.h (R_NIOS2_GOT_LO, R_NIOS2_GOT_HA): New.
	(R_NIOS2_CALL_LO, R_NIOS2_CALL_HA): New.
	(R_NIOS2_ILLEGAL): Adjust.

	gas/
	* config/tc-nios2.c (md_apply_fix): Test for new relocs.
	(nios2_special_reloc): Add %call_lo, %call_hiadj, %got_lo,
	%got_hiadj relocation operators.  Sort table and add comment
	to explain ordering.
	(nios2_fix_adjustable): Test for new relocs.
	* doc/c-nios2.texi (Nios II Relocations): Document new relocation
	operators.

	bfd/
	* reloc.c (BFD_RELOC_NIOS2_GOT_LO, BFD_RELOC_NIOS2_GOT_HA): New.
	(BFD_RELOC_NIOS2_CALL_LO, BFD_RELOC_NIOS2_CALL_HA): New.
	* libbfd.h: Regenerated.
	* bfd-in2.h: Regenerated.
	* elf32-nios2.c (elf_nios2_howto_table_rel): Add new relocations.
	(nios2_reloc_map): Likewise.
	(GOT_USED, CALL_USED): Renamed from GOT16_USED and CALL16_USED.
	Fixed all references.
	(nios2_elf32_relocate_section): Add new relocations.
	(nios2_elf32_check_relocs): Likewise.
	(nios2_elf32_gc_sweep_hook): Likewise.
2014-02-03 08:42:42 -08:00
DJ Delorie
96b961024c Add .refsym to msp430 backend
* config/tc-msp430.c (msp430_refsym): New: ".refsym <symbol>"
* doc/c-msp430.texi (MSP430 Directives): Document it.

The purpose of this patch is to provide a way for one object file
to require the inclusion of another object, without having to
allocate space for a .word address reference.
2014-01-22 16:41:13 -05:00
Tristan Gingold
ea4cff4f1f Remove duplicated entry for .pad in c-arm.texi
* doc/c-arm.texi (ARM Directives): Remove duplicate .pad entry.
2013-12-20 12:38:14 +01:00
Nick Clifton
a75555d13b * config/tc-msp430.c (mcu_types): Add some more 430X mcu names.
(OPTION_INTR_NOPS): Define.
	(gen_interrupt_nops): Default to FALSE.
	(md_parse_opton): Add support for OPTION_INTR_NOPS.
	(md_longopts): Add -mn.
	(md_show_usage): Add -mn.
	(msp430_operands): Generate NOPs for all MCUs not just 430Xv2.
	* doc/c-msp430.c: Document -mn.
2013-12-13 12:32:21 +00:00
Kuan-Lin Chen
35c081572f Add support for Andes NDS32:
BFD:
	* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add nds32
	files.
	* Makefile.in: Regenerate.
	* archures.c (bfd_nds32_arch): Add nds32 target.
	* bfd-in2.h: Regenerate.
	* config.bfd (nds32*le-*-linux): Add bfd_elf32_nds32lelin_vec
	and bfd_elf32_nds32belin_vec.
	(nds32*be-*-linux*): Likewise.
	(nds32*le-*-*): Add bfd_elf32_nds32le_vec and bfd_elf32_nds32be_vec.
	(nds32*be-*-*): Likewise.
	* configure.in (bfd_elf32_nds32be_vec): Add elf32-nds32.lo.
	(bfd_elf32_nds32le_vec): Likewise.
	(bfd_elf32_nds32belin_vec): Likewise.
	(bfd_elf32_nds32lelin_vec): Likewise.
	* configure: Regenerate.
	* cpu-nds32.c: New file for nds32.
	* elf-bfd.h: Add NDS32_ELF_DATA.
	* elf32-nds32.c: New file for nds32.
	* elf32-nds32.h: New file for nds32.
	* libbfd.h: Regenerate.
	* reloc.c: Add relocations for nds32.
	* targets.c (bfd_elf32_nds32be_vec): New declaration for nds32.
	(bfd_elf32_nds32le_vec): Likewise.
	(bfd_elf32_nds32belin_vec): Likewise.
	(bfd_elf32_nds32lelin_vec): Likewise.

BINUTILS:
	* readelf.c: Include elf/nds32.h
	(guess_is_rela): Add case for EM_NDS32.
	(dump_relocations): Add case for EM_NDS32.
	(decode_NDS32_machine_flags): New.
	(get_machine_flags): Add case for EM_NDS32.
	(is_32bit_abs_reloc): Likewise.
	(is_16bit_abs_reloc): Likewise.
	(process_nds32_specific): New.
	(process_arch_specific): Add case for EM_NDS32.
	* NEWS: Announce Andes nds32 support.
	* MAINTAINERS: Add nds32 maintainers.
  TESTSUITE:
	* binutils-all/objdump.exp: Add NDS32 cpu.
	* binutils-all/readelf.r: Skip extra reloc created by NDS32.

GAS:
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c.
	(TARGET_CPU_HFILES): Add config/tc-nds32.h.
	* Makefile.in: Regenerate.
	* configure.in (nds32): Add nds32 target extension config support.
	* configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*.
	* configure: Regenerate.
	* config/tc-nds32.c: New file for nds32.
	* config/tc-nds32.h: New file for nds32.
	* doc/Makefile.am (CPU_DOCS): Add c-nds32.texi.
	* doc/Makefile.in: Regenerate.
	* doc/as.texinfo: Add nds32 options.
	* doc/all.texi: Set NDS32.
	* doc/c-nds32.texi: New file dor nds32 document.
	* NEWS: Announce Andes nds32 support.
  TESTSUITE:
	* gas/all/gas.exp: Add expected failures for NDS32.
	* gas/elf/elf.exp: Likewise.
	* gas/lns/lns.exp: Use alternate test.
	* gas/macros/irp.d: Skip for NDS32.
	* gas/macros/macros.exp: Skip some tests for the NDS32.
	* gas/macros/rept.d: Skip for NDS32.
	* gas/macros/test3.d: Skip for NDS32.
	* gas/nds32: New directory.
	* gas/nds32/alu-1.s: New test.
	* gas/nds32/alu-1.d: Likewise.
	* gas/nds32/alu-2.s: Likewise.
	* gas/nds32/alu-2.d: Likewise.
	* gas/nds32/br-1.d: Likewise.
	* gas/nds32/br-1.s: Likewise.
	* gas/nds32/br-2.d: Likewise.
	* gas/nds32/br-2.s: Likewise.
	* gas/nds32/ji-jr.d: Likewise.
	* gas/nds32/ji-jr.s: Likewise.
	* gas/nds32/ls.d: Likewise.
	* gas/nds32/ls.s: Likewise.
	* gas/nds32/lsi.d: Likewise.
	* gas/nds32/lsi.s: Likewise.
	* gas/nds32/to-16bit-v1.d: Likewise.
	* gas/nds32/to-16bit-v1.s: Likewise.
	* gas/nds32/to-16bit-v2.d: Likewise.
	* gas/nds32/to-16bit-v2.s: Likewise.
	* gas/nds32/to-16bit-v3.d: Likewise.
	* gas/nds32/to-16bit-v3.s: Likewise.
	* gas/nds32/nds32.exp: New test driver.

LD:
	* Makefile.am (ALL_EMULATION_SOURCES): Add nds32 target.
	* Makefile.in: Regenerate.
	* configure.tgt: Add case for nds32*le-*-elf*, nds32*be-*-elf*,
	nds32*le-*-linux-gnu*, and nds32*be-*-linux-gnu*.
	* emulparams/nds32belf.sh: New file for nds32.
	* emulparams/nds32belf_linux.sh: Likewise.
	* emulparams/nds32belf16m.sh: Likewise.
	* emulparams/nds32elf.sh: Likewise.
	* emulparams/nds32elf_linux.sh: Likewise.
	* emulparams/nds32elf16m.sh: Likewise.
	* emultempl/nds32elf.em: Likewise.
	* scripttempl/nds32elf.sc}: Likewise.
	* gen-doc.texi: Set NDS32.
	* ld.texinfo: Set NDS32.
	* NEWS: Announce Andes nds32 support.
  TESTSUITE:
	* lib/ld-lib.exp: Add NDS32 to list of targets that do not support
	shared library generation.
	* ld-nds32: New directory.
	* ld-nds32/branch.d: New test.
	* ld-nds32/branch.ld: New test.
	* ld-nds32/branch.s: New test.
	* ld-nds32/diff.d: New test.
	* ld-nds32/diff.ld: New test.
	* ld-nds32/diff.s: New test.
	* ld-nds32/gp.d: New test.
	* ld-nds32/gp.ld: New test.
	* ld-nds32/gp.s: New test.
	* ld-nds32/imm.d: New test.
	* ld-nds32/imm.ld: New test.
	* ld-nds32/imm.s: New test.
	* ld-nds32/imm_symbol.s: New test.
	* ld-nds32/relax_jmp.d: New test.
	* ld-nds32/relax_jmp.ld: New test.
	* ld-nds32/relax_jmp.s: New test.
	* ld-nds32/relax_load_store.d: New test.
	* ld-nds32/relax_load_store.ld: New test.
	* ld-nds32/relax_load_store.s: New test.
	* ld-nds32/nds32.exp: New file.

OPCODES:
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add nds32-asm.c
	and nds32-dis.c.
	* Makefile.in: Regenerate.
	* configure.in: Add case for bfd_nds32_arch.
	* configure: Regenerate.
	* disassemble.c (ARCH_nds32): Define.
	* nds32-asm.c: New file for nds32.
	* nds32-asm.h: New file for nds32.
	* nds32-dis.c: New file for nds32.
	* nds32-opc.h: New file for nds32.

INCLUDE:
	* dis-asm.h (print_insn_nds32): Add nds32 target.
	* elf/nds32.h: New file for nds32.
	* opcode/nds32.h: New file for nds32.
2013-12-13 11:52:32 +00:00
Catherine Moore
a8d14a8892 2013-11-19 Catherine Moore <clm@codesourcery.com>
gas/
	* config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
	(options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
	(md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
	(INSN_DMULT): Define.
	(INSN_DMULTU): Define.
	(insns_between): Detect PMC RM7000 errata.
	(md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
	OPTION_NO_FIX_PMC_RM7000.
	* doc/as.texinfo: Document new options.
	* doc/c-mips.texi: Likewise.

	gas/testsuite/
	* gas/mips/fix-pmc-rm7000-1.d: New.
	* gas/mips/fix-pmc-rm7000-1.s: New.
	* gas/mips/fix-pmc-rm7000-2.d: New.
	* gas/mips/fix-pmc-rm7000-2.s: New.
	* gas/mips/micromips@fix-pmc-rm7000-1.d: New.
	* gas/mips/micromips@fix-pmc-rm7000-2.d: New.
	* gas/mips/mips.exp: Run new tests.
2013-11-19 05:07:54 -08:00
Yufeng Zhang
c9fb6e5814 Add support for armv7ve to gas.
gas/

	* config/tc-arm.c (arm_archs): New armv7ve architecture option.
	(arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
	ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
	(cpu_arch_ver): Likewise.
	* doc/c-arm.texi: Document armv7ve.

gas/testsuite/

	* gas/arm/attr-march-armv7ve.d: New test case for armv7ve.

include/opcode/

	* arm.h (ARM_AEXT_V7VE): New define.
	(ARM_ARCH_V7VE): New define.
	(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): Removed.
2013-11-18 17:23:33 +00:00
Chao-ying Fu
56d438b172 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
Chao-ying Fu  <Chao-ying.Fu@imgtec.com>

	* config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
	(md_longopts): Add mmsa and mno-msa.
	(mips_ases): Add msa.
	(RTYPE_MASK): Update.
	(RTYPE_MSA): New define.
	(OT_REG_ELEMENT): Replace with...
	(OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
	(mips_operand_token): Replace reg_element with index.
	(mips_parse_argument_token): Treat vector indices as separate tokens.
	Handle register indices.
	(md_begin): Add MSA register names.
	(operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
	(convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
	(match_mdmx_imm_reg_operand): Update accordingly.
	(match_imm_index_operand): New function.
	(match_reg_index_operand): New function.
	(match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
	(md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
	(md_show_usage): Print -mmsa and -mno-msa.
	* doc/as.texinfo: Document -mmsa and -mno-msa.
	* doc/c-mips.texi: Document -mmsa and -mno-msa.
	Document .set msa and .set nomsa.
2013-10-14 18:50:54 +00:00
Saravanan Ekanathan
c7b0bd56ce Add AMD bdver4 support.
gas/
	* config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
	* doc/c-i386.texi: Add -march=bdver4 option.

gas/testsuite/
	* gas/i386/i386.exp: Run bdver4 test cases.
	* gas/i386/nops-1-bdver4.d: New.
	* gas/i386/arch-10-bdver4.d: New.
	* gas/i386/x86-64-nops-1-bdver4.d: New.
	* gas/i386/x86-64-arch-2-bdver4.d: New.

opcodes/
	* i386-gen.c (cpu_flag_init): Add CPU_BDVER4_FLAGS.
	* i386-init.h: Regenerated.
2013-09-30 17:02:07 +00:00
Nick Clifton
ab90591541 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
(move_data): New variable.
	(md_parse_option): Parse -md.
	(msp430_section): New function.  Catch references to the .bss or
	.data sections and generate a special symbol for use by the libcrt
	library.
	(md_pseudo_table): Intercept .section directives.
	(md_longopt): Add -md
	(md_show_usage): Likewise.
	(msp430_operands): Generate a warning message if a NOP is inserted
	into the instruction stream.
	* doc/c-msp430.texi (node MSP430 Options): Document -md option.
2013-09-18 07:50:34 +00:00
Nick Clifton
9aff4b7ac1 PR binutils/15834
Fix typos:
---
 bfd/bfdio.c                                  |  2 +-
 bfd/elf32-spu.c                              |  2 +-
 bfd/elfnn-aarch64.c                          |  2 +-
 binutils/od-xcoff.c                          |  2 +-
 config/tcl.m4                                |  2 +-
 gas/config/tc-ia64.c                         |  2 +-
 gas/config/tc-sparc.c                        |  2 +-
 gas/config/tc-z80.c                          | 12 ++++++------
 gas/doc/c-i386.texi                          |  6 +++---
 gas/doc/c-m32r.texi                          |  2 +-
 gas/testsuite/gas/d10v/instruction_packing.d |  2 +-
 gas/testsuite/gas/z80/atend.d                |  2 +-
 gold/object.h                                |  2 +-
 include/gdb/remote-sim.h                     |  2 +-
 include/opcode/ChangeLog                     |  2 +-
 include/opcode/i960.h                        |  2 +-
 ld/testsuite/ld-mips-elf/mips16-pic-1.inc    |  2 +-
 opcodes/aarch64-asm.c                        |  2 +-
 opcodes/aarch64-dis.c                        |  2 +-
 opcodes/msp430-dis.c                         |  2 +-
2013-08-23 07:54:19 +00:00
Nick Clifton
4046d87a36 * elf32-rl78.c (rl78_elf_merge_private_bfd_data): Complain if G10
flag bits do not match.
	(rl78_elf_print_private_bfd_data): Describe G10 flag.

	* readelf.c (get_machine_flags): Handle RL78 G10 flag.

	* config/tc-rl78.c (elf_flags): New variable.
	(enum options): Add OPTION_G10.
	(md_longopts): Add mg10.
	(md_parse_option): Parse -mg10.
	(rl78_elf_final_processing): New function.
	* config/tc-rl78.c (tc_final_processing): Define.
	* doc/c-rl78.texi: Document -mg10 option.

	* rl78.c (E_FLAG_RL78_G10): Define.

	* lib/ld-lib.exp (check_shared_lib_support): Note that the RL78
	does not support shared library generation.
2013-08-09 10:40:04 +00:00
Eric Botcazou
d6787ef95c gas/
* config/tc-sparc.c (sparc_arch_types): Add leon.
	(sparc_arch): Move sparc4 around and add leon.
	(sparc_target_format): Document -Aleon.
	* doc/c-sparc.texi: Likewise.
include/
	* opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_LEON.
opcodes/
	* sparc-dis.c (compute_arch_mask): Set SPARC_OPCODE_ARCH_LEON bit for
	bfd_mach_sparc.
	* sparc-opc.c (MASK_LEON): Define.
	(v6, v6notlet, v7, v8, v6notv9): Add MASK_LEON.
	(letandleon): New macro.
	(v9andleon): Likewise.
	(sparc_opc): Add leon.
	(umac): Enable for letandleon.
	(smac): Likewise.
	(casa): Enable for v9andleon.
	(cas): Likewise.
	(casl): Likewise.
2013-08-05 16:11:07 +00:00
H.J. Lu
43234a1e14 Add Intel AVX-512 support
binutils/

2013-07-26  Sergey Guriev  <sergey.s.guriev@intel.com>
	    Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* dwarf.c (dwarf_regnames_i386): Add k0-k7 registers and
	numeration in comments.
	(dwarf_regnames_x86_64): Add xmm16-31 and k0-k7 registers to
	dwarf table.

gas/

2013-07-26  Sergey Guriev  <sergey.s.guriev@intel.com>
	    Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config/tc-i386-intel.c (O_zmmword_ptr): New.
	(i386_types): Add zmmword.
	(i386_intel_simplify_register): Allow regzmm.
	(i386_intel_simplify): Handle zmmwords.
	(i386_intel_operand): Handle RC/SAE, vector operations and
	zmmwords.
	* config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
	(struct RC_Operation): New.
	(struct Mask_Operation): New.
	(struct Broadcast_Operation): New.
	(vex_prefix): Size of bytes increased to 4 to support EVEX
	encoding.
	(enum i386_error): Add new error codes: unsupported_broadcast,
	broadcast_not_on_src_operand, broadcast_needed,
	unsupported_masking, mask_not_on_destination, no_default_mask,
	unsupported_rc_sae, rc_sae_operand_not_last_imm,
	invalid_register_operand, try_vector_disp8.
	(struct _i386_insn): Add new fields vrex, need_vrex, mask,
	rounding, broadcast, memshift.
	(struct RC_name): New.
	(RC_NamesTable): New.
	(evexlig): New.
	(evexwig): New.
	(extra_symbol_chars): Add '{'.
	(cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
	(i386_operand_type): Add regzmm, regmask and vec_disp8.
	(match_mem_size): Handle zmmwords.
	(operand_type_match): Handle zmm-registers.
	(mode_from_disp_size): Handle vec_disp8.
	(fits_in_vec_disp8): New.
	(md_begin): Handle {} properly.
	(type_names): Add "rZMM", "Mask reg" and "Vector d8".
	(build_vex_prefix): Handle vrex.
	(build_evex_prefix): New.
	(process_immext): Adjust to properly handle EVEX.
	(md_assemble): Add EVEX encoding support.
	(swap_2_operands): Correctly handle operands with masking,
	broadcasting or RC/SAE.
	(check_VecOperands): Support EVEX features.
	(VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
	(match_template): Support regzmm and handle new error codes.
	(process_suffix): Handle zmmwords and zmm-registers.
	(check_byte_reg): Extend to zmm-registers.
	(process_operands): Extend to zmm-registers.
	(build_modrm_byte): Handle EVEX.
	(output_insn): Adjust to properly handle EVEX case.
	(disp_size): Handle vec_disp8.
	(output_disp): Support compressed disp8*N evex feature.
	(output_imm): Handle RC/SAE immediates properly.
	(check_VecOperations): New.
	(i386_immediate): Handle EVEX features.
	(i386_index_check): Handle zmmwords and zmm-registers.
	(RC_SAE_immediate): New.
	(i386_att_operand): Handle EVEX features.
	(parse_real_register): Add a check for ZMM/Mask registers.
	(OPTION_MEVEXLIG): New.
	(OPTION_MEVEXWIG): New.
	(md_longopts): Add mevexlig and mevexwig.
	(md_parse_option): Handle mevexlig and mevexwig options.
	(md_show_usage): Add description for mevexlig and mevexwig.
	* doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
	avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.

gas/testsuite/

2013-07-26  Sergey Guriev  <sergey.s.guriev@intel.com>
	    Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* gas/cfi/cfi-i386.s: Add tests for k0-k7.
	* gas/cfi/cfi-i386.d: Change to reflect above mentioned changes.
	* gas/cfi/cfi-x86_64.s: Add tests for xmm16-31, k0-7.
	* gas/cfi/cfi-x86_64.d: Change to reflect above mentioned changes.
	* gas/i386/ilp32/cfi/cfi-x86_64.d: Ditto.
	* gas/i386/intel-regs.s: Add tests for zmm0 and xmm16 registers.
	* gas/i386/intel-regs.d: Change correspondingly.
	* gas/i386/prefetch-intel.d: Reflect implementation of prefetchwt1.
	* gas/i386/prefetch.d: Ditto.
	* gas/i386/x86-64-prefetch-intel.d: Ditto.
	* gas/i386/x86-64-prefetch.d: Ditto.
	* gas/i386/avx512f-intel.d: New.
	* gas/i386/avx512f-nondef.d: New.
	* gas/i386/avx512f-nondef.s: New.
	* gas/i386/avx512f-opts-intel.d: New.
	* gas/i386/avx512f-opts.d: New.
	* gas/i386/avx512f-opts.s: New.
	* gas/i386/avx512f.d: New.
	* gas/i386/avx512f.s: New.
	* gas/i386/avx512cd-intel.d: New.
	* gas/i386/avx512cd.d: New.
	* gas/i386/avx512cd.s: New.
	* gas/i386/avx512er-intel.d: New.
	* gas/i386/avx512er.d: New.
	* gas/i386/avx512er.s: New.
	* gas/i386/avx512pf-intel.d: New.
	* gas/i386/avx512pf.d: New.
	* gas/i386/avx512pf.s: New.
	* gas/i386/evex-lig.s: New.
	* gas/i386/evex-lig256-intel.d: New.
	* gas/i386/evex-lig256.d: New.
	* gas/i386/evex-lig512-intel.d: New.
	* gas/i386/evex-lig512.d: New.
	* gas/i386/evex-wig.s: New.
	* gas/i386/evex-wig1-intel.d: New.
	* gas/i386/evex-wig1.d: New.
	* gas/i386/inval-avx512f.l: New.
	* gas/i386/inval-avx512f.s: New.
	* gas/i386/x86-64-avx512f-intel.d: New.
	* gas/i386/x86-64-avx512f-nondef.d: New.
	* gas/i386/x86-64-avx512f-nondef.s: New.
	* gas/i386/x86-64-avx512f-opts-intel.d: New.
	* gas/i386/x86-64-avx512f-opts.d: New.
	* gas/i386/x86-64-avx512f-opts.s: New.
	* gas/i386/x86-64-avx512f.d: New.
	* gas/i386/x86-64-avx512f.s: New.
	* gas/i386/x86-64-avx512cd-intel.d: New.
	* gas/i386/x86-64-avx512cd.d: New.
	* gas/i386/x86-64-avx512cd.s: New.
	* gas/i386/x86-64-avx512er-intel.d: New.
	* gas/i386/x86-64-avx512er.d: New.
	* gas/i386/x86-64-avx512er.s: New.
	* gas/i386/x86-64-avx512pf-intel.d: New.
	* gas/i386/x86-64-avx512pf.d: New.
	* gas/i386/x86-64-avx512pf.s: New.
	* gas/i386/x86-64-evex-lig.s: New.
	* gas/i386/x86-64-evex-lig256-intel.d: New.
	* gas/i386/x86-64-evex-lig256.d: New.
	* gas/i386/x86-64-evex-lig512-intel.d: New.
	* gas/i386/x86-64-evex-lig512.d: New.
	* gas/i386/x86-64-evex-wig.s: New.
	* gas/i386/x86-64-evex-wig1-intel.d: New.
	* gas/i386/x86-64-evex-wig1.d: New.
	* gas/i386/x86-64-inval-avx512f.l: New.
	* gas/i386/x86-64-inval-avx512f.s: New.
	* gas/i386/i386.exp: Run new AVX-512 tests.

opcodes/

2013-07-26  Sergey Guriev  <sergey.s.guriev@intel.com>
	    Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* i386-dis-evex.h: New.
	* i386-dis.c (OP_Rounding): New.
	(VPCMP_Fixup): New.
	(OP_Mask): New.
	(Rdq): New.
	(XMxmmq): New.
	(EXdScalarS): New.
	(EXymm): New.
	(EXEvexHalfBcstXmmq): New.
	(EXxmm_mdq): New.
	(EXEvexXGscat): New.
	(EXEvexXNoBcst): New.
	(VPCMP): New.
	(EXxEVexR): New.
	(EXxEVexS): New.
	(XMask): New.
	(MaskG): New.
	(MaskE): New.
	(MaskR): New.
	(MaskVex): New.
	(modes enum): Add evex_x_gscat_mode, evex_x_nobcst_mode,
	evex_half_bcst_xmmq_mode, xmm_mdq_mode, ymm_mode,
	evex_rounding_mode, evex_sae_mode, mask_mode.
	(USE_EVEX_TABLE): New.
	(EVEX_TABLE): New.
	(EVEX enum): New.
	(REG enum): Add REG_EVEX_0F72, REG_EVEX_0F73, REG_EVEX_0F38C6,
	REG_EVEX_0F38C7.
	(MOD enum): Add MOD_EVEX_0F10_PREFIX_1, MOD_EVEX_0F10_PREFIX_3,
	MOD_EVEX_0F11_PREFIX_1, MOD_EVEX_0F11_PREFIX_3,
	MOD_EVEX_0F12_PREFIX_0, MOD_EVEX_0F16_PREFIX_0, MOD_EVEX_0F38C6_REG_1,
	MOD_EVEX_0F38C6_REG_2, MOD_EVEX_0F38C6_REG_5, MOD_EVEX_0F38C6_REG_6,
	MOD_EVEX_0F38C7_REG_1, MOD_EVEX_0F38C7_REG_2,  MOD_EVEX_0F38C7_REG_5,
	MOD_EVEX_0F38C7_REG_6.
	(PREFIX enum): Add PREFIX_VEX_0F41, PREFIX_VEX_0F42, PREFIX_VEX_0F44,
	PREFIX_VEX_0F45, PREFIX_VEX_0F46, PREFIX_VEX_0F47, PREFIX_VEX_0F4B,
	PREFIX_VEX_0F90, PREFIX_VEX_0F91, PREFIX_VEX_0F92, PREFIX_VEX_0F93,
	PREFIX_VEX_0F98, PREFIX_VEX_0F3A30, PREFIX_VEX_0F3A32,
	PREFIX_VEX_0F3AF0, PREFIX_EVEX_0F10, PREFIX_EVEX_0F11,
	PREFIX_EVEX_0F12, PREFIX_EVEX_0F13, PREFIX_EVEX_0F14,
	PREFIX_EVEX_0F15, PREFIX_EVEX_0F16, PREFIX_EVEX_0F17,
	PREFIX_EVEX_0F28, PREFIX_EVEX_0F29, PREFIX_EVEX_0F2A,
	PREFIX_EVEX_0F2B, PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
	PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F, PREFIX_EVEX_0F51,
	PREFIX_EVEX_0F58, PREFIX_EVEX_0F59, PREFIX_EVEX_0F5A,
	PREFIX_EVEX_0F5B, PREFIX_EVEX_0F5C, PREFIX_EVEX_0F5D,
	PREFIX_EVEX_0F5E, PREFIX_EVEX_0F5F, PREFIX_EVEX_0F62,
	PREFIX_EVEX_0F66, PREFIX_EVEX_0F6A, PREFIX_EVEX_0F6C,
	PREFIX_EVEX_0F6D, PREFIX_EVEX_0F6E, PREFIX_EVEX_0F6F,
	PREFIX_EVEX_0F70, PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
	PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
	PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
	PREFIX_EVEX_0F73_REG_6, PREFIX_EVEX_0F76, PREFIX_EVEX_0F78,
	PREFIX_EVEX_0F79, PREFIX_EVEX_0F7A, PREFIX_EVEX_0F7B,
	PREFIX_EVEX_0F7E, PREFIX_EVEX_0F7F, PREFIX_EVEX_0FC2,
	PREFIX_EVEX_0FC6, PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3,
	PREFIX_EVEX_0FD4, PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB,
	PREFIX_EVEX_0FDF, PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE6 PREFIX_EVEX_0FE7,
	PREFIX_EVEX_0FEB, PREFIX_EVEX_0FEF, PREFIX_EVEX_0FF2,
	PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4, PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB,
	PREFIX_EVEX_0FFE, PREFIX_EVEX_0F380C, PREFIX_EVEX_0F380D,
	PREFIX_EVEX_0F3811, PREFIX_EVEX_0F3812, PREFIX_EVEX_0F3813,
	PREFIX_EVEX_0F3814, PREFIX_EVEX_0F3815, PREFIX_EVEX_0F3816,
	PREFIX_EVEX_0F3818, PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A,
	PREFIX_EVEX_0F381B, PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F,
	PREFIX_EVEX_0F3821, PREFIX_EVEX_0F3822, PREFIX_EVEX_0F3823,
	PREFIX_EVEX_0F3824, PREFIX_EVEX_0F3825, PREFIX_EVEX_0F3827,
	PREFIX_EVEX_0F3828, PREFIX_EVEX_0F3829, PREFIX_EVEX_0F382A,
	PREFIX_EVEX_0F382C, PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3831,
	PREFIX_EVEX_0F3832, PREFIX_EVEX_0F3833, PREFIX_EVEX_0F3834,
	PREFIX_EVEX_0F3835, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
	PREFIX_EVEX_0F3839, PREFIX_EVEX_0F383A, PREFIX_EVEX_0F383B,
	PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F, PREFIX_EVEX_0F3840,
	PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843, PREFIX_EVEX_0F3844,
	PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846, PREFIX_EVEX_0F3847,
	PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D, PREFIX_EVEX_0F384E,
	PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3859,
	PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B, PREFIX_EVEX_0F3864,
	PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877,
	PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F,
	PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
	PREFIX_EVEX_0F388B, PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891,
	PREFIX_EVEX_0F3892, PREFIX_EVEX_0F3893, PREFIX_EVEX_0F3896,
	PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898, PREFIX_EVEX_0F3899,
	PREFIX_EVEX_0F389A, PREFIX_EVEX_0F389B, PREFIX_EVEX_0F389C,
	PREFIX_EVEX_0F389D, PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F,
	PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1, PREFIX_EVEX_0F38A2,
	PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38A6, PREFIX_EVEX_0F38A7,
	PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9, PREFIX_EVEX_0F38AA,
	PREFIX_EVEX_0F38AB, PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD,
	PREFIX_EVEX_0F38AE, PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6,
	PREFIX_EVEX_0F38B7, PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9,
	PREFIX_EVEX_0F38BA, PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC,
	PREFIX_EVEX_0F38BD, PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF,
	PREFIX_EVEX_0F38C4, PREFIX_EVEX_0F38C6_REG_1,
	PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5,
	PREFIX_EVEX_0F38C6_REG_6, PREFIX_EVEX_0F38C7_REG_1,
	PREFIX_EVEX_0F38C7_REG_2, PREFIX_EVEX_0F38C7_REG_5,
	PREFIX_EVEX_0F38C7_REG_6, PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA,
	PREFIX_EVEX_0F38CB, PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD,
	PREFIX_EVEX_0F3A00,  PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03,
	PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A05, PREFIX_EVEX_0F3A08,
	PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A, PREFIX_EVEX_0F3A0B,
	PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18, PREFIX_EVEX_0F3A19,
	PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B, PREFIX_EVEX_0F3A1D,
	PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A21,
	PREFIX_EVEX_0F3A23, PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26,
	PREFIX_EVEX_0F3A27, PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39,
	PREFIX_EVEX_0F3A3A, PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E,
	PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A54,
	PREFIX_EVEX_0F3A55.
	(VEX_LEN enum): Add VEX_LEN_0F41_P_0, VEX_LEN_0F42_P_0, VEX_LEN_0F44_P_0,
	VEX_LEN_0F45_P_0, VEX_LEN_0F46_P_0, VEX_LEN_0F47_P_0,
	VEX_LEN_0F4B_P_2, VEX_LEN_0F90_P_0, VEX_LEN_0F91_P_0,
	VEX_LEN_0F92_P_0, VEX_LEN_0F93_P_0, VEX_LEN_0F98_P_0,
	VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A32_P_2, VEX_W_0F41_P_0_LEN_1,
	VEX_W_0F42_P_0_LEN_1, VEX_W_0F44_P_0_LEN_0, VEX_W_0F45_P_0_LEN_1,
	VEX_W_0F46_P_0_LEN_1, VEX_W_0F47_P_0_LEN_1, VEX_W_0F4B_P_2_LEN_1,
	VEX_W_0F90_P_0_LEN_0, VEX_W_0F91_P_0_LEN_0, VEX_W_0F92_P_0_LEN_0,
	VEX_W_0F93_P_0_LEN_0, VEX_W_0F98_P_0_LEN_0, VEX_W_0F3A30_P_2_LEN_0,
	VEX_W_0F3A32_P_2_LEN_0.
	(VEX_W enum): Add EVEX_W_0F10_P_0, EVEX_W_0F10_P_1_M_0,
	EVEX_W_0F10_P_1_M_1, EVEX_W_0F10_P_2, EVEX_W_0F10_P_3_M_0,
	EVEX_W_0F10_P_3_M_1, EVEX_W_0F11_P_0, EVEX_W_0F11_P_1_M_0,
	EVEX_W_0F11_P_1_M_1, EVEX_W_0F11_P_2, EVEX_W_0F11_P_3_M_0,
	EVEX_W_0F11_P_3_M_1, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_0_M_1,
	EVEX_W_0F12_P_1, EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
	EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2, EVEX_W_0F15_P_0,
	EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_0_M_1,
	EVEX_W_0F16_P_1, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
	EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0, EVEX_W_0F29_P_2,
	EVEX_W_0F2A_P_1, EVEX_W_0F2A_P_3, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
	EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2,
	EVEX_W_0F51_P_0, EVEX_W_0F51_P_1, EVEX_W_0F51_P_2, EVEX_W_0F51_P_3,
	EVEX_W_0F58_P_0, EVEX_W_0F58_P_1, EVEX_W_0F58_P_2, EVEX_W_0F58_P_3,
	EVEX_W_0F59_P_0, EVEX_W_0F59_P_1, EVEX_W_0F59_P_2, EVEX_W_0F59_P_3,
	EVEX_W_0F5A_P_0, EVEX_W_0F5A_P_1, EVEX_W_0F5A_P_2, EVEX_W_0F5A_P_3,
	EVEX_W_0F5B_P_0, EVEX_W_0F5B_P_1, EVEX_W_0F5B_P_2, EVEX_W_0F5C_P_0,
	EVEX_W_0F5C_P_1, EVEX_W_0F5C_P_2, EVEX_W_0F5C_P_3, EVEX_W_0F5D_P_0,
	EVEX_W_0F5D_P_1, EVEX_W_0F5D_P_2, EVEX_W_0F5D_P_3, EVEX_W_0F5E_P_0,
	EVEX_W_0F5E_P_1, EVEX_W_0F5E_P_2, EVEX_W_0F5E_P_3, EVEX_W_0F5F_P_0,
	EVEX_W_0F5F_P_1, EVEX_W_0F5F_P_2, EVEX_W_0F5F_P_3, EVEX_W_0F62_P_2,
	EVEX_W_0F66_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2,
	EVEX_W_0F6E_P_2, EVEX_W_0F6F_P_1, EVEX_W_0F6F_P_2, EVEX_W_0F70_P_2,
	EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2, EVEX_W_0F73_R_2_P_2,
	EVEX_W_0F73_R_6_P_2, EVEX_W_0F76_P_2, EVEX_W_0F78_P_0,
	EVEX_W_0F79_P_0, EVEX_W_0F7A_P_1, EVEX_W_0F7A_P_3, EVEX_W_0F7B_P_1,
	EVEX_W_0F7B_P_3, EVEX_W_0F7E_P_1, EVEX_W_0F7E_P_2, EVEX_W_0F7F_P_1,
	EVEX_W_0F7F_P_2, EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_1, EVEX_W_0FC2_P_2,
	EVEX_W_0FC2_P_3, EVEX_W_0FC6_P_0, EVEX_W_0FC6_P_2, EVEX_W_0FD2_P_2,
	EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE6_P_1,
	EVEX_W_0FE6_P_2, EVEX_W_0FE6_P_3, EVEX_W_0FE7_P_2, EVEX_W_0FF2_P_2,
	EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2, EVEX_W_0FFB_P_2,
	EVEX_W_0FFE_P_2, EVEX_W_0F380C_P_2, EVEX_W_0F380D_P_2,
	EVEX_W_0F3811_P_1, EVEX_W_0F3812_P_1, EVEX_W_0F3813_P_1,
	EVEX_W_0F3813_P_2, EVEX_W_0F3814_P_1, EVEX_W_0F3815_P_1,
	EVEX_W_0F3818_P_2, EVEX_W_0F3819_P_2, EVEX_W_0F381A_P_2,
	EVEX_W_0F381B_P_2, EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
	EVEX_W_0F3821_P_1, EVEX_W_0F3822_P_1, EVEX_W_0F3823_P_1,
	EVEX_W_0F3824_P_1, EVEX_W_0F3825_P_1, EVEX_W_0F3825_P_2,
	EVEX_W_0F3828_P_2, EVEX_W_0F3829_P_2, EVEX_W_0F382A_P_1,
	EVEX_W_0F382A_P_2, EVEX_W_0F3831_P_1, EVEX_W_0F3832_P_1,
	EVEX_W_0F3833_P_1, EVEX_W_0F3834_P_1, EVEX_W_0F3835_P_1,
	EVEX_W_0F3835_P_2, EVEX_W_0F3837_P_2, EVEX_W_0F383A_P_1,
	EVEX_W_0F3840_P_2, EVEX_W_0F3858_P_2, EVEX_W_0F3859_P_2,
	EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2, EVEX_W_0F3891_P_2,
	EVEX_W_0F3893_P_2, EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
	EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2,
	EVEX_W_0F38C7_R_6_P_2, EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
	EVEX_W_0F3A04_P_2, EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
	EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2, EVEX_W_0F3A0B_P_2,
	EVEX_W_0F3A18_P_2, EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
	EVEX_W_0F3A1B_P_2, EVEX_W_0F3A1D_P_2, EVEX_W_0F3A21_P_2,
	EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2, EVEX_W_0F3A39_P_2,
	EVEX_W_0F3A3A_P_2, EVEX_W_0F3A3B_P_2, EVEX_W_0F3A43_P_2.
	(struct vex): Add fields evex, r, v, mask_register_specifier,
	zeroing, ll, b.
	(intel_names_xmm): Add upper 16 registers.
	(att_names_xmm): Ditto.
	(intel_names_ymm): Ditto.
	(att_names_ymm): Ditto.
	(names_zmm): New.
	(intel_names_zmm): Ditto.
	(att_names_zmm): Ditto.
	(names_mask): Ditto.
	(intel_names_mask): Ditto.
	(att_names_mask): Ditto.
	(names_rounding): Ditto.
	(names_broadcast): Ditto.
	(x86_64_table): Add escape to evex-table.
	(reg_table): Include reg_table evex-entries from
	i386-dis-evex.h.  Fix prefetchwt1 instruction.
	(prefix_table): Add entries for new instructions.
	(vex_table): Ditto.
	(vex_len_table): Ditto.
	(vex_w_table): Ditto.
	(mod_table): Ditto.
	(get_valid_dis386): Properly handle new instructions.
	(print_insn): Handle zmm and mask registers, print mask operand.
	(intel_operand_size): Support EVEX, new modes and sizes.
	(OP_E_register): Handle new modes.
	(OP_E_memory): Ditto.
	(OP_G): Ditto.
	(OP_XMM): Ditto.
	(OP_EX): Ditto.
	(OP_VEX): Ditto.
	* i386-gen.c (cpu_flag_init): Update CPU_ANY_SSE_FLAGS and
	CPU_ANY_AVX_FLAGS.  Add CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS,
	CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
	(cpu_flags): Add CpuAVX512F, CpuAVX512CD, CpuAVX512ER,
	CpuAVX512PF and CpuVREX.
	(operand_type_init): Add OPERAND_TYPE_REGZMM,
	OPERAND_TYPE_REGMASK and OPERAND_TYPE_VEC_DISP8.
	(opcode_modifiers): Add EVex, Masking, VecESize, Broadcast,
	StaticRounding, SAE, Disp8MemShift, NoDefMask.
	(operand_types): Add RegZMM, RegMask, Vec_Disp8, Zmmword.
	* i386-init.h: Regenerate.
	* i386-opc.h (CpuAVX512F): New.
	(CpuAVX512CD): New.
	(CpuAVX512ER): New.
	(CpuAVX512PF): New.
	(CpuVREX): New.
	(i386_cpu_flags): Add cpuavx512f, cpuavx512cd, cpuavx512er,
	cpuavx512pf and cpuvrex fields.
	(VecSIB): Add VecSIB512.
	(EVex): New.
	(Masking): New.
	(VecESize): New.
	(Broadcast): New.
	(StaticRounding): New.
	(SAE): New.
	(Disp8MemShift): New.
	(NoDefMask): New.
	(i386_opcode_modifier): Add evex, masking, vecesize, broadcast,
	staticrounding, sae, disp8memshift and nodefmask.
	(RegZMM): New.
	(Zmmword): Ditto.
	(Vec_Disp8): Ditto.
	(i386_operand_type): Add regzmm, regmask, zmmword and vec_disp8
	fields.
	(RegVRex): New.
	* i386-opc.tbl: Add AVX512 instructions.
	* i386-reg.tbl: Add 16 upper XMM and YMM registers, 32 new ZMM
	registers, mask registers.
	* i386-tbl.h: Regenerate.
2013-07-26 17:20:25 +00:00
H.J. Lu
a004640857 Support Intel SHA
gas/

2013-07-25  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config/tc-i386.c (cpu_arch): Add .sha.
	* doc/c-i386.texi: Document sha/.sha.

gas/testsuite/

2013-07-25  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* gas/i386/sha.d: New.
	* gas/i386/sha.s: New.
	* gas/i386/x86-64-sha.d: New.
	* gas/i386/x86-64-sha.s: New.
	* gas/i386/i386.exp: Run new SHA tests.

opcodes/

2013-07-25  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* i386-dis.c (PREFIX enum): Add PREFIX_0F38C8, PREFIX_0F38C9,
	PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC, PREFIX_0F38CD,
	PREFIX_0F3ACC.
	(prefix_table): Updated.
	(three_byte_table): Likewise.
	* i386-gen.c (cpu_flag_init): Add CPU_SHA_FLAGS.
	(cpu_flags): Add CpuSHA.
	(i386_cpu_flags): Add cpusha.
	* i386-init.h: Regenerate.
	* i386-opc.h (CpuSHA): New.
	(CpuUnused): Restored.
	(i386_cpu_flags): Add cpusha.
	* i386-opc.tbl: Add SHA instructions.
	* i386-tbl.h: Regenerate.
2013-07-25 16:16:35 +00:00
H.J. Lu
7e8b059be6 Support Intel MPX
gas/

2013-07-24  Anna Tikhonova  <anna.tikhonova@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config/tc-i386.c (BND_PREFIX): New.
	(struct _i386_insn): Add new field bnd_prefix.
	(add_bnd_prefix): New.
	(cpu_arch): Add MPX.
	(i386_operand_type): Add regbnd.
	(md_assemble): Handle BND prefixes.
	(parse_insn): Likewise.
	(output_branch): Likewise.
	(output_jump): Likewise.
	(build_modrm_byte): Handle regbnd.
	(OPTION_MADD_BND_PREFIX): New.
	(md_longopts): Add entry for 'madd-bnd-prefix'.
	(md_parse_option): Handle madd-bnd-prefix option.
	(md_show_usage): Add description for madd-bnd-prefix
	option.
	* doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.

gas/testsuite/

2013-07-24  Anna Tikhonova  <anna.tikhonova@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* gas/i386/mpx-add-bnd-prefix.s: New.
	* gas/i386/mpx-add-bnd-prefix.d: New.
	* gas/i386/mpx-inval-1.l: New.
	* gas/i386/mpx-inval-1.s: New.
	* gas/i386/mpx.d: New.
	* gas/i386/mpx.s: New.
	* gas/i386/x86-64-mpx-add-bnd-prefix.d: New.
	* gas/i386/x86-64-mpx-add-bnd-prefix.s: New.
	* gas/i386/x86-64-mpx-addr32.d: New.
	* gas/i386/x86-64-mpx-addr32.s: New.
	* gas/i386/x86-64-mpx-inval-1.l: New.
	* gas/i386/x86-64-mpx-inval-1.s: New.
	* gas/i386/x86-64-mpx-inval-2.l: New.
	* gas/i386/x86-64-mpx-inval-2.s: New.
	* gas/i386/x86-64-mpx.d: New.
	* gas/i386/x86-64-mpx.s: New.
	* gas/i386/nops.d: Adjust to MPX changes.
	* gas/i386/nops.s: Likewise.
	* gas/i386/x86-64-nops.d: Likewise.
	* gas/i386/x86-64-nops.s: Likewise.
	* gas/i386/ilp32/x86-64-nops.d: Likewise.
	* gas/i386/i386.exp: Run new MPX tests.

include/opcode/

2013-07-24  Anna Tikhonova  <anna.tikhonova@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* i386.h (BND_PREFIX_OPCODE): New.

opcodes/

2013-07-24  Anna Tikhonova  <anna.tikhonova@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* i386-dis.c (BND_Fixup): New.
	(Ebnd): New.
	(Ev_bnd): New.
	(Gbnd): New.
	(BND): New.
	(v_bnd_mode): New.
	(bnd_mode): New.
	(MOD enum): Add new entries.
	(PREFIX enum): Likewise.
	(dis tables): Replace XX with BND for near branch and call
	instructions.
	(prefix_table): Add new entries.
	(mod_table): Likewise.
	(names_bnd): New.
	(intel_names_bnd): New.
	(att_names_bnd): New.
	(BND_PREFIX): New.
	(prefix_name): Handle BND_PREFIX.
	(print_insn): Initialize names_bnd.
	(intel_operand_size): Handle new modes.
	(OP_E_register): Likewise.
	(OP_E_memory): Likewise.
	(OP_G): Likewise.
	* i386-gen.c (cpu_flag_init): Add CpuMPX.
	(cpu_flags): Add CpuMPX.
	(operand_type_init): Add RegBND.
	(opcode_modifiers): Add BNDPrefixOk.
	(operand_types): Add RegBND.
	* i386-init.h: Regenerate.
	* i386-opc.h (CpuMPX): New.
	(CpuUnused): Comment out.
	(i386_cpu_flags): Add cpumpx.
	(BNDPrefixOk): New.
	(i386_opcode_modifier): Add bndprefixok.
	(RegBND): New.
	(i386_operand_type): Add regbnd.
	* i386-opc.tbl: Add BNDPrefixOk to near jumps, calls and rets.
	Add MPX instructions and bnd prefix.
	* i386-reg.tbl: Add bnd0-bnd3 registers.
	* i386-tbl.h: Regenerate.
2013-07-24 15:47:25 +00:00
Yufeng Zhang
69091a2cc4 [AArch64, ILP32] Retire -milp32 and -mlp64; use -mabi=ilp32 and -mabi=lp64.
gas/

	* config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
	(AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
	(aarch64_abi): New variable.
	(ilp32_p): Change to be a macro.
	(aarch64_opts): Remove the support for option -milp32 and -mlp64.
	(struct aarch64_option_abi_value_table): New struct.
	(aarch64_abis): New table.
	(aarch64_parse_abi): New function.
	(aarch64_long_opts): Add entry for -mabi=.
	* doc/as.texinfo (Target AArch64 options): Document -mabi.
	* doc/c-aarch64.texi: Likewise.

gas/testsuite/

	* gas/aarch64/ilp32-basic.d (#as): Update to use -mabi=ilp32
2013-07-19 16:25:54 +00:00
Nick Clifton
f0c0028234 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
RX610.
        * config/rx-parse.y: (rx_check_float_support): Add function to
	check floating point operation support for target RX100 and
	RX200.
        * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
        * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
        RX200, RX600, and RX610
2013-07-18 12:15:15 +00:00
Nick Clifton
8be59acb82 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
* doc/c-avr.texi: Likewise.
2013-07-18 11:47:30 +00:00
Maciej W. Rozycki
ba92f88752 include/elf/
* mips.h (EF_MIPS_NAN2008): New macro.

	bfd/
	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Handle
	EF_MIPS_NAN2008.
	(_bfd_mips_elf_print_private_bfd_data): Likewise.

	binutils/
	* readelf.c (get_machine_flags): Handle EF_MIPS_NAN2008.

	gas/
	* config/tc-mips.c (mips_flag_nan2008): New variable.
	(options): Add OPTION_NAN enum value.
	(md_longopts): Handle it.
	(md_parse_option): Likewise.
	(s_nan): New function.
	(mips_elf_final_processing): Handle EF_MIPS_NAN2008.
	(md_show_usage): Add -mnan.

	* doc/as.texinfo (Overview): Add -mnan.
	* doc/c-mips.texi (MIPS Opts): Document -mnan.
	(MIPS NaN Encodings): New node.  Document .nan directive.
	(MIPS-Dependent): List the new node.

	gas/testsuite/
	* gas/mips/nan-2008-1.d: New test.
	* gas/mips/nan-2008-2.d: New test.
	* gas/mips/nan-2008-3.d: New test.
	* gas/mips/nan-2008-4.d: New test.
	* gas/mips/nan-legacy-1.d: New test.
	* gas/mips/nan-legacy-2.d: New test.
	* gas/mips/nan-legacy-3.d: New test.
	* gas/mips/nan-legacy-4.d: New test.
	* gas/mips/nan-legacy-5.d: New test.
	* gas/mips/nan-error-1.l: New list test.
	* gas/mips/nan-error-2.l: New list test.
	* gas/mips/nan-2008-override.s: New test source.
	* gas/mips/nan-2008.s: New test source.
	* gas/mips/nan-legacy-override.s: New test source.
	* gas/mips/nan-legacy.s: New test source.
	* gas/mips/nan-error-1.s: New test source.
	* gas/mips/nan-error-2.s: New test source.
	* gas/mips/mips.exp: Run the new tests.

	ld/testsuite/
	* ld-mips-elf/nan-2008.d: New test.
	* ld-mips-elf/nan-legacy.d: New test.
	* ld-mips-elf/nan-mixed-1.d: New test.
	* ld-mips-elf/nan-mixed-2.d: New test.
	* ld-mips-elf/nan-2008.s: New test source.
	* ld-mips-elf/nan-legacy.s: New test source.
2013-07-12 15:58:15 +00:00
Maciej W. Rozycki
81566a9b78 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
* doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
	Replace @sc{mips16} with literal `MIPS16'.
	(MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
2013-06-26 12:15:43 +00:00
Richard Sandiford
e335d9cbd8 gas/
* doc/c-mips.texi: Use ISA instead of @sc{isa}.
2013-06-26 08:04:00 +00:00
Maciej W. Rozycki
833794fc12 bfd/
* elfxx-mips.h (_bfd_mips_elf_insn32): New prototype.
	* elfxx-mips.c (mips_elf_link_hash_table): Add insn32 member.
	(STUB_MOVE32_MICROMIPS, STUB_JALR32_MICROMIPS): New macros.
	(MICROMIPS_INSN32_FUNCTION_STUB_NORMAL_SIZE): Likewise.
	(MICROMIPS_INSN32_FUNCTION_STUB_BIG_SIZE): Likewise.
	(micromips_insn32_o32_exec_plt0_entry): New variable.
	(micromips_insn32_o32_exec_plt_entry): Likewise.
	(_bfd_mips_elf_adjust_dynamic_symbol): Handle insn32 mode.
	(mips_elf_estimate_stub_size): Likewise.
	(_bfd_mips_elf_size_dynamic_sections): Likewise.
	(_bfd_mips_elf_finish_dynamic_symbol): Likewise.
	(mips_finish_exec_plt): Likewise.
	(_bfd_mips_elf_relax_section): Likewise.
	(_bfd_mips_elf_insn32): New function.
	(_bfd_mips_elf_get_synthetic_symtab): Handle insn32 PLT.

	gas/
	* config/tc-mips.c (mips_set_options): Add insn32 member.
	(mips_opts): Initialize it.
	(NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
	(options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
	(md_longopts): Add "minsn32" and "mno-insn32" options.
	(is_size_valid): Handle insn32 mode.
	(md_assemble): Pass instruction string down to macro.
	(brk_fmt): Add second dimension and insn32 mode initializers.
	(mfhl_fmt): Likewise.
	(BRK_FMT, MFHL_FMT): Handle insn32 mode.
	(macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
	(macro_build_jalr, move_register): Handle insn32 mode.
	(macro_build_branch_rs): Likewise.
	(macro): Handle insn32 mode.
	<M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
	(mips_ip): Handle insn32 mode.
	(md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
	(s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
	(mips_handle_align): Handle insn32 mode.
	(md_show_usage): Add -minsn32 and -mno-insn32.

	* doc/as.texinfo (Target MIPS options): Add -minsn32 and
	-mno-insn32 options.
	(-minsn32, -mno-insn32): New options.
	* doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
	options.
	(MIPS assembly options): New node.  Document .set insn32 and
	.set noinsn32.
	(MIPS-Dependent): List the new node.

	gas/testsuite/
	* gas/mips/micromips-insn32.d: New test.
	* gas/mips/micromips-noinsn32.d: Likewise.
	* gas/mips/micromips.l: Rename to...
	* gas/mips/micromips-warn.l: ... this.
	* gas/mips/micromips.d: Update accordingly.
	* gas/mips/micromips-trap.d: Likewise.
	* gas/mips/micromips.l: New list test.
	* gas/mips/micromips.s: Add conditionals.
	* gas/mips/mips.exp: Run the new tests.

	include/opcode/
	* mips.h: Add M_JRADDIUSP, M_JRC and M_MOVEP anonymous enum
	values.

	ld/
	* emultempl/mipself.em (insn32): New variable.
	(mips_create_output_section_statements): Handle insn32 mode.
	(PARSE_AND_LIST_PROLOGUE): New macro.
	(PARSE_AND_LIST_LONGOPTS): Likewise.
	(PARSE_AND_LIST_OPTIONS): Likewise.

	* gen-doc.texi: Set MIPS.
	* ld.texinfo: Likewise.
	(Options specific to MIPS targets): New section.
	(ld and MIPS family): New node.
	(Top, Machine Dependent): List the new node.

	opcodes/
	* micromips-opc.c (micromips_opcodes): Add "jraddiusp", "jrc"
	and "movep" macros.
2013-06-25 18:02:34 +00:00
Richard Sandiford
e8044f355d * configure.ac (mips*-*-bsd*, mips*-*-ultrix*, mips*-*-osf*)
(mips*-*-ecoff*, mips*-*-pe*, mips*-*-irix* [v4 and earlier])
	(mips*-*-lnews*, mips*-*-riscos*): Add gas and ld to noconfigdirs.
	* configure: Regenerate.

gas/
	* NEWS: Note removal of ECOFF support.
	* doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
	* Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
	(MULTI_CFILES): Remove config/e-mipsecoff.c.
	* Makefile.in: Regenerate.
	* configure.in: Remove MIPS ECOFF references.
	(mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
	Delete cases.
	(mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
	(mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
	(mips-*-*): ...this single case.
	(mipsbecoff, mipslecoff, mipsecoff): Remove emulations.  Expect
	MIPS emulations to be e-mipself*.
	* configure: Regenerate.
	* configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
	(mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
	(mips-*-sysv*): Remove coff and ecoff cases.
	* as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
	* ecoff.c: Remove reference to MIPS ECOFF.
	* config/e-mipsecoff.c, config/te-lnews.h: Delete files.
	* config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
	(RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
	(mips_hi_fixup): Tweak comment.
	(append_insn): Require a howto.
	(mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.

gas/testsuite/
	* gas/all/gas.exp: Remove reference to mips-ecoff.
	* gas/mips/branch-misc-1.d, gas/mips/branch-misc-2.d,
	gas/mips/branch-misc-2-64.d, gas/mips/branch-misc-2pic.d,
	gas/mips/branch-misc-2pic-64.d, gas/mips/branch-swap.d: Remove
	skips for mips-*-ecoff.

ld/
	* NEWS: Document the removal of MIPS ECOFF targets.
	* ld.texinfo (--gpsize=@var{value}): Use MIPS ELF rather than
	MIPS ECOFF as an example of a target that supports small data.
	* ldmain.c (g_switch_value): Likewise.
	* configure.tgt (mips*-*-pe, mips*-dec-ultrix*, mips*-dec-osf*)
	(mips*-sgi-irix* [v4 and earlier], mips*el-*-ecoff*, mips*-*-ecoff*)
	(mips*-*-bsd*, mips*-*-lnews*): Remove cases.
	* Makefile.am (ALL_EMULATION_SOURCES): Remove emipsbig.c, emipsbsd.c,
	emipsidt.c, emipsidtl.c, emipslit.c, emipslnews.c and emipspe.c.
	(emipsbig.c, emipsbsd.c, emipsidt.c, emipsidtl.c, emipslit.c)
	(emipslnews.c, emipspe.c): Delete rules.
	* Makefile.in: Regenerate.
	* emulparams/mipsbig.sh, emulparams/mipsbsd.sh, emulparams/mipsidt.sh,
	emulparams/mipsidtl.sh, emulparams/mipslit.sh, emulparams/mipslnews.sh,
	emulparams/mipspe.sh, emultempl/mipsecoff.em: Delete.
	* emultempl/m68kcoff.em: Update comment to say that MIPS ECOFF support
	has now been removed.
	* emultempl/pe.em: Remove TARGET_IS_mipspe checks.
2013-06-22 16:44:16 +00:00
Richard Sandiford
98508b2a6e gas/
* doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
	Use "CPU" instead of "cpu".
	* doc/c-mips.texi: Likewise.
	(MIPS Opts): Rename to MIPS Options.
	(MIPS option stack): Rename to MIPS Option Stack.
	(MIPS ASE instruction generation overrides): Rename to
	MIPS ASE Instruction Generation Overrides (for now).
	(MIPS floating-point): Rename to MIPS Floating-Point.
2013-06-22 16:18:45 +00:00
Richard Sandiford
fc16f8cc9b gas/
* doc/c-mips.texi (MIPS Macros): New section.
	(MIPS Object): Replace with...
	(MIPS Small Data): ...this new section.
2013-06-22 16:09:55 +00:00
Richard Sandiford
5a7560b5ec gas/
* doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
	Capitalize name.  Use @kindex instead of @cindex for .set entries.
2013-06-22 16:02:24 +00:00
Richard Sandiford
a1b86ab7ac gas/
* doc/c-mips.texi (MIPS Stabs): Remove section.
2013-06-22 15:58:59 +00:00
Maciej W. Rozycki
3bf0dbfb15 gas/
* config/tc-mips.c (append_insn): Don't do branch relaxation for
	MIPS-3D instructions either.
	(md_convert_frag): Update the COPx branch mask accordingly.

	* config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
	option.
	* doc/as.texinfo (Overview): Add --relax-branch and
	--no-relax-branch.
	* doc/c-mips.texi (MIPS Opts): Document --relax-branch and
	--no-relax-branch.

	gas/testsuite/
	* gas/mips/relax-bc1any.l: New test.
	* gas/mips/relax-bc1any.s: New test source.
	* gas/mips/mips.exp: Run the new test.
2013-06-10 18:15:48 +00:00
Jan-Benedict Glaw
997b26e88c * doc/c-msp430.texi: Fix typo.
also:	* ChangeLog: Fix entry.
2013-05-16 16:47:14 +00:00
Nick Clifton
638d380363 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
Add -mcpu command to specify core type.
	* doc/c-msp430.c: Update documentation.
	* gas/msp430/opcodes.s: Use correct value for .arch pseudo.
	* gas/msp430/msp430x.d: Use correct value for -mcpu option.
2013-05-16 13:19:40 +00:00
Andrew Pinski
b015e599c7 binutils/ChangeLog:
* doc/binutils.texi: Document -Mvirt disassembler option.

gas/ChangeLog:
* config/tc-mips.c (struct mips_set_options): New ase_virt field.
(mips_opts): Update for the new field.
(file_ase_virt): New variable.
(ISA_SUPPORTS_VIRT_ASE): New macro.
(ISA_SUPPORTS_VIRT64_ASE): New macro.
(MIPS_CPU_ASE_VIRT): New define.
(is_opcode_valid): Handle ase_virt.
(macro_build): Handle "+J".
(validate_mips_insn): Likewise.
(mips_ip): Likewise.
(enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
(md_longopts): Add mvirt and mnovirt
(md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
(mips_after_parse_args): Handle ase_virt field.
(s_mipsset): Handle "virt" and "novirt".
(mips_elf_final_processing): Add a comment about virt ASE might need a new flag.
(md_show_usage): Print out the usage of -mvirt and mno-virt options.
* doc/c-mips.texi: Document -mvirt and -mno-virt.
Document ".set virt" and ".set novirt".

gas/testsuite/ChangeLog:
* gas/mips/mips.exp: Run virt and virt64 testcases.
* gas/mips/virt.d: New file.
* gas/mips/virt.s: New file.
* gas/mips/virt64.d: New file.
* gas/mips/virt64.s: New file.

include/opcode/ChangeLog:
* mips.h (OP_MASK_CODE10): Correct definition.
(OP_SH_CODE10): Likewise.
Add a comment that "+J" is used now for OP_*CODE10.
(INSN_ASE_MASK): Update.
(INSN_VIRT): New macro.
(INSN_VIRT64): New macro

opcodes/ChangeLog:
* mips-dis.c (mips_arch_choices): Add INSN_VIRT to mips32r2 .
Add INSN_VIRT and INSN_VIRT64 to mips64r2.
(parse_mips_dis_option): Handle the virt option.
(print_insn_args): Handle "+J".
(print_mips_disassembler_options): Print out message about virt64.
* mips-opc.c (IVIRT): New define.
(IVIRT64): New define.
(mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0,
tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp VIRT instructions.
Move rfe to the bottom as it conflicts with tlbgp.
2013-05-10 01:08:48 +00:00
Nick Clifton
13761a1136 * archures.c: Add some more MSP430 machine numbers.
* config.bfd (msp430): Define targ_selvecs.
	* configure.in: Add bfd_elf32_msp430_ti_vec.
	* cpu-msp430.c: Add some more MSP430 machine numbers.
	* elf32-msp430.c Add support for MSP430X relocations.
	Add support for TI compiler generated relocations.
	Add support for sym_diff relocations.
	Add support for relaxing out of range short branches into long
	branches.
	Add support for MSP430 attribute section.
	* reloc.c: Add MSP430X relocations.
	* targets.c: Add bfd_elf32_msp430_ti_vec.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.

	* readelf.c: Add support for MSP430X architecture.

	* readelf.exp: Expect -wi test to fail for the MSP430.

	* config/tc-msp430.c: Add support for the MSP430X architecture.
	Add code to insert a NOP instruction after any instruction that
	might change the interrupt state.
	Add support for the LARGE memory model.
	Add code to initialise the .MSP430.attributes section.
	* config/tc-msp430.h: Add support for the MSP430X architecture.
	* doc/c-msp430.texi: Document the new -mL and -mN command line
	options.
	* NEWS: Mention support for the MSP430X architecture.

	* gas/all/gas.exp: Skip the DIFF1 test for the MSP430.
	Expect the FORWARD test to pass for the MSP430.
	Skip the REDEF tests for the MSP430.
	Expect the 930509A test to fail for the MSP430.
	* gas/all/sleb128-4.d: Skip for the MSP430.
	* gas/elf/elf.exp: Set target_machine to msp430 for the MSP430.
	Skip the EHOPT0 test for the MSP430.
	Skip the REDEF and EQU-RELOC tests for the MSP430.
	* gas/elf/section2.e-msp430: New file.
	* gas/lns/lns-big-delta.d: Remove expectation of 20-bit
	addresses.
	* gas/lns/lns.exp: Use alternate LNS COMMON test for the MSP430.
	* gas/msp430/msp430x.s: New test.
	* gas/msp430/msp430x.d: Expected disassembly.
	* gas/msp430/msp430.exp: Run new test.
	* gas/msp430/opcode.d: Update expected disassembly.

	* msp430.h: Add MSP430X relocs.
	Add some more MSP430 machine numbers.
	Add values used by .MSP430.attributes section.

	* msp430.h: Add patterns for MSP430X instructions.

	* Makefile.am: Add emsp430X.c
	* Makefine.in: Regenerate.
	* configure.tgt (msp430): Add msp430X emulation.
	* ldmain.c (multiple_definition): Only disable relaxation if it
	was enabled by the user.
	* ldmain.h (RELAXATION_ENABLED_BY_USER): New macro.
	* emulparams/msp430all.sh: Add support for MSP430X.
	* emultempl/generic.em: (before_parse): Enable relaxation for the
	MSP430.
	* scripttempl/msp430.sc: Reorganize sections.  Add .rodata
	section.
	* scripttempl/msp430_3.sc: Likewise.
	* NEWS: Mention support for MSP430X.

	* ld-elf/flags1.d: Expect this test to pass on the MSP430.
	* ld-elf/init-fini-arrays.d: Expect this test to fail on the
	MSP430.
	* ld-elf/merge.d: Expect this test to pass on the MSP430.
	* ld-elf/sec64k.exp: Skip these tests for the MSP430.
	* ld-gc/pr13683.d: Expect this test to fail on the MSP430.
	* ld-srec/srec.exp: Expect these tests to fail on the MSP430.
	* ld-undefined/undefined.exp: Expect the UNDEFINED LINE test to
	fail on the MSP430.

	* msp430-dis.c: Add support for MSP430X instructions.
2013-05-02 21:06:15 +00:00
Nick Clifton
b40bf0a255 * elflink.c (_bfd_elf_gc_mark_extra_sections): Remove mark from
fragmented .debug_line sections associated with unmarked code
	sections.

	* dwarf.c (read_debug_line_header): New function.  Reads in a
	header in a .debug_line section.
	(display_debug_lines_raw): Use new function.  Handle fragmentary
	.debug_line sections.
	(display_debug_lines_decoded): Likewise.
	* readelf.c (process_section_headers): Handle fragmenatry
	.debug_line sections.
	(display_debug_section): Likewise.

	* as.c (Options): Add -gdwarf-sections.
	(parse_args): Likewise.
	* as.h (flag_dwarf_sections): Declare.
	* dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
	(process_entries): When -gdwarf-sections is enabled generate
	fragmentary .debug_line sections.
	(out_debug_line): Set the section for the .debug_line section end
	symbol.
	* doc/as.texinfo: Document -gdwarf-sections.
	* NEWS: Mention -gdwarf-sections.

	* gas/elf/dwarf2-3.d: Fix expected readelf output.

	* scripttempl/DWARF.sc: Add support for .debug_line.* and
	.debug_line_end.
2013-04-29 13:38:59 +00:00
Nick Clifton
4d13caa0b9 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
	ATmega2564RFR2
	* gas/doc/c-avr.texi (-mmcu documentation): Likewise.
2013-04-09 15:39:37 +00:00
Alan Modra
0c76cae8b2 * doc/as.texinfo: Add support to generate man options for h8300.
* doc/c-h8300.texi: Likewise.
2013-04-03 02:48:37 +00:00
Andreas Schwab
9e6f381133 * doc/c-arc.texi (ARC Directives): Revert last change and use
@itemize instead of @table.
* doc/c-arm.texi (ARM-Instruction-Set): Likewise.
2013-03-14 16:17:45 +00:00
Nick Clifton
ba724cfc0c PR gas/15212
* doc/c-arc.texi (ARC Directives): Use @code instead of @bullte
	for table format.
	* doc/c-arm.texi (ARM-Instruction-Set): Likewise.  Also add text
	to the @item directives.
	(ARM-Neon-Alignment): Move to correct place in the document.
	* doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
	formatting.
	* doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
	@smallexample.
2013-03-14 10:00:46 +00:00
xuepeng guo
70a8bc5bb9 2013-02-25 Terry Guo <terry.guo@arm.com>
* config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
	* doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
	list of accepted CPUs.
2013-02-25 02:53:41 +00:00
H.J. Lu
5c111e3769 Implement Intel SMAP instructions
gas/

	PR gas/15159
	* config/tc-i386.c (cpu_arch): Add ".smap".

	* doc/c-i386.texi: Document smap.

gas/testsuite/

	PR gas/15159
	* gas/i386/i386.exp: Run smap and x86-64-smap.

	* gas/i386/smap.d: New file.
	* gas/i386/smap.s: likewise.
	* gas/i386/x86-64-smap.d: likewise.

opcodes/

	PR gas/15159
	* i386-dis.c (rm_table): Add clac and stac to RM_0F01_REG_1.

	* i386-gen.c (cpu_flag_init): Add CPU_SMAP_FLAGS.
	(cpu_flags): Add CpuSMAP.

	* i386-opc.h (CpuSMAP): New.
	(i386_cpu_flags): Add cpusmap.

	* i386-opc.tbl: Add clac and stac.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2013-02-19 19:10:31 +00:00
Sandra Loosemore
36591ba149 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
Andrew Jenner <andrew@codesourcery.com>

	Based on patches from Altera Corporation.

	bfd/
	* Makefile.am (ALL_MACHINES): Add cpu-nios2.lo.
	(ALL_MACHINES_CFILES): Add cpu-nios2.c.
	(BFD_BACKENDS): Add elf32-nios2.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-nios2.c.
	* Makefile.in: Regenerated.
	* configure.in: Add entries for bfd_elf32_bignios2_vec and
	bfd_elf32_littlenios2_vec.
	* configure: Regenerated.
	* config.bfd: Add cases for nios2.
	* archures.c (enum bfd_architecture): Add bfd_arch_nios2.
	(bfd_mach_nios2): Define.
	(bfd_nios2_arch): Declare.
	(bfd_archures_list): Add bfd_nios2_arch.
	* targets.c (bfd_elf32_bignios2_vec): Declare.
	(bfd_elf32_littlenios2_vec): Declare.
	(_bfd_target_vector): Add entries for bfd_elf32_bignios2_vec and
	bfd_elf32_littlenios2_vec.
	* elf-bfd.h (enum elf_target_id): Add NIOS2_ELF_DATA.
	* reloc.c (enum bfd_reloc_code_real): Add Nios II relocations.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Regenerated.
	* cpu-nios2.c: New file.
	* elf32-nios2.c: New file.

	opcodes/
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and
	nios2-opc.c.
	* Makefile.in: Regenerated.
	* configure.in: Add case for bfd_nios2_arch.
	* configure: Regenerated.
	* disassemble.c (ARCH_nios2): Define.
	(disassembler): Add case for bfd_arch_nios2.
	* nios2-dis.c: New file.
	* nios2-opc.c: New file.

	include/
	* dis-asm.h (print_insn_big_nios2): Declare.
	(print_insn_little_nios2): Declare.

	include/elf
	* nios2.h: New file.

	include/opcode/
	* nios2.h: New file.

	gas/
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
	(TARGET_CPU_HFILES): Add config/tc-nios2.h.
	* Makefile.in: Regenerated.
	* configure.tgt: Add case for nios2*-linux*.
	* config/obj-elf.c: Conditionally include elf/nios2.h.
	* config/tc-nios2.c: New file.
	* config/tc-nios2.h: New file.
	* doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
	* doc/Makefile.in: Regenerated.
	* doc/all.texi: Set NIOSII.
	* doc/as.texinfo (Overview): Add Nios II options.
	(Machine Dependencies): Include c-nios2.texi.
	* doc/c-nios2.texi: New file.
	* NEWS: Note Altera Nios II support.

	gas/testsuite/
	* gas/nios2/add.d: New.
	* gas/nios2/add.s: New.
	* gas/nios2/align_fill.d: New.
	* gas/nios2/align_fill.s: New.
	* gas/nios2/align_text.d: New.
	* gas/nios2/align_text.s: New.
	* gas/nios2/and.d: New.
	* gas/nios2/and.s: New.
	* gas/nios2/branch.d: New.
	* gas/nios2/branch.s: New.
	* gas/nios2/break.d: New.
	* gas/nios2/break.s: New.
	* gas/nios2/bret.d: New.
	* gas/nios2/bret.s: New.
	* gas/nios2/cache.d: New.
	* gas/nios2/cache.s: New.
	* gas/nios2/call26.d: New.
	* gas/nios2/call26.s: New.
	* gas/nios2/call.d: New.
	* gas/nios2/call.s: New.
	* gas/nios2/cmp.d: New.
	* gas/nios2/cmp.s: New.
	* gas/nios2/comments.d: New.
	* gas/nios2/comments.s: New.
	* gas/nios2/complex.d: New.
	* gas/nios2/complex.s: New.
	* gas/nios2/ctl.d: New.
	* gas/nios2/ctl.s: New.
	* gas/nios2/custom.d: New.
	* gas/nios2/custom.s: New.
	* gas/nios2/etbt.d: New.
	* gas/nios2/etbt.s: New.
	* gas/nios2/flushda.d: New.
	* gas/nios2/flushda.s: New.
	* gas/nios2/illegal.l: New.
	* gas/nios2/illegal.s: New.
	* gas/nios2/jmp.d: New.
	* gas/nios2/jmp.s: New.
	* gas/nios2/ldb.d: New.
	* gas/nios2/ldb.s: New.
	* gas/nios2/ldh.d: New.
	* gas/nios2/ldh.s: New.
	* gas/nios2/ldw.d: New.
	* gas/nios2/ldw.s: New.
	* gas/nios2/lineseparator.d: New.
	* gas/nios2/lineseparator.s: New.
	* gas/nios2/mov.d: New.
	* gas/nios2/movia.d: New.
	* gas/nios2/movia.s: New.
	* gas/nios2/movi.d: New.
	* gas/nios2/movi.s: New.
	* gas/nios2/mov.s: New.
	* gas/nios2/mul.d: New.
	* gas/nios2/mul.s: New.
	* gas/nios2/nios2.exp: New.
	* gas/nios2/nor.d: New.
	* gas/nios2/nor.s: New.
	* gas/nios2/or.d: New.
	* gas/nios2/or.s: New.
	* gas/nios2/ret.d: New.
	* gas/nios2/ret.s: New.
	* gas/nios2/rol.d: New.
	* gas/nios2/rol.s: New.
	* gas/nios2/rotate.d: New.
	* gas/nios2/rotate.s: New.
	* gas/nios2/stb.d: New.
	* gas/nios2/stb.s: New.
	* gas/nios2/sth.d: New.
	* gas/nios2/sth.s: New.
	* gas/nios2/stw.d: New.
	* gas/nios2/stw.s: New.
	* gas/nios2/sub.d: New.
	* gas/nios2/sub.s: New.
	* gas/nios2/sync.d: New.
	* gas/nios2/sync.s: New.
	* gas/nios2/trap.d: New.
	* gas/nios2/trap.s: New.
	* gas/nios2/tret.d: New.
	* gas/nios2/tret.s: New.
	* gas/nios2/warn_noat.l: New.
	* gas/nios2/warn_noat.s: New.
	* gas/nios2/warn_nobreak.l: New.
	* gas/nios2/warn_nobreak.s: New.
	* gas/nios2/xor.d: New.
	* gas/nios2/xor.s: New.

	ld/
	* Makefile.am (enios2elf.c): New rule.
	* Makefile.in: Regenerated.
	* configure.tgt: Add case for nios2*-*-*.
	* emulparams/nios2elf.sh: New file.
	* NEWS: Note Altera Nios II support.

	ld/testsuite/
	* ld-nios2/emit-relocs-1a.s: New.
	* ld-nios2/emit-relocs-1b.s: New.
	* ld-nios2/emit-relocs-1.d: New.
	* ld-nios2/emit-relocs-1.ld: New.
	* ld-nios2/gprel.d: New.
	* ld-nios2/gprel.s: New.
	* ld-nios2/hilo16.d: New.
	* ld-nios2/hilo16.s: New.
	* ld-nios2/hilo16_symbol.s: New.
	* ld-nios2/imm5.d: New.
	* ld-nios2/imm5.s: New.
	* ld-nios2/imm5_symbol.s: New.
	* ld-nios2/nios2.exp: New.
	* ld-nios2/pcrel16.d: New.
	* ld-nios2/pcrel16_label.s: New.
	* ld-nios2/pcrel16.s: New.
	* ld-nios2/relax_callr.d: New.
	* ld-nios2/relax_callr.ld: New.
	* ld-nios2/relax_callr.s: New.
	* ld-nios2/relax_cjmp.d: New.
	* ld-nios2/relax_cjmp.s: New.
	* ld-nios2/relax_jmp.ld: New.
	* ld-nios2/relax_section.d: New.
	* ld-nios2/relax_section.s: New.
	* ld-nios2/relax_ujmp.d: New.
	* ld-nios2/relax_ujmp.s: New.
	* ld-nios2/reloc.d: New.
	* ld-nios2/reloc.s: New.
	* ld-nios2/reloc_symbol.s: New.
	* ld-nios2/s16.d: New.
	* ld-nios2/s16.s: New.
	* ld-nios2/s16_symbol.s: New.
	* ld-nios2/u16.d: New.
	* ld-nios2/u16.s: New.
	* ld-nios2/u16_symbol.s: New.
	* ld-elf/indirect.exp: Skip on targets that don't support
	-shared -fPIC.
	* ld-elfcomm/elfcomm.exp: Build with -G0 for nios2.
	* ld-plugin/lto.exp: Skip shared library tests on targets that
	don't support them.  Skip execution tests on non-native targets.

	binutils/
	* readelf.c: Include elf/nios2.h.
	(dump_relocations): Add case for EM_ALTERA_NIOS2.
	(get_nios2_dynamic_type): New.
	(get_dynamic_type): Add case for EM_ALTERA_NIOS2.
	(is_32bit_abs_reloc): Fix EM_ALTERA_NIOS2 case.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Add EM_ALTERA_NIOS2 and EM_NIOS32 cases.
	* NEWS: Note Altera Nios II support.
	* MAINTAINERS: Add Nios II maintainers.
2013-02-06 23:22:26 +00:00
H.J. Lu
ace9af6f59 Add "@c man" markers to doc/c-metag.texi
* doc/c-metag.texi: Add "@c man" markers.
2013-02-04 20:29:21 +00:00
Nick Clifton
78c8d46ca4 Add support for V850E3V5 architecture 2013-01-24 11:14:05 +00:00
Peter Bergner
5817ffd1f8 include/opcode/
* ppc.h (PPC_OPCODE_POWER8): New define.
	(PPC_OPCODE_HTM): Likewise.

opcodes/
	* ppc-dis.c (ppc_opts): Add "power8", "pwr8" and "htm" entries.
	* ppc-opc.c (HTM_R, HTM_SI, XRTRB_MASK, XRTRARB_MASK, XRTLRARB_MASK,
	XRTARARB_MASK, XRTBFRARB_MASK, XRCL, POWER8, PPCHTM): New defines.
	(SH6): Update.
	<"tabort.", "tabortdc.", "tabortdci.", "tabortwc.",
	"tabortwci.", "tbegin.", "tcheck", "tend.", "trechkpt.",
	"treclaim.", "tsr.">: Add POWER8 HTM opcodes.
	<"tendall.", "tresume.", "tsuspend.">: Add POWER8 HTM extended opcodes.

gas/
	* doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
	* doc/c-ppc.texi (PowerPC-Opts):  Likewise.
	* config/tc-ppc.c (md_show_usage): Likewise.
	(ppc_handle_align): Handle power8's group ending nop.

gas/testsuite/
	* gas/ppc/htm.d: New test.
	* gas/ppc/htm.s: Likewise.
	* gas/ppc/power8.d: Likewise.
	* gas/ppc/power8.s: Likewise.
	* gas/ppc/ppc.exp: Run them.
2013-01-11 02:25:36 +00:00
H.J. Lu
34bca50861 Remove trailing white spaces on gas
* app.c: Remove trailing white spaces.
	* as.c: Likewise.
	* as.h: Likewise.
	* cond.c: Likewise.
	* dw2gencfi.c: Likewise.
	* dwarf2dbg.h: Likewise.
	* ecoff.c: Likewise.
	* input-file.c: Likewise.
	* itbl-lex.h: Likewise.
	* output-file.c: Likewise.
	* read.c: Likewise.
	* sb.c: Likewise.
	* subsegs.c: Likewise.
	* symbols.c: Likewise.
	* write.c: Likewise.
	* config/tc-i386.c: Likewise.
	* doc/Makefile.am: Likewise.
	* doc/Makefile.in: Likewise.
	* doc/c-aarch64.texi: Likewise.
	* doc/c-alpha.texi: Likewise.
	* doc/c-arc.texi: Likewise.
	* doc/c-arm.texi: Likewise.
	* doc/c-avr.texi: Likewise.
	* doc/c-bfin.texi: Likewise.
	* doc/c-cr16.texi: Likewise.
	* doc/c-d10v.texi: Likewise.
	* doc/c-d30v.texi: Likewise.
	* doc/c-h8300.texi: Likewise.
	* doc/c-hppa.texi: Likewise.
	* doc/c-i370.texi: Likewise.
	* doc/c-i386.texi: Likewise.
	* doc/c-i860.texi: Likewise.
	* doc/c-m32c.texi: Likewise.
	* doc/c-m32r.texi: Likewise.
	* doc/c-m68hc11.texi: Likewise.
	* doc/c-m68k.texi: Likewise.
	* doc/c-microblaze.texi: Likewise.
	* doc/c-mips.texi: Likewise.
	* doc/c-msp430.texi: Likewise.
	* doc/c-mt.texi: Likewise.
	* doc/c-s390.texi: Likewise.
	* doc/c-score.texi: Likewise.
	* doc/c-sh.texi: Likewise.
	* doc/c-sh64.texi: Likewise.
	* doc/c-tic54x.texi: Likewise.
	* doc/c-tic6x.texi: Likewise.
	* doc/c-v850.texi: Likewise.
	* doc/c-xc16x.texi: Likewise.
	* doc/c-xgate.texi: Likewise.
	* doc/c-xtensa.texi: Likewise.
	* doc/c-z80.texi: Likewise.
	* doc/internals.texi: Likewise.
2013-01-10 19:51:55 +00:00
Nick Clifton
a3c629886c * common.h: Fix case of "Meta".
* metag.h: New file.

	* dis-asm.h (print_insn_metag): New declaration.

	* metag.h: New file.

	* Makefile.am: Add Meta.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* configure.in: Add Meta.
	* disassemble.c: Add Meta support.
	* metag-dis.c: New file.

	* Makefile.am: Add Meta.
	* Makefile.in: Regenerate.
	* archures.c (bfd_mach_metag): New.
	* bfd-in2.h: Regenerate.
	* config.bfd: Add Meta.
	* configure: Regenerate.
	* configure.in: Add Meta.
	* cpu-metag.c: New file.
	* elf-bfd.h: Add Meta.
	* elf32-metag.c: New file.
	* elf32-metag.h: New file.
	* libbfd.h: Regenerate.
	* reloc.c: Add Meta relocations.
	* targets.c: Add Meta.

	* Makefile.am: Add Meta.
	* Makefile.in: Regenerate.
	* config/tc-metag.c: New file.
	* config/tc-metag.h: New file.
	* configure.tgt: Add Meta.
	* doc/Makefile.am: Add Meta.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi: Add Meta.
	* doc/as.texiinfo: Document Meta options.
	* doc/c-metag.texi: New file.

	* gas/metag/labelarithmetic.d: New file.
	* gas/metag/labelarithmetic.s: New file.
	* gas/metag/metacore12.d: New file.
	* gas/metag/metacore12.s: New file.
	* gas/metag/metacore21-invalid.l: New file.
	* gas/metag/metacore21-invalid.s: New file.
	* gas/metag/metacore21.d: New file.
	* gas/metag/metacore21.s: New file.
	* gas/metag/metacore21ext.d: New file.
	* gas/metag/metacore21ext.s: New file.
	* gas/metag/metadsp21-invalid.l: New file.
	* gas/metag/metadsp21-invalid.s: New file.
	* gas/metag/metadsp21.d: New file.
	* gas/metag/metadsp21.s: New file.
	* gas/metag/metadsp21ext.d: New file.
	* gas/metag/metadsp21ext.s: New file.
	* gas/metag/metafpu21.d: New file.
	* gas/metag/metafpu21.s: New file.
	* gas/metag/metafpu21ext.d: New file.
	* gas/metag/metafpu21ext.s: New file.
	* gas/metag/metag.exp: New file.
	* gas/metag/tls.d: New file.
	* gas/metag/tls.s: New file.

	* Makefile.am: Add Meta.
	* Makefile.in: Regenerate.
	* configure.tgt: Add Meta.
	* emulparams/elf32metag.sh: New file.
	* emultempl/metagelf.em: New file.

	* ld-elf/merge.d: Mark Meta as xfail.
	* ld-gc/start.d: Skip this test on Meta.
	* ld-gc/personality.d: Skip this test on Meta.
	* ld-metag/external.s: New file.
	* ld-metag/metag.exp: New file.
	* ld-metag/pcrel.d: New file.
	* ld-metag/pcrel.s: New file.
	* ld-metag/shared.d: New file.
	* ld-metag/shared.r: New file.
	* ld-metag/shared.s: New file.
	* ld-metag/stub.d: New file.
	* ld-metag/stub.s: New file.
	* ld-metag/stub_pic_app.d: New file.
	* ld-metag/stub_pic_app.r: New file.
	* ld-metag/stub_pic_app.s: New file.
	* ld-metag/stub_pic_shared.d: New file.
	* ld-metag/stub_pic_shared.s: New file.
	* ld-metag/stub_shared.d: New file.
	* ld-metag/stub_shared.r: New file.
	* ld-metag/stub_shared.s: New file.

	* binutils/readelf.c: (guess_is_rela): Add EM_METAG.
	(dump_relocations): Add EM_METAG.
	(get_machine_name): Correct case for Meta.
	(is_32bit_abs_reloc): Add support for Meta ADDR32 reloc.
	(is_none_reloc): Add support for Meta NONE reloc.
2013-01-10 09:49:22 +00:00
Andreas Schwab
a4ac1c4251 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
* doc/c-score.texi (SCORE-Opts): Likewise.
* doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2013-01-06 17:50:21 +00:00
Nick Clifton
5bf135a788 Add copyright notices 2012-12-17 16:56:12 +00:00
Nick Clifton
de863c7475 2012-11-09 Nick Clifton <nickc@redhat.com>
* Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo.
	(ALL_MACHINES_CFILES): Add cpu-v850-rh850.c.
	* archures.c (bfd_arch_info): Add bfd_v850_rh850_arch.
	* config.bfd: Likewise.
	* configure.in: Add bfd_elf32_v850_rh850_vec.
	* cpu-v850.c: Update printed description.
	* cpu-v850_rh850.c: New file.
	* elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI
	relocs.
	(v850_elf_perform_relocation): Likewise.
	(v850_elf_final_link_relocate): Likewise.
	(v850_elf_relocate_section): Likewise.
	(v850_elf_relax_section): Likewise.
	(v800_elf_howto_table): New.
	(v850_elf_object_p): Add support for RH850 ABI values.
	(v850_elf_final_write_processing): Likewise.
	(v850_elf_merge_private_bfd_data): Likewise.
	(v850_elf_print_private_bfd_data): Likewise.
	(v800_elf_reloc_map): New.
	(v800_elf_reloc_type_lookup): New.
	(v800_elf_reloc_name_lookup): New.
	(v800_elf_info_to_howto): New.
	(bfd_elf32_v850_rh850_vec): New.
	(bfd_arch_v850_rh850): New.
	* targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.

	* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
	(guess_is_rela): Add EM_V800.
	(dump_relocations): Likewise.
	(get_machine_name): Update EM_V800.
	(get_machine_flags): Add support for RH850 ABI flags.
	(is_32bit_abs_reloc): Add support for RH850 ABI reloc.

	* config/tc-v850.c (v850_target_arch): New.
	(v850_target_format): New.
	(set_machine): Use v850_target_arch.
	(md_begin): Likewise.
	(md_show_usage): Document new switches.
	(md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and
	-m4byte-align.
	* config/tc-v850.c (TARGET_ARCH) Use v850_target_arch.
	(TARGET_FORMAT): Use v850_target_format.
	* doc/c-v850.texi: Document new options.

	* v850.h: Add RH850 ABI values.

	* Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c.
	* Makefile.in: Regenerate.
	* configure.tgt (v850*-*-*): Make v850_rh850 the default
	emulation. Add vanilla v850 as an extra emulation.
	* emulparams/v850_rh850.sh: New file.
	* scripttempl/v850_rh850.sc: New file.

	* configure.in: Add bfd_v850_rh850_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Likewise.
2012-11-09 17:36:19 +00:00
Nick Clifton
708e2187a3 2012-11-09 Nick Clifton <nickc@redhat.com>
* elf32-rx.c (describe_flags): New function.  Returns a buffer
	containing a description of the E_FLAG_RX_... values set.
	(rx_elf_merge_private_bfd_data): Use it.
	(rx_elf_print_private_bfd_data): Likewise.
	(elf32_rx_machine): Skip EF_RX_CPU_RX check.
	(elf32_rx_special_sections): Define.
	(elf_backend_special_sections): Define.

2012-11-09  Nick Clifton  <nickc@redhat.com>

	* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.

2012-11-09  Nick Clifton  <nickc@redhat.com>

	* config/obj-elf.c (obj_elf_change_section): Allow init array
	sections to have the SHF_EXECINSTR attribute for the RX target.
	* config/tc-rx.c (elf_flags): Initialise with E_FLAG_RX_ABI.
	(enum options): Add OPTION_USES_GCC_ABI and OPTION_USES_RX_ABI.
	(md_longopts): Add -mgcc-abi and -mrx-abi.
	(md_parse_option): Add support for OPTION_USES_GCC_ABI and
	OPTION_USES_RX_ABI.
	* doc/as.texinfo (RX Options): Add mention of remaining RX
	options.
	* doc/c-rx.texi: Document -mgcc-abi and -mrx-abi.

2012-11-09  Nick Clifton  <nickc@redhat.com>

	* rx.h (EF_RX_CPU_RX): Add comment.
	(E_FLAG_RX_ABI): Define.

2012-11-09  Nick Clifton  <nickc@redhat.com>

	* emultempl/rxelf.em (no_flag_mismatch_warnings): Initialise to
	true.
	(PARSE_AND_LIST_LONGOPTS): Add flag-mismatch-warnings.
	(PARSE_AND_LIST_ARG_CASES): Add support for
	--flag-mismatch-warnings.
2012-11-09 17:00:44 +00:00
Nick Clifton
3bfcb6528e bfd:
* elf32-arm.c (elf32_arm_print_private_bfd_data): Recognise and
        display the new ARM hard-float/soft-float ABI flags for EABI_VER5
        (elf32_arm_post_process_headers): Add the hard-float/soft-float
        ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5.

binutils:
        * readelf.c (decode_ARM_machine_flags): Recognise and display the
        new ARM hard-float/soft-float ABI flags for EABI_VER5. Split out
        the code for EABI_VER4 and EABI_VER5 to allow this.

elfcpp:
        * arm.h: New enum for EABI soft- and hard-float flags.

gold:
        * gold.cc (Target_arm::do_adjust_elf_header): Add the
        hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC
        in EABI_VER5.

include:
        * elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define.
        (EF_ARM_ABI_FLOAT_HARD): Likewise.

ld/testsuite:
        * ld-arm/eabi-hard-float.s: New test source.
        * ld-arm/eabi-soft-float.s: New test source.
        * ld-arm/eabi-hard-float.d: New test.
        * ld-arm/eabi-soft-float.d: New test.
        * ld-arm/eabi-soft-float-ABI4.d: New test.
        * ld-arm/eabi-soft-float-r.d: New test.
        * ld-arm/arm-elf.xp: Use the new tests.

binutils:
	PR binutils/14779
	* configure.in: Add checks for wchar.h and mbstate_t.
	* config.in: Regenerate.
	* configure: Regenerate.
	* readelf.c: Conditionally include wchar.h.
	(print_symbol): Conditionally use mbstate_t.
2012-10-30 12:44:58 +00:00
Kai Tietz
70e0ee1a27 * doc/as.texinfo: Add missing documentation about section flag
exclude.
2012-10-18 06:46:51 +00:00
Peter Bergner
b36546d2d5 gas/
* doc/as.texinfo (-mpwr4, -mpwr7): Fix option name typos.
2012-10-12 18:03:09 +00:00
Nagajyothi Eggone
5e5c50d37b Add AMD bdver3 support.
gas/

	* config/tc-i386.c (cpu_arch): Add CPU_BDVER3_FLAGS.
	* doc/c-i386.texi: Add -march=bdver3 option.

gas/testsuite/

	* gas/i386/i386.exp: Run bdver3 test cases.
	* gas/i386/nops-1-bdver3.d: New.
	* gas/i386/arch-10-bdver3.d: New.
	* gas/i386/x86-64-nops-1-bdver3.d: New.
	* gas/i386/x86-64-arch-2-bdver3.d: New.

opcodes/

	* i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
	* i386-init.h: Regenerated.
2012-10-09 08:43:06 +00:00
Andreas Krebbel
cfc7277920 2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c (s390_parse_cpu): Add new option zEC12.
	* doc/as.texinfo: Document new option zEC12.
	* doc/c-s390.texi: Likewise.

2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/s390.exp: Run zEC12 tests.
	* gas/s390/zarch-zEC12.d: New file.
	* gas/s390/zarch-zEC12.s: New file.

2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390-mkopc.c: Support new option zEC12.
	* s390-opc.c: Add new instruction formats.
	* s390-opc.txt: Add new instructions for zEC12.

2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12.
2012-10-04 08:47:36 +00:00
H.J. Lu
60aa667ec4 Replace CpuSSE3 with CpuCX16 for cmpxchg16b
gas/

	* config/tc-i386.c (cpu_arch): Add .cx16.
	* doc/c-i386.texi: Document .cx16.

gas/testsuite/

	* gas/i386/x86-64-arch-2.s: Add test for cmpxchg16b.
	* gas/i386/x86-64-arch-2.d: Update correspondingly.
	* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
	* gas/i386/x86-64-arch-2-btver1.d: Likewise.
	* gas/i386/x86-64-arch-2-btver2.d: Likewise.
	* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
	* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
	* gas/i386/ilp32/x86-64-arch-2.d: Likewise.

opcodes/

	* i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
	CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
	CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
	CPU_BTVER2_FLAGS.  Add CPU_CX16_FLAGS.
	(cpu_flags): Add CpuCX16.
	* i386-opc.h (CpuCX16): New.
	(i386_cpu_flags): Add cpucx16.
	* i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
	* i386-tbl.h: Regenerate.
	* i386-init.h: Likewise.
2012-09-20 11:53:33 +00:00
Andreas Krebbel
1dd5381629 2012-09-06 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c (set_highgprs_p): New variable.
	(s390_machinemode): New function.
	(md_pseudo_table): Add new pseudo command machinemode.
	(md_parse_option): Set set_highgprs_p to TRUE if -mzarch was
	specified on command line.
	(s390_elf_final_processing): Set the highgprs flag in the ELF
	header depending on set_highgprs_p.

	* doc/c-s390.texi: Document new pseudo machinemode.
2012-09-06 08:23:25 +00:00
James Lemke
b4b783be19 * doc/as.texinfo: Document -mvle.
Missed with the original port commit.
Committed as obvious / trivial.
2012-09-05 18:19:55 +00:00
James Lemke
47527d7eb3 * gas/doc/c-ppc.texi: Document -mvle.
This was missing from the initial VLE port commit.
Committed as obvious / trivial.
2012-09-05 18:01:00 +00:00
Maciej W. Rozycki
b192990071 * doc/c-mips.texi (MIPS Opts): Correct a typo in the -mips5
option.
2012-08-31 19:15:59 +00:00
Walter Lee
e5b95258d9 Add support for constructing pc-relative addresses to the plt, by
adding the necessary assembly operators and relocations.

bfd:
	* reloc.c (Add BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): new relocations.
	* elfxx-tilegx.c (tilegx_elf_howto_table): Handle new relocations.
	(tilegx_reloc_map): Ditto.
	(reloc_to_create_func): Ditto.
	(tilegx_elf_check_relocs): Ditto.
	(tilegx_elf_gc_sweep_hook): Ditto.
	(tilegx_elf_relocate_section): Ditto.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.

gas:
	* tc-tilegx.c (O_hw0_plt): Define operator.
	(O_hw1_plt): Ditto.
	(O_hw1_last_plt): Ditto.
	(O_hw2_last_plt): Ditto.
	(md_begin): Handle new operators.
	(emit_tilegx_instruction): Ditto.
	(md_apply_fix): Ditto.
	* doc/c-tilegx.texi: Document new operators.

include/elf:
	* tilegx.h (R_TILEGX_IMM16_X0_HW0_PLT_PCREL): New relocation.
	(R_TILEGX_IMM16_X1_HW0_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW1_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW1_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW2_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW2_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW3_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW3_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL	): Ditto.
	(R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto.
2012-08-28 02:43:22 +00:00
Matthew Gretton-Dann
bca3892142 * bfd/elf32-arm.c (v8): New array.
(tag_cpu_arch_combine): Add support for ARMv8 attributes.
	(elf32_arm_merge_eabi_attributes): Likewise.
	(VFP_VERSION_COUNT): New define.
	* binutils/readelf.c (arm_attr_tag_CPU_arch): Update for ARMv8.
	(arm_attr_tag_FP_arch): Likewise.
	(arm_attr_tag_Advanced_SIMD_arch): Likewise.
	* gas/config/tc-arm.h (arm_ext_v8): New variable.
	(fpu_vfp_ext_armv8): Likewise.
	(fpu_neon_ext_armv8): Likewise.
	(fpu_crypto_ext_armv8): Likewise.
	(arm_archs): Add armv8-a.
	(arm_extensions): Add crypto, fp, and simd.
	(arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8.
	(cpu_arch_ver): Add support for ARMv8.
	(aeabi_set_public_sttributes): Likewise.
	* gas/doc/c-arm.texi (ARM Options): Document new architecture and
	extension options for ARMv8.
	* gas/testsuite/gas/arm/attr-march-all.d: Update for change in expected
	output.
	* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d: New testcase.
	* gas/testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv8-a.d: Likewise.
	* include/elf/arm.h (TAG_CPU_ARCH_V8): New define.
	(MAX_TAG_CPU_ARCH): Update.
	* include/opcode/arm.h (ARM_EXT_V8): New define.
	(FPU_VFP_EXT_ARMV8): Likewise.
	(FPU_NEON_EXT_ARMV8): Likewise.
	(FPU_CRYPTO_EXT_ARMV8): Likewise.
	(ARM_AEXT_V8A): Likewise.
	(FPU_VFP_ARMV8): Likwise.
	(FPU_NEON_ARMV8): Likewise.
	(FPU_CRYPTO_ARMV8): Likewise.
	(FPU_ARCH_VFP_ARMV8): Likewise.
	(FPU_ARCH_NEON_VFP_ARMV8): Likewise.
	(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
	(ARM_ARCH_V8A): Likwise.
	(ARM_ARCH_V8A_FP): Likewise.
	(ARM_ARCH_V8A_SIMD): Likewise.
	(ARM_ARCH_V8A_CRYPTO): Likewise.
	* ld/testsuite/ld-arm/arm-elf.exp: Add new testcases.
	* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Update for change in expected
	output.
	* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-7.d: New testcase.
	* ld/testsuite/ld-arm/attr-merge-vfp-7r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-armv8.s: Likewise.
2012-08-24 07:50:38 +00:00
H.J. Lu
542385d9f7 Replace --n32 with --x32
* doc/as.texinfo: Replace --n32 with --x32.
2012-08-20 13:57:05 +00:00
H.J. Lu
7b458c12dc Add AMD btver1 and btver2 support
gas/

2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>

	* config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and
	CPU_BTVER2_FLAGS.
	(i386_align_code): Add case for PROCESSOR_BT.

	* config/tc-i386.h (enum processor_type): Add PROCESSOR_BT.

	* doc/c-i386.texi: Add -march={btver1, btver2} options.

gas/testsuite/

2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>

	* gas/i386/i386.exp: Run btver1 and btver2 test cases.

	* gas/i386/nops-1-btver1.d: New.
	* gas/i386/nops-1-btver2.d: New.
	* gas/i386/arch-10-btver1.d: New.
	* gas/i386/arch-10-btver2.d: New.
	* gas/i386/x86-64-nops-1-btver1.d: New.
	* gas/i386/x86-64-nops-1-btver2.d: New.
	* gas/i386/x86-64-arch-2-btver1.d: New.
	* gas/i386/x86-64-arch-2-btver2.d: New.

opcodes/

2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>

	* i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
	CPU_BTVER2_FLAGS.

	* i386-opc.h: Update CpuPRFCHW comment.

	* i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2012-08-17 17:12:36 +00:00
Nick Clifton
a06ea96464 Add support for 64-bit ARM architecture: AArch64 2012-08-13 14:52:54 +00:00
Sandra Loosemore
711eefe492 2012-08-01 Catherine Moore <clm@codesourcery.com>
Sandra Loosemore  <sandra@codesourcery.com>

	gas/
	* config/mips/tc-mips.c (mips_cpu_info):  Add the 34kn.
	* doc/c-mips.texi (MIPS Opts): Document it.
2012-08-01 19:59:43 +00:00
H.J. Lu
e2e1fcde62 Implement RDRSEED, ADX and PRFCHW instructions
gas/

	* config/tc-i386.c: Add ADX, RDSEED and PRFCHW asm directives.
	* doc/c-i386.texi: Document the new directives.

gas/testsuite/

	* gas/i386/i386.exp: Run adx, rdseed and prefetchw tests.
	* gas/i386/x86-64-arch-2.s: Use prefetchw as 3dnow and Prfchw tests.
	* gas/i386/arch-10.s: Likewise.
	* gas/i386/arch-10-1.l: Changed correspondingly.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/arch-10.d: Likewise.
	* gas/i386/arch-10-lzcnt.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
	* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
	* gas/i386/arch-10-prefetchw.d: New file.
	* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
	* gas/i386/rdseed.s: Likewise.
	* gas/i386/rdseed.d: Likewise.
	* gas/i386/rdseed-intel.d: Likewise.
	* gas/i386/adx.s: Likewise.
	* gas/i386/adx.d: Likewise.
	* gas/i386/adx-intel.d: Likewise.
	* gas/i386/x86-64-rdseed.s: Likewise.
	* gas/i386/x86-64-rdseed.d: Likewise.
	* gas/i386/x86-64-rdseed-intel.d: Likewise.
	* gas/i386/x86-64-adx.s: Likewise.
	* gas/i386/x86-64-adx.d: Likewise.
	* gas/i386/x86-64-adx-intel.d: Likewise.

opcodes/

	* i386-dis.c (PREFIX_0F38F6): New.
	(prefix_table): Add adcx, adox instructions.
	(three_byte_table): Use PREFIX_0F38F6.
	(mod_table): Add rdseed instruction.
	* i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
	(cpu_flags): Likewise.
	* i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
	(i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
	* i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
	prefetchw.
	* i386-tbl.h: Regenerate.
	* i386-init.h: Likewise.
2012-07-16 12:58:29 +00:00
Roland McGrath
d416e51da0 gas/
* read.c [HANDLE_BUNDLE] (bundle_lock_depth): New variable.
	(read_a_source_file) [HANDLE_BUNDLE]: Reset it.
	[HANDLE_BUNDLE] (s_bundle_lock, s_bundle_unlock): Allow nested
	pairs.

gas/testsuite/
	* gas/i386/bundle-bad.s: Remove nested .bundle_lock case.
	* gas/i386/bundle-bad.l: Remove expected error line.
	* gas/i386/bundle-lock.s: Add nested .bundle_lock case.
	* gas/i386/bundle-lock.d: Update expectations.
2012-05-29 16:32:11 +00:00
Nick Clifton
7bfd842d05 * read.c (read_symbol_name): New function. Reads a symbol names.
Allows escape codes in names.
	(s_comm_internal): Use read_symbol_name.
	(s_globl, s_lsym, s_set, s_weakref): Likewise.
	* doc/as.texinfo: Document support for multibyte characters in
	symbol names.

	* gas/elf/syms.s: New test - checks the generation of multibyte
	symbol names.
	* gas/elf/syms.d: New file - expected readelf output.
	* gas/elf/elf.exp: Add syms.

	* readelf.c (print_symbol): Display multibyte characters in symbol
	names.
	(process_section_headers): Use print_symbol.

	* ld-ifunc/ifunc-13a-i386.s: Fix use of .global directive.
	* ld-ifunc/ifunc-15a-i385.s: Likewise.
2012-05-28 14:20:19 +00:00
Nick Clifton
df7b86aa4c PR 14072
* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: Generate an error if included before config.h.
	* alpha-opc.c: Include sysdep.h before any other header file.
	* alpha-dis.c: Likewise.
	* avr-dis.c: Likewise.
	* cgen-opc.c: Likewise.
	* cr16-dis.c: Likewise.
	* cris-dis.c: Likewise.
	* crx-dis.c: Likewise.
	* d10v-dis.c: Likewise.
	* d10v-opc.c: Likewise.
	* d30v-dis.c: Likewise.
	* d30v-opc.c: Likewise.
	* h8500-dis.c: Likewise.
	* i370-dis.c: Likewise.
	* i370-opc.c: Likewise.
	* m10200-dis.c: Likewise.
	* m10300-dis.c: Likewise.
	* micromips-opc.c: Likewise.
	* mips-opc.c: Likewise.
	* mips61-opc.c: Likewise.
	* moxie-dis.c: Likewise.
	* or32-opc.c: Likewise.
	* pj-dis.c: Likewise.
	* ppc-dis.c: Likewise.
	* ppc-opc.c: Likewise.
	* s390-dis.c: Likewise.
	* sh-dis.c: Likewise.
	* sh64-dis.c: Likewise.
	* sparc-dis.c: Likewise.
	* sparc-opc.c: Likewise.
	* spu-dis.c: Likewise.
	* tic30-dis.c: Likewise.
	* tic54x-dis.c: Likewise.
	* tic80-dis.c: Likewise.
	* tic80-opc.c: Likewise.
	* tilegx-dis.c: Likewise.
	* tilepro-dis.c: Likewise.
	* v850-dis.c: Likewise.
	* v850-opc.c: Likewise.
	* vax-dis.c: Likewise.
	* w65-dis.c: Likewise.
	* xgate-dis.c: Likewise.
	* xtensa-dis.c: Likewise.
	* rl78-decode.opc: Likewise.
	* rl78-decode.c: Regenerate.
	* rx-decode.opc: Likewise.
	* rx-decode.c: Regenerate.

	* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: Generate an error if included before config.h.

	* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.
	* aclocal.m4: Regenerate.
	* bfd-in.h: Generate an error if included before config.h.
	* sysdep.h: Likewise.
	* bfd-in2.h: Regenerate.
	* compress.c: Remove #include "config.h".
	* plugin.c: Likewise.
	* elf32-m68hc1x.c: Include sysdep.h before alloca-conf.h.
	* elf64-hppa.c: Likewise.
	* som.c: Likewise.
	* xsymc.c: Likewise.

	* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.

	* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.
	* aclocal.m4: Regenerate.
	* Makefile.am: Use wrappers around C files generated by flex.
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
	* itbl-lex-wrapper.c: New file.
	* config/bfin-lex-wrapper.c: New file.
	* cgen.c: Include as.h before setjmp.h.
	* config/tc-dlx.c: Include as.h before any other header.
	* config/tc-h8300.c: Likewise.
	* config/tc-lm32.c: Likewise.
	* config/tc-mep.c: Likewise.
	* config/tc-microblaze.c: Likewise.
	* config/tc-mmix.c: Likewise.
	* config/tc-msp430.c: Likewise.
	* config/tc-or32.c: Likewise.
	* config/tc-tic4x.c: Likewise.
	* config/tc-tic54x.c: Likewise.
	* config/tc-xtensa.c: Likewise.

	* configure.in: Add check that sysdep.h has been included before
	any system header files.
	* configure: Regenerate.
	* config.in: Regenerate.
	* unwind-ia64.h: Include config.h.
2012-05-17 15:13:28 +00:00
Nick Clifton
6927f98292 * config/tc-m68hc11.c: Add S12X and XGATE co-processor support.
Add option to offset S12 addresses into XGATE memory space.
	Tweak target flags to match other tools. (i.e. -m m68hc11).
	* doc/as.texinfo: Mention new options.
	* doc/c-m68hc11.texi: Document new options.
	* NEWS: Mention new support.

	* archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
	* config.bfd: Likewise.
	* cpu-m9s12x.c: New.
	* cpu-m9s12xg.c: New.
	* elf32-m68hc12.c: Add S12X and XGATE co-processor support.
	Add option to offset S12 addresses into XGATE memory space.
	Fix carry bug in IMM16 (IMM8 low/high) relocate.
	* Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
	(ALL_MACHINES_CFILES): Likewise.
	* reloc.c: Add S12X relocs.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

	* gas/m68hc11/insns9s12x.s: New
	* gas/m68hc11/insns9s12x.d: New
	* gas/m68hc11/hexprefix.s: New
	* gas/m68hc11/hexprefix.d: New
	* gas/m68hc11/9s12x-exg-sex-tfr.s: New
	* gas/m68hc11/9s12x-exg-sex-tfr.d: New
	* gas/m68hc11/insns9s12xg.s: New
	* gas/m68hc11/insns9s12xg.d: New
	* gas/m68hc11/9s12x-mov.s: New
	* gas/m68hc11/9s12x-mov.d: New
	* gas/m68hc11/m68hc11.exp: Updated
	* gas/m68hc11/*.d: Brought in line with changed objdump output.
	* gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3.
	* gas/elf/elf.exp: XFAIL all hc11/12 targets for redef.
	* gas/elf/dwarf2-1.d: Skip for hc11/12 targets.
	* gas/elf/dwarf2-2.d: Likewise.

	* ld-m68hc11/xgate-link.s: New.
	* ld-m68hc11/xgate-link.d: New.
	* ld-m68hc11/xgate-offset.s: New.
	* ld-m68hc11/xgate-offset.d: New.
	* ld-m68hc11/xgate1.s: New.
	* ld-m68hc11/xgate1.d: New.
	* ld-m68hc11/xgate2.s: New.
	* ld-m68hc11/m68hc11.exp: Updated.
	* ld-m68hc11/*.d: Brought in line with changed objdump output.
	* ld-gc/gc.exp: Update CFLAGS for m68hc11.
	* ld-plugin/plugin.exp: Likewise.
	* ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12.

	* configure.in: Add S12X and XGATE co-processor support to m68hc11
	target.
	* disassemble.c: Likewise.
	* configure: Regenerate.
	* m68hc11-dis.c: Make objdump output more consistent, use hex
	instead of decimal and use 0x prefix for hex.
	* m68hc11-opc.c: Add S12X and XGATE opcodes.
	* dis-asm.h (print_insn_m9s12x): Prototype.
	(print_insn_m9s12xg): Prototype.

	* m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10)
	R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations.
	(E_M68HC11_XGATE_RAMOFFSET): Define.

	* m68hc11.h: Add XGate definitions.
	(struct m68hc11_opcode): Add xg_mask field.
2012-05-15 12:55:51 +00:00
DJ Delorie
0e25bcb440 * config/tc-rx.c (rx_fetchalign): Declare.
(md_pseudo_table): Add .fetchalign.
(RX_NBASE_FETCHALIGN): New.
(fetchalign_bytes): New.
(rx_fetchalign): New.
(rx_frag_init): If a "magic" value is found, also init the
machine-specific data.
(md_assemble): Note following opcode size if called for.
(rx_next_opcode): New.
(rx_relax_frag): Support .fetchalign.
(md_convert_frag): Likewise.
* doc/c-rx.texi (RX-Directives): Add .fetchalign.
2012-05-15 03:04:47 +00:00
Nick Clifton
f6c1a2d592 Add support for Motorola XGATE embedded CPU 2012-05-03 13:12:08 +00:00
David S. Miller
2755f698e1 Document sparc's %l34 and %h34
gas/

	* doc/c-sparc.text: Document %l34 and %h34.
2012-04-27 20:45:23 +00:00
Maciej W. Rozycki
45e279f5d4 * doc/c-mips.texi (MIPS Opts): Correct -no-mfix-24k to
-mno-fix-24k.
2012-04-06 22:02:43 +00:00
Matthew Gretton-Dann
ce32bd10df 2012-03-29 Terry Guo <terry.guo@arm.com>
* gas/config/tc-arm.c (arm_cpus): Add cortex-m0plus.
	* gas/doc/c-arm.texi (ARM Options): Document -mcpu=cortex-m0plus.
2012-03-29 10:28:40 +00:00
Maxim Kuvyrkov
55a36193d8 gas/
* config/tc-mips.c (mips_cpu_info_table): Add entry for Broadcom XLP.
	* doc/c-mips.texi: Mention XLP.

	opcodes/
	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
2012-03-24 01:09:28 +00:00
Thomas Schwinge
32b9ff0d14 gas/
[SH] Support the .uaquad and .8byte directives also for non-sh64
	configurations.

	* config/tc-sh.c (sh_cons_fix_new, md_apply_fix) [!HAVE_SH64]: Handle
	BFD_RELOC_64.
	* doc/c-sh64.texi (SH64 Machine Directives): Move .uaquad
	description...
	* doc/c-sh.texi (SH Machine Directives): ... here.
2012-03-21 08:58:40 +00:00
Thomas Schwinge
27dcf5c00e gas/
* doc/as.texinfo (Bundle directives): Fix typo.
2012-03-15 11:19:13 +00:00
H.J. Lu
ec82c18e8a Replace @defn with @dfn
2012-03-14  Ryan Mansfield  <rmansfield@qnx.com>

	* doc/as.texinfo (Bundle directives): Replace @defn with @dfn.
2012-03-14 17:51:16 +00:00
Roland McGrath
fa94de6b5c gas/
2012-03-12  Roland McGrath  <mcgrathr@google.com>

	* config/tc-arm.c (arm_frag_max_var): New function.
	* config/tc-arm.h: Declare it.
	(md_frag_max_var): New macro.

	* config/tc-i386.c (i386_frag_max_var): New function.
	* config/tc-i386.h: Declare it.
	(md_frag_max_var): New macro.

	* doc/as.texinfo (Bundle directives): New node.
	(Pseudo Ops): Add it to the menu.
	* NEWS: Mention new feature.
	* read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro.
	[HANDLE_BUNDLE] (bundle_align_p2): New variable.
	[HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables.
	[HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle):
	New functions.
	(assemble_one): New function if [HANDLE_BUNDLE], #define directly
	to md_assembly if not.
	(read_a_source_file): Call assemble_one in place of md_assemble.
	(read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated
	.bundle_lock at end of processing.
	[HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock):
	New functions.
	[HANDLE_BUNDLE] (potable): Add their entries.
	* read.h: Declare new functions.

gas/testsuite/
2012-03-12  Roland McGrath  <mcgrathr@google.com>

	* gas/i386/bundle-bad.s: New file.
	* gas/i386/bundle-bad.d: New file.
	* gas/i386/bundle-bad.l: New file.
	* gas/i386/i386.exp: Run it.

	* gas/arm/bundle.s: New file.
	* gas/arm/bundle.d: New file.
	* gas/arm/bundle-lock.s: New file.
	* gas/arm/bundle-lock.d: New file.

	* gas/i386/bundle.s: New file.
	* gas/i386/bundle.d: New file.
	* gas/i386/x86-64-bundle.s: New file.
	* gas/i386/x86-64-bundle.d: New file.
	* gas/i386/bundle-lock.s: New file.
	* gas/i386/bundle-lock.d: New file.
	* gas/i386/i386.exp: Run them.
2012-03-13 16:59:57 +00:00
Alan Modra
aea77599d0 include/opcode/
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
opcodes/
	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	(PPCVEC2, PPCTMR, E6500): New short names.
	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	optional operands on sync instruction for E6500 target.
bfd/
	* archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (bfd_powerpc_archs): Add entryies for
	bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
gas/
	* config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500.
	(ppc_handle_align): Add termination nop opcode for e500mc family.
	* doc/as.texinfo: Document options -me5500 and -me6500.
	* doc/c-ppc.texi: Likewise.
gas/testsuite/
	* gas/ppc/e500mc64_nop.s: New test case for e500mc family
	termination nops.
	* gas/ppc/e500mc64_nop.d: Likewise.
	* gas/ppc/e5500_nop.s: Likewise.
	* gas/ppc/e5500_nop.d: Likewise.
	* gas/ppc/e6500_nop.s: Likewise.
	* gas/ppc/e6500_nop.d: Likewise.
	* gas/ppc/e6500.s: New.
	* gas/ppc/e6500.d: Likewise.
	* gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.
2012-03-09 23:39:06 +00:00
Walter Lee
6f7be9592d Improve TLS support on TILE-Gx/TILEPro:
- Add support for TLS LE references.
- Support linker optimization of TLS references.
- Delete relocations of GOT/tp relative offsets beyond 32-bits.

This brings binutils in line with the support expected in gcc 4.7, for
TILE-Gx/TILEPro.

bfd/
	* reloc.c: Add BFD_RELOC_TILEPRO_TLS_GD_CALL,
	BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD,
	BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD,
	BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD,
	BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD,
	BFD_RELOC_TILEPRO_TLS_IE_LOAD, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE,
	BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE,
	BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO,
	BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO,
	BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI,
	BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI,
	BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA,
	BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA,
	BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE,
	BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE,
	BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE,
	BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE,
	BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE,
	BFD_RELOC_TILEGX_TLS_GD_CALL, BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD,
	BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD,
	BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD,
	BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD, BFD_RELOC_TILEGX_TLS_IE_LOAD,
	BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD,
	BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD,
	BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD, BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD.
	Delete BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT,
	BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT,
	BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT,
	BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE.
	* elf32-tilepro.c (tilepro_elf_howto_table): Update tilepro
	relocations.
	(tilepro_reloc_map): Ditto.
	(tilepro_info_to_howto_rela): Ditto.
	(reloc_to_create_func): Ditto.
	(tilepro_tls_translate_to_le): New.
	(tilepro_tls_translate_to_ie): New.
	(tilepro_elf_tls_transition): New.
	(tilepro_elf_check_relocs): Handle new tls relocations.
	(tilepro_elf_gc_sweep_hook): Ditto.
	(allocate_dynrelocs): Ditto.
	(tilepro_elf_relocate_section): Ditto.
	(tilepro_replace_insn): New.
	(insn_mask_X1): New.
	(insn_mask_X0_no_dest_no_srca): New
	(insn_mask_X1_no_dest_no_srca): New
	(insn_mask_Y0_no_dest_no_srca): New
	(insn_mask_Y1_no_dest_no_srca): New
	(srca_mask_X0): New
	(srca_mask_X1): New
	(insn_tls_le_move_X1): New
	(insn_tls_le_move_zero_X0X1): New
	(insn_tls_ie_lw_X1): New
	(insn_tls_ie_add_X0X1): New
	(insn_tls_ie_add_Y0Y1): New
	(insn_tls_gd_add_X0X1): New
	(insn_tls_gd_add_Y0Y1): New
	* elfxx-tilegx.c (tilegx_elf_howto_table): Update tilegx
	relocations.
	(tilegx_reloc_map): Ditto.
	(tilegx_info_to_howto_rela): Ditto.
	(reloc_to_create_func): Ditto.
	(tilegx_elf_link_hash_table): New field disable_le_transition.
	(tilegx_tls_translate_to_le): New.
	(tilegx_tls_translate_to_ie): New.
	(tilegx_elf_tls_transition): New.
	(tilegx_elf_check_relocs): Handle new tls relocations.
	(tilegx_elf_gc_sweep_hook): Ditto.
	(allocate_dynrelocs): Ditto.
	(tilegx_elf_relocate_section): Ditto.
	(tilegx_copy_bits): New.
	(tilegx_replace_insn): New.
	(insn_mask_X1): New.
	(insn_mask_X0_no_dest_no_srca): New.
	(insn_mask_X1_no_dest_no_srca): New.
	(insn_mask_Y0_no_dest_no_srca): New.
	(insn_mask_Y1_no_dest_no_srca): New.
	(insn_mask_X0_no_operand): New.
	(insn_mask_X1_no_operand): New.
	(insn_mask_Y0_no_operand): New.
	(insn_mask_Y1_no_operand): New.
	(insn_tls_ie_ld_X1): New.
	(insn_tls_ie_ld4s_X1): New.
	(insn_tls_ie_add_X0X1): New.
	(insn_tls_ie_add_Y0Y1): New.
	(insn_tls_ie_addx_X0X1): New.
	(insn_tls_ie_addx_Y0Y1): New.
	(insn_tls_gd_add_X0X1): New.
	(insn_tls_gd_add_Y0Y1): New.
	(insn_move_X0X1): New.
	(insn_move_Y0Y1): New.
	(insn_add_X0X1): New.
	(insn_add_Y0Y1): New.
	(insn_addx_X0X1): New.
	(insn_addx_Y0Y1): New.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.

gas/
	* tc-tilepro.c (O_tls_le): Define operator.
	(O_tls_le_lo16): Ditto.
	(O_tls_le_hi16): Ditto.
	(O_tls_le_ha16): Ditto.
	(O_tls_gd_call): Ditto.
	(O_tls_gd_add): Ditto.
	(O_tls_ie_load): Ditto.
	(md_begin): Delete old operators; handle new operators.
	(emit_tilepro_instruction): Ditto.
	(md_apply_fix): Ditto.
	* tc-tilegx.c (O_hw1_got): Delete operator.
	(O_hw2_got): Ditto.
	(O_hw3_got): Ditto.
	(O_hw2_last_got): Ditto.
	(O_hw1_tls_gd): Ditto.
	(O_hw2_tls_gd): Ditto.
	(O_hw3_tls_gd): Ditto.
	(O_hw2_last_tls_gd): Ditto.
	(O_hw1_tls_ie): Ditto.
	(O_hw2_tls_ie): Ditto.
	(O_hw3_tls_ie): Ditto.
	(O_hw2_last_tls_ie): Ditto.
	(O_hw0_tls_le): Define operator.
	(O_hw0_last_tls_le): Ditto.
	(O_hw1_last_tls_le): Ditto.
	(O_tls_gd_call): Ditto.
	(O_tls_gd_add): Ditto.
	(O_tls_ie_load): Ditto.
	(O_tls_add): Ditto.
	(md_begin): Delete old operators; handle new operators.
	(emit_tilegx_instruction): Ditto.
	(md_apply_fix): Ditto.
	* doc/c-tilegx.texi: Delete old operators; document new operators.
	* doc/c-tilepro.texi: Ditto.

include/elf/
	* tilegx.h (R_TILEGX_IMM16_X0_HW1_GOT): Delete.
	(R_TILEGX_IMM16_X1_HW1_GOT): Ditto.
	(R_TILEGX_IMM16_X0_HW2_GOT): Ditto.
	(R_TILEGX_IMM16_X1_HW2_GOT): Ditto.
	(R_TILEGX_IMM16_X0_HW3_GOT): Ditto.
	(R_TILEGX_IMM16_X1_HW3_GOT): Ditto.
	(R_TILEGX_IMM16_X0_HW2_LAST_GOT): Ditto.
	(R_TILEGX_IMM16_X1_HW2_LAST_GOT): Ditto.
	(R_TILEGX_IMM16_X0_HW1_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X1_HW1_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X0_HW2_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X1_HW2_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X0_HW3_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X1_HW3_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X0_HW1_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X1_HW1_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X0_HW2_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X1_HW2_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X0_HW3_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X1_HW3_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X0_HW0_TLS_LE): New relocation.
	(R_TILEGX_IMM16_X1_HW0_TLS_LE): Ditto.
	(R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE): Ditto.
	(R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE): Ditto.
	(R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE): Ditto.
	(R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE): Ditto.
	(R_TILEGX_TLS_GD_CALL): Ditto.
	(R_TILEGX_IMM8_X0_TLS_GD_ADD): Ditto.
	(R_TILEGX_IMM8_X1_TLS_GD_ADD): Ditto.
	(R_TILEGX_IMM8_Y0_TLS_GD_ADD): Ditto.
	(R_TILEGX_IMM8_Y1_TLS_GD_ADD): Ditto.
	(R_TILEGX_TLS_IE_LOAD): Ditto.
	(R_TILEGX_IMM8_X0_TLS_ADD): Ditto.
	(R_TILEGX_IMM8_X1_TLS_ADD): Ditto.
	(R_TILEGX_IMM8_Y0_TLS_ADD): Ditto.
	(R_TILEGX_IMM8_Y1_TLS_ADD): Ditto.
	* tilepro.h (R_TILEPRO_TLS_GD_CALL): New relocation.
	(R_TILEPRO_IMM8_X0_TLS_GD_ADD): Ditto.
	(R_TILEPRO_IMM8_X1_TLS_GD_ADD): Ditto.
	(R_TILEPRO_IMM8_Y0_TLS_GD_ADD): Ditto.
	(R_TILEPRO_IMM8_Y1_TLS_GD_ADD): Ditto.
	(R_TILEPRO_TLS_IE_LOAD): Ditto.
	(R_TILEPRO_IMM16_X0_TLS_LE): Ditto.
	(R_TILEPRO_IMM16_X1_TLS_LE): Ditto.
	(R_TILEPRO_IMM16_X0_TLS_LE_LO): Ditto.
	(R_TILEPRO_IMM16_X1_TLS_LE_LO): Ditto.
	(R_TILEPRO_IMM16_X0_TLS_LE_HI): Ditto.
	(R_TILEPRO_IMM16_X1_TLS_LE_HI): Ditto.
	(R_TILEPRO_IMM16_X0_TLS_LE_HA): Ditto.
	(R_TILEPRO_IMM16_X1_TLS_LE_HA): Ditto.

include/opcode/
	* tilegx.h (tilegx_mnemonic): Add TILEGX_OPC_LD4S_TLS,
	TILEGX_OPC_LD_TLS.
	* tilepro.h (tilepro_mnemonic): Add TILEPRO_OPC_LW_TLS,
	TILEPRO_OPC_LW_TLS_SN.

opcodes/
	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	TILEPRO_OPC_LW_TLS_SN.
2012-02-25 22:24:21 +00:00
Walter Lee
fb6ceddedd Add big-endian support for tilegx.
bfd/
	* config.bfd (tilegx-*-*): rename little endian vector; add big
	endian vector.
	(tilegxbe-*-*): New case.
	* configure.in (bfd_elf32_tilegx_vec): Rename...
	(bfd_elf32_tilegx_le_vec): ... to this.
	(bfd_elf32_tilegx_be_vec): New vector.
	(bfd_elf64_tilegx_vec): Rename...
	(bfd_elf64_tilegx_le_vec): ... to this.
	(bfd_elf64_tilegx_be_vec): New vector.
	* configure: Regenerate.
	* elf32-tilegx.c (TARGET_LITTLE_SYM): Rename.
	(TARGET_LITTLE_NAME): Ditto.
	(TARGET_BIG_SYM): Define.
	(TARGET_BIG_NAME): Define.
	* elf64-tilegx.c (TARGET_LITTLE_SYM): Rename.
	(TARGET_LITTLE_NAME): Ditto.
	(TARGET_BIG_SYM): Define.
	(TARGET_BIG_NAME): Define.
	* targets.c (bfd_elf32_tilegx_vec): Rename...
	(bfd_elf32_tilegx_le_vec): ... to this.
	(bfd_elf32_tilegx_be_vec): Declare.
	(bfd_elf64_tilegx_vec): Rename...
	(bfd_elf64_tilegx_le_vec): ... to this.
	(bfd_elf64_tilegx_be_vec): Declare.
	(_bfd_target_vector): Add / rename above vectors.

binutils/testsuite/
	* binutils-all/objdump.exp (cpus_expected): Add tilegx.

gas/
	* tc-tilegx.c (tilegx_target_format): Handle big endian.
	(OPTION_EB): Define.
	(OPTION_EL): Define.
	(md_longopts): Add entries for "EB" and "EL".
	(md_parse_option): Handle OPTION_EB and OPTION_EL.
	(md_show_usage): Add -EB and -EL.
	(md_number_to_chars): New.
	* tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with
	ifndef.
	(md_number_to_chars): Delete.
	* configure.tgt (tilegx*be): Handle.
	* doc/as.texinfo [TILE-Gx]: Document -EB and -EL.
	* doc/c-tilegx.texi: Ditto.

ld/
	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx_be.c.
	(ALL_64_EMULATION_SOURCES): Add eelf64tilegx_be.c.
	(eelf32tilegx_be.c): Add rule to build this file.
	(eelf64tilegx_be.c): Ditto.
	* Makefile.in: Regenerate.
	* configure.tgt (tilegx-*-*): Support big endian.
	(tilegxbe-*-*): New.
	* emulparams/elf32tilegx.sh (OUTPUT_FORMAT): Rename.
	(BIG_OUTPUT_FORMAT): Define.
	(LITTLE_OUTPUT_FORMAT): Define.
	* emulparams/elf32tilegx_be.sh: New.
	* emulparams/elf64tilegx.sh (OUTPUT_FORMAT): Rename.
	(BIG_OUTPUT_FORMAT): Define.
	(LITTLE_OUTPUT_FORMAT): Define.
	* emulparams/elf64tilegx_be.sh: New.

ld/testsuite/
	* ld-tilegx/reloc-be.d: New.
	* ld-tilegx/reloc-le.d: New.
	* ld-tilegx/reloc.d: Delete.
	* ld-tilegx/tilegx.exp: Test big and little endian.
2012-02-25 19:51:34 +00:00
H.J. Lu
42164a7195 Implement Intel Transactional Synchronization Extensions
gas/

2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (HLE_PREFIX): New.
	(check_hle): Likewise.
	(_i386_insn): Add have_hle.
	(cpu_arch): Add .hle and .rtm.
	(md_assemble): Call check_hle if i.have_hle isn't zero.
	(parse_insn): Set i.have_hle to 1 for HLE prefix.
	(output_jump): Support up to 2 byte opcode.

	* doc/c-i386.texi: Document hle/.hle and rtm/.rtm.

gas/testsuite/

2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/hle-intel.d: New.
	* gas/i386/hle.d: Likewise.
	* gas/i386/hle.s: Likewise.
	* gas/i386/hlebad.l: Likewise.
	* gas/i386/hlebad.s: Likewise.
	* gas/i386/rtm-intel.d: Likewise.
	* gas/i386/rtm.d: Likewise.
	* gas/i386/rtm.s: Likewise.
	* gas/i386/x86-64-hle-intel.d: Likewise.
	* gas/i386/x86-64-hle.d: Likewise.
	* gas/i386/x86-64-hle.s: Likewise.
	* gas/i386/x86-64-hlebad.l: Likewise.
	* gas/i386/x86-64-hlebad.s: Likewise.
	* gas/i386/x86-64-rtm-intel.d: Likewise.
	* gas/i386/x86-64-rtm.d: Likewise.
	* gas/i386/x86-64-rtm.s: Likewise.

	* gas/i386/i386.exp: Run hle, hle-intel, hlebad x86-64-hle, rtm,
	rtm-intel, x86-64-hle-intel, x86-64-hlebad, x86-64-rtm and
	x86-64-rtm-intel.

include/opcode/

2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (XACQUIRE_PREFIX_OPCODE): New.
	(XRELEASE_PREFIX_OPCODE): Likewise.

opcodes/

2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (HLE_Fixup1): New.
	(HLE_Fixup2): Likewise.
	(HLE_Fixup3): Likewise.
	(Ebh1): Likewise.
	(Evh1): Likewise.
	(Ebh2): Likewise.
	(Evh2): Likewise.
	(Ebh3): Likewise.
	(Evh3): Likewise.
	(MOD_C6_REG_7): Likewise.
	(MOD_C7_REG_7): Likewise.
	(RM_C6_REG_7): Likewise.
	(RM_C7_REG_7): Likewise.
	(XACQUIRE_PREFIX): Likewise.
	(XRELEASE_PREFIX): Likewise.
	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
	MOD_C6_REG_7 and MOD_C7_REG_7.
	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
	xtest.
	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.

	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	CPU_RTM_FLAGS.
	(cpu_flags): Add CpuHLE and CpuRTM.
	(opcode_modifiers): Add HLEPrefixOk.

	* i386-opc.h (CpuHLE): New.
	(CpuRTM): Likewise.
	(HLEPrefixOk): Likewise.
	(i386_cpu_flags): Add cpuhle and cpurtm.
	(i386_opcode_modifier): Add hleprefixok.

	* i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
	operand.  Add xacquire, xrelease, xabort, xbegin, xend and
	xtest.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2012-02-08 18:20:41 +00:00