Changed to not actually build the external symbol information, as
that is now done by the ECOFF back end.
(ecoff_build_debug): Changed accordingly.
* ecoff.h (obj_ecoff_set_ext): Declare. obj-format.c function
called by ecoff_setup_ext.
* config/obj-ecoff.c (ecoff_frob_file): If debug_info count is 0,
set corresponding pointer to NULL. Don't set raw_size and
raw_syments.
(obj_ecoff_set_sym_index): Removed.
(obj_ecoff_set_ext): New function.
* config/obj-ecoff.h (obj_set_sym_index): Don't define.
(obj_ecoff_set_sym_index): Don't declare.
* config/obj-elf.c (obj_ecoff_set_ext, elf_get_extr,
elf_set_index): New functions used for ECOFF_DEBUGGING.
(elf_frob_file): Reworked ECOFF debug generation to use
new functions in bfd/ecofflink.c.
OBJ_ECOFF in many cases.
(mips_any_noreorder): New variable.
(mips_cprestore_offset): Initialize to -1.
(mips_frame_reg): New variable.
(RELAX_ENCODE, RELAX_OLD, RELAX_NEW, RELAX_RELOC1,
RELAX_RELOC2, RELAX_RELOC3, RELAX_WARN): New macros.
(md_pseudo_table): Handle "gpword" and "cpadd".
(md_begin): Initialize ok to false. If OBJ_ELF, set alignment
of text, data and bss sections to 4. Set alignment of
.reginfo section to 2. If ECOFF_DEBUGGING, create .mdebug
section.
(ALIGN_ERR, ALIGN_ERR2): Removed unused and useless alignment
check.
(append_insn, macro_build, macro_build_lui): Take place
argument. Changed all callers.
(append_insn): If appending a nop, don't emit one.
(macro_build): Changed assertion for 'i', 'j', 'o' case.
(gp_reference): Removed.
(load_address): New function.
(macro): If mips_noreorder is used, set mips_any_noreorder.
Extensive changes to handle GP and PIC symbols differently.
Build both possible code choices using a variant frag, and
make a final decision at the end of assembly when all
information is known. Added PIC support for all symbol
references.
(mips_ip): Don't permit anything but a number after $ for a
coprocessor register. Don't use .lit4 or .lit8 sections when
generating PIC code. If OBJ_ELF, set alignment of .lit4 or
.lit8 section to 4.
(md_apply_fix): Accept and ignore GOT16 and GPREL32 relocs.
(s_change_sec): Set alignment of ELF .rodata or .sdata section
to 4.
(s_mipsset): If .set noreorder, set mips_any_noreorder.
(s_cpload): Ignore .cpload if not generating PIC code. Warn
if .cpload is not in noreorder section.
(s_cprestore): Ignore .cprestore if not generating PIC code.
(s_gpword, s_cpadd): New functions.
(tc_get_register): Added frame argument; if true, set
mips_frame_reg to return value. Changed all callers.
(md_estimate_size_before_relax): Don't error out, but instead
determine how much a frag should grow.
(tc_gen_reloc): Return multiple relocs if appropriate, as
determined by md_estimate_size_before_relax.
(md_convert_frag): New function.
(mips_elf_final_processing): Set ELF header flags based on
mips_any_noreorder and mips_pic.
* config/tc-mips.h (RELOC_EXPANSION_POSSIBLE): Define.
(MAX_RELOC_EXPANSION): Define to be 3.
(md_relax_frag): Define to be 0.
(md_convert_frag): Don't define.
(tc_get_register): Changed declaration.
(relax_segment): If md_relax_frag is defined, use it to handle a
frag of type rs_machine_dependent rather than looking through
md_relax_table.
* write.c (relax_and_size_seg): Don't set SEC_HAS_CONTENTS for a
bss section. Set SEC_RELOC if there are any relocations, even for
a zero size section.
* write.c (write_relocs): In RELOC_EXPANSION_POSSIBLE case, based
data offset on reloc[0]->address rather than reloc[j]->address, so
that multiple relocs can affect different memory locations.
* write.c (chain_frchains_together, relax_and_size_seg,
adjust_reloc_syms, write_relocs): Make third argument PTR, not
char *, to match definition of bfd_map_over_sections.
do a continue to go on to the next line rather than a break.
Removed duplicate bad pseudo-op code which was never executed.
* read.c (s_lcomm): Do not require a comma after the name.
* read.c (s_lcomm): Set bss flag for .sbss section if used.
field selector, rather than an int. All uses of field selectors
fixed.
(tc_gen_reloc): For SOM PLABELs, always set addend to zero for now.
(md_apply_fix_1): Do not call hppa_field_adjust for any PLABEL
field.
Accept new argument "is_export". All callers changed. When
processing a .export directive for a function, do not allow
the user to set the type to "CODE", instead warn and set the
type to "ENTRY".
* config/tc-hppa.c (pa_get_absolute_expression): Accept pointer to
insn structure as an argument, and a pointer to a string. All
callers changed. Always read any field selector here. Call
evaluate absolute to get a return value.
(evaluate_absolute): Addept pointer to insn structure as its
argument. All callers changed.
(INSERT_FIELD_AND_CONTINUE): New macro for inserting a bitfield
into an instruction and continuing the main pa_ip loop.
(CHECK_FIELD): New macro for simple range checking of fields.
(pa_ip): Delete unused variables. Use INSERT_FIELD_AND_CONTINUE
and CHECK_FIELD. All immediate fields now pass through
pa_get_absolute_expression which will also handle field selectors.
Delete dead code. Simplify.
(md_apply_fix_1): Use CHECK_FIELD to verify any fixes that are
applied are in range. Use bfd_put_32 rather than inserting each
byte of the fixed instrution into the buffer ourselves.
it was PA specific and is no longer needed (it's now handled
within the PA backend).
* config/tc-hppa.h (SEG_DIFF_ALLOWED): Delete definition.
* config/tc-hppa.c (fix_new_hppa): If the subtract symbol for
a fixup is $global$ change it to NULL as $global$ is really only
needed long enough to determine the base type of relocation to use.
* config/tc-hppa.c (fix_new_hppa): If the subtract symbol for
a fixup is $global$ change it to NULL as $global$ is really only
needed long enough to determine the base type of relocation to use.
predefined register table.
(pa_parse_number): Handle %rp in common register shortcut code.
Consistently set return value to -1 for an error. Clean up error
messages and only print them when "print_errors" is true. Handle
empty string case like the HP assembler -- assume a value of
zero.
