Commit graph

3 commits

Author SHA1 Message Date
Andrew Cagney
60f9cd07d0 For vr* processors start using vr.igen.
Sanitize out README.Cygnus.
1998-07-25 07:49:29 +00:00
Andrew Cagney
13151a934d Document existence of old (gencode) and new (igen) MIPS ISA simulators. 1998-01-16 01:09:15 +00:00
Jackie Smith Cashion
8ad5773724 Initial check-in of the MIPS simulator. Work still needs to be done on
the run-time support code (interp.c) to provide better tracing, and
also to add profiling and architecture specific support. At the moment
the simulator has a fixed size, fixed address memory area, and
simulates a subset of the IDT monitor calls (enough to execute test
programs).

The other major feature (could even be a bug) is that the simulator
makes use of the GCC "long long" extension. Work has been started to
make this a build configuration option... but there is still a lot of
this to be done.
1995-11-08 15:44:38 +00:00