Commit graph

372 commits

Author SHA1 Message Date
Stu Grossman
1852b017b8 * Makefile.in erc32/Makefile.in: Don't set srcroot. This should
be inherited from the parent.  Remove INSTALL_XFORM and
	INSTALL_XFORM1.  Make INSTALL be set from configure.
1996-09-05 01:16:22 +00:00
Ian Lance Taylor
68867afb88 * configure.in: Only build the MIPS simulator if we are using
gcc.
	* configure: Rebuild.
1996-09-04 19:50:55 +00:00
Michael Meissner
9b86c7e2e2 Second pass at canadian cross 1996-09-04 19:11:53 +00:00
Michael Meissner
1eaaf3050e First cut at dealing with canadian crosses; make -t in debugger set d10v_debug if DEBUG 1996-09-04 18:50:13 +00:00
Michael Meissner
7eebfc6296 More debug support; Enable -t/-v to work correctly; Add --enable-sim-cflags configure switch 1996-09-04 17:42:51 +00:00
Michael Meissner
87178dbdf7 Enhance debug support 1996-09-04 15:41:43 +00:00
Mark Alexander
8719be26c4 * simops.c: Include correct syscall.h for d10v, not host's.
Fix #ifdef SYS_stat.
1996-09-04 11:51:06 +00:00
Jeff Law
9fca2fd3c6 * gencode.c: Fix various indention & style problems.
Remove test code.  Remove #if 0 code.
        * interp.c: Provide prototypes for all static functions.
        Fix minor indention problems.
        (sim_open, sim_resume): Remove unused variables.
        (sim_read): Return type is "int".
        * simops.c: Remove unused variables.
        (divh): Make result of divide-by-zero zero.
        (setf): Initialize result to keep compiler quiet.
        (sar instructions): These just clear the overflow bit.
        * v850_sim.h: Provide prototypes for put_byte, put_half
        and put_word.
Cleaning up.
1996-09-03 18:31:48 +00:00
Michael Meissner
63a91cfb9d Portability fixes; re-add printf/putchar traps 1996-09-03 18:01:03 +00:00
Jeff Law
2b6b2c6d8e Fix typpppo 1996-09-03 17:15:16 +00:00
Jeff Law
d81352b8b8 * interp.c: OP should be an array of 32bit operands!
(v850_callback): Declare.
        (do_format_5): Fix extraction of OP[0].
        (sim_size): Remove debugging printf.
        (sim_set_callbacks): Do something useful.
        (sim_stop_reason): Gross hacks to get c-torture running.
        * simops.c: Simplify code for computing targets of bCC
        insns.   Invert 's' bit if 'ov' bit is set for some
        instructions.  Fix 'cy' bit handling for numerous
        instructions.  Make the simulator stop when a halt
        instruction is encountered.  Very crude support for
        emulated syscalls (trap 0).
        * v850_sim.h: Include "callback.h" and declare
        v850_callback.  Items in the operand array are 32bits.
Fixes & syscall stuff.
1996-09-03 16:25:51 +00:00
Jeff Law
82feb39ed1 Opps. Forgot to commit this a few days ago. 1996-08-31 02:49:05 +00:00
Jeff Law
787d66bb4d * simops.c: Fix "not1" and "set1". 1996-08-30 21:55:26 +00:00
Jeff Law
3046d87986 * simops.c: Don't forget to initialize temp for
"ld.h" and "ld.w"
1996-08-30 20:15:51 +00:00
Jeff Law
ba853302f2 * interp.c: Remove various debugging printfs. 1996-08-30 16:42:49 +00:00
Jeff Law
0e4ccc58f2 * simops.c: Fix satadd, satsub boundary case handling. 1996-08-30 16:41:39 +00:00
Jeff Law
83fc3bac9f * interp.c (hash): Fix.
* interp.c (do_format_8): Get operands correctly and
        call the target function.
        * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
1996-08-30 16:35:10 +00:00
Jeff Law
3cb6bf7818 * interp.c (do_format_4): Get operands correctly and
call the target function.
        * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
        "sst.h", and "sst.w".
1996-08-30 05:49:07 +00:00
Jeff Law
28647e4c0c * v850_sim.h: The V850 doesn't have split I&D spaces. Change
accordingly.  Remove many unused definitions.
        * interp.c: The V850 doesn't have split I&D spaces.  Change
        accordingly.
        (get_longlong, get_longword, get_word): Deleted.
        (write_longlong, write_longword, write_word): Deleted.
        (get_operands): Deleted.
        (get_byte, get_half, get_word): New functions.
        (put_byte, put_half, put_word): New functions.
        * simops.c: Remove unused functions.  Rough cut at
        "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
1996-08-30 05:41:10 +00:00
Jeff Law
614f1c68ed * v850_sim.h (struct _state): Remove "psw" field. Add
"sregs" field.
        (PSW): Remove bogus definition.
        * simops.c: Change condition code handling to use the psw
        register within the sregs array.  Handle "ldsr" and "stsr".
1996-08-30 05:09:08 +00:00
Jeff Law
dca41ba76b * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr". 1996-08-30 04:59:02 +00:00
Jeff Law
e9b6cbaca5 * interp.c (do_format_5): Get operands correctly and
call the target function.
        (sim_resume): Don't do a PC update for format 5 instructions.
        * simops.c: Handle "jarl" and "jmp" instructions.
1996-08-30 04:27:48 +00:00
Jeff Law
3095b8dfc5 * simops.c: Fix minor typos. Handle "cmp", "setf", "tst"
"di", and "ei" instructions correctly.
1996-08-30 04:11:32 +00:00
Jeff Law
2108e86459 * interp.c (do_format_3): Get operands correctly and call
the target function.
        * simops.c: Handle bCC instructions.
1996-08-30 03:48:13 +00:00
Jeff Law
35404c7d07 * simops.c: Add condition code handling to shift insns.
Fix minor typos in condition code handling for other insns.
1996-08-30 03:23:36 +00:00
Jeff Law
aabce0f46c * Makefile.in: Fix typo.
* simops.c: Add condition code handling to "sub" "subr" and
        "divh" instructions.
1996-08-30 03:07:24 +00:00
Jeff Law
0ef0eba580 * interp.c (hash): Update to be more accurate.
(lookup_hash): Call hash rather than computing the hash
        code here.
        (do_format_1_2): Handle format 1 and format 2 instructions.
        Get operands correctly and call the target function.
        (do_format_6): Get operands correctly and call the target
        function.
        (do_formats_9_10): Rough cut so shift ops will work.
        (sim_resume): Tweak to deal with format 1 and format 2
        handling in a single funtion.  Don't update the PC
        for format 3 insns.  Fix typos.
        * simops.c: Slightly reorganize.  Add condition code handling
        to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
        and "not" instructions.
        * v850_sim.h (reg_t): Registers are 32bits.
        (_state): The V850 has 32 general registers.  Add a 32bit
        psw and pc register too.  Add accessor macros
Fixing lots of stuff.  Starting to add condition code support.  Basically
check pointing the work to date.
1996-08-29 23:39:23 +00:00
Jeff Law
775533747d * simops.c: Add shift support. 1996-08-29 22:29:41 +00:00
Jeff Law
fb8eb42bd6 Fix typos in multiply and divide code. 1996-08-29 22:05:15 +00:00
Jeff Law
e98e3b2c5a * simops.c: Add multiply & divide support. Abort for system
instructions.
1996-08-29 20:08:37 +00:00
Jeff Law
1fe983dcdf * simops.c: Add logicals, mov, movhi, movea, add, addi, sub
and subr.  No condition codes yet.
1996-08-29 19:53:37 +00:00
Jeff Law
22c1c7ddea * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
gencode.c, interp.c, simops.c: Created.
So we've got something to hack on.
1996-08-29 01:06:42 +00:00
Jeff Law
085114ca36 * configure.in (v850-*-*): Added V850 simulator. 1996-08-29 01:05:40 +00:00
Martin Hunt
d70b4d426b Wed Aug 28 17:33:19 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* Makefile.in, d10v_sim.h, interp.c: Fix byte-order problems.
1996-08-29 00:35:11 +00:00
Martin Hunt
166acb9f8f New file. 1996-08-28 18:09:06 +00:00
Martin Hunt
4f425a3203 Mon Aug 26 18:30:28 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v_sim.h (SEXT32): Added.
	* interp.c: Commented out printfs.
	* simops.c:  Fixed error in sb and st2w.
1996-08-27 01:32:48 +00:00
Ian Lance Taylor
64d538ce80 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
getopt1.o, rather than on gencode.c.  Link objects together.
	Don't link against -liberty.
	(gencode.o, getopt.o, getopt1.o): New targets.
	* gencode.c: Include <ctype.h> and "ansidecl.h".
	(AND): Undefine after including "ansidecl.h".
	(ULONG_MAX): Define if not defined.
	(OP_*): Don't define macros; now defined in opcode/mips.h.
	(main): Call my_strtoul rather than strtoul.
	(my_strtoul): New static function.
1996-08-22 22:06:21 +00:00
Michael Meissner
ca78464476 Fixes from Andrew 1996-08-19 22:21:19 +00:00
Angela Marie Thomas
e1fcafd594 removed NOTES from Things-to-keep since it's a dead file 1996-08-18 21:28:18 +00:00
Michael Meissner
83a650d857 Improve -t options support to list all of the configuration macros & work standalone 1996-08-13 17:29:04 +00:00
Michael Meissner
9aecf50da5 Test whether /dev/zero works before attemping to us it 1996-08-12 23:06:21 +00:00
Martin Hunt
f45dceb998 fix for D10V. 1996-08-12 18:04:58 +00:00
Michael Meissner
7b25dea587 If HAVE_TERMOS_STRUCTURE is not defined, make sure HAVE_TCGETATTR is also not defined. 1996-08-08 00:17:48 +00:00
Michael Meissner
def7f77515 Allow simulator to build on other machines than x86 1996-08-07 18:48:07 +00:00
Michael Meissner
2e913166b1 7/30 release from Andrew 1996-08-06 15:55:32 +00:00
Martin Hunt
4c38885c86 Fri Aug 2 17:44:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v_sim.h, simops.c: Snapshot
1996-08-03 00:45:58 +00:00
Martin Hunt
2934d1c925 Thu Aug 1 17:05:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* ChangeLog, Makefile.in, configure, configure.in, d10v_sim.h,
	gencode.c, interp.c, simops.c: Created.
1996-08-02 00:23:31 +00:00
Martin Hunt
745a0437db Thu Aug 1 17:08:41 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* configure.in (d10v-*-*): Added D10V simulator.
1996-08-02 00:22:58 +00:00
Michael Meissner
30c87b55ec New simulator changes from Andrew 1996-07-23 15:42:42 +00:00
Stu Grossman
4fa14cf71c * gencode.c (process_instructions): Generate word64 and uword64
instead of `long long' and `unsigned long long' data types.
	* interp.c:  #include sysdep.h to get signals, and define default
	for SIGBUS.
	* (Convert):  Work around for Visual-C++ compiler bug with type
	conversion.
	* support.h:  Make things compile under Visual-C++ by using
	__int64 instead of `long long'.  Change many refs to long long
	into word64/uword64 typedefs.
1996-07-18 01:21:16 +00:00