* archures.c (bfd_mach_i386_nacl, bfd_mach_i386_i386_nacl): New macros.
(bfd_mach_x86_64_nacl, bfd_mach_x64_32_nacl): New macros.
* cpu-i386.c (bfd_arch_i386_onebyte_nop_fill): New function.
(bfd_i386_nacl_arch): New variable.
(bfd_x86_64_nacl_arch, bfd_x64_32_nacl_arch): New variables.
(bfd_x64_32_arch_intel_syntax): Link them into the list.
* bfd-in2.h: Regenerate.
ld/
* emulparams/elf_i386_nacl.sh (ARCH): Set to i386:nacl.
* emulparams/elf_x86_64_nacl.sh (ARCH): Set to i386:x86-64:nacl.
* emulparams/elf32_x86_64_nacl.sh (ARCH): Set to i386:x64-32:nacl.
ld/testsuite/
* ld-x86-64/x86-64.exp (Mixed x86_64 and i386 input test 1):
Loosen string match to admit i386:x86-64*.
(Mixed x86_64 and i386 input test 2): Likewise.
* ld-x86-64/ilp32-2.d: Likewise.
* ld-x86-64/ilp32-3.d: Likewise.
* ld-x86-64/lp64-2.d: Likewise.
* ld-x86-64/lp64-3.d: Likewise.
* ld-x86-64/ia32-2.d: Likewise, and i386.* too.
* ld-x86-64/ia32-3.d: Likewise.
* elf-nacl.c (nacl_modify_segment_map): Fix logic reordering the
elf_segment_map list. If an executable segment is page-aligned
but does not end with a full page, then append a fake section into
the segment map entry that pads out the page.
(nacl_final_write_processing): New function. Write the code fill
laid out in nacl_modify_segment_map.
* elf-nacl.h: Declare it.
* elf32-arm.c (elf32_arm_nacl_final_write_processing): New function.
(elf_backend_final_write_processing): Define it for NaCl backend.
* elf32-i386.c (elf_backend_final_write_processing): Likewise.
* elf64-x86-64.c (elf_backend_final_write_processing): Likewise.
* elf-nacl.c (segment_eligible_for_headers): Rename MAXPAGESIZE
parameter to MINPAGESIZE.
(nacl_modify_segment_map): Use minpagesize instead of maxpagesize.
* elf32-arm.c (ELF_MINPAGESIZE, ELF_COMMONPAGESIZE): Set to
0x10000 for NaCl targets.
ld/testsuite/
* ld-x86-64/ilp32-4-nacl.d: Loosen .shstrtab line regexp to match
any file offset.
* ld-x86-64/tlsbin-nacl.rd: Update expected code segment PT_LOAD.
* ld-x86-64/tlsbindesc-nacl.rd: Likewise.
* ld-scripts/rgn-at3.d: XFAIL for *-*-nacl* targets.
* ld-scripts/rgn-over8-ok.d: Likewise.
explicit patterns for test target qualification. Define extra
tool flags for *-*-hpux* and tic6x-*-* targets. Link with a
linker script. Use alternative patterns for targets that do not
eliminate copy relocs, currently mn10300-*-* and vax-*-*.
* ld-elf/comm-data2.s: Handle HPUX's `.comm' syntax.
* ld-elf/comm-data2.ld: New test linker script.
* ld-elf/comm-data2.xd: Match section's VMA too. Ignore ASCII
data dump.
* ld-elf/comm-data2r.rd: New test pattern.
* ld-elf/comm-data2r.sd: New test pattern.
* ld-elf/comm-data2r.xd: New test pattern.
* ld-mips-elf/comm-data.exp: Use check_shared_lib_support rather
than an explicit pattern for test target qualification. Link
with a linker script.
* ldgram.y: Likewise
* ldlex.l: Likewise
* NEWS: Mention the new feature.
* ld.texinfo: Document the new feature.
* ld-scripts/log2.exp: New: Run the new log2 test.
* ld-scripts/log2.s: Source for the new test.
* ld-scripts/log2.t: Linker script for new test.
* elf32-arm.c (elf32_arm_final_link_relocate): Use origin of output
segment containing the relocating symbol instead of assuming 0 for
sb group relocations.
* ld-arm/group-relocs-ldr-bad.s: Redefine bar into foo section
beyond 16 bit offset width.
* ld-arm/group-relocs-ldrs-bad.s: Likewise.
* ld-arm/group-relocs-ldr-bad.d: Adjust expected result.
* ld-arm/group-relocs-ldrs-bad.d: Likewise.
* ld-arm/group-relocs.s: Add comments. Move symbols used for sb
group relocations into .data section. Drop section zero. Use pc/r0
as base register when pc/sb group relocations are used.
* ld-arm/group-relocs.d: Adjust expected result.
* ld-arm/group-relocs-alu-bad-2.d: New test for sb group relocation.
* ld-arm/group-relocs-ldc-bad-2.d: Likewise.
* ld-arm/group-relocs-ldr-bad-2.d: New test for pc group relocation.
* ld-arm/group-relocs-ldrs-bad-2.d: Likewise.
* ld-arm/unresolved-2.d: Add sb relocation failure test.
* ld-arm/group-relocs-alu-bad-2.s: New test source.
* ld-arm/group-relocs-ldr-bad-2.s: Likewise.
* ld-arm/group-relocs-ldrs-bad-2.s: Likewise.
* ld-arm/group-relocs-ldc-bad-2.s: Likewise.
* ld-arm/unresolved-2.s: Likewise.
* ld-arm/arm-elf.exp: For group-relocs, drop section zero start
definition. Run the new tests.
* ld-vax-elf/export-class-call.rd: New test.
* ld-vax-elf/export-class-call.xd: New test.
* ld-vax-elf/export-class-data.dd: New test.
* ld-vax-elf/export-class-data.rd: New test.
* ld-vax-elf/export-class-data.xd: New test.
* ld-vax-elf/export-class.ld: New test linker script.
* ld-vax-elf/export-class-call.s: New test source.
* ld-vax-elf/export-class-data.s: New test source.
* ld-vax-elf/export-class-def.s: New test source.
* ld-vax-elf/vax-elf.exp: Run the new tests.
* ld-vax-elf/vax-export-class.rd: New test.
* ld-vax-elf/vax-export-class.xd: New test.
* ld-vax-elf/export-class.exp: New test script.
* elf32-vax.c (elf_vax_check_relocs) <R_VAX_GOT32, R_VAX_PLT32>:
Don't check symbol visibility here. Remove a check already
asserted for.
(elf_vax_instantiate_got_entries): Use SYMBOL_REFERENCES_LOCAL
instead of individual checks.
(elf_vax_relocate_section) <R_VAX_GOT32, R_VAX_PLT32>: Only
check the offset to decide if produce a GOT or PLT entry.
Remove redundant assertions. Remove code to produce GOT entries
for local symbols. Remove a duplicate comment and add a comment
on GOT relocations.
(elf_vax_finish_dynamic_symbol): Remove code to produce RELATIVE
dynamic relocs.
ld/testsuite/
* ld-vax-elf/got-local-exe.xd: New test.
* ld-vax-elf/got-local-lib.xd: New test.
* ld-vax-elf/got-local-aux.s: New test source.
* ld-vax-elf/got-local-def.s: New test source.
* ld-vax-elf/got-local-ref.s: New test source.
* ld-vax-elf/vax-elf.exp: Run the new tests.
PR ld/15762
* ld-elf/shared.exp (build_tests): Check .gnu.warning section
in the libbarw.so library.
* ld-elf/libbarw.rd: New.
* lib/ld-lib.exp (run_cc_link_tests): Support checking on
output with warning message.
thumb only targets.
(elf32_arm_final_link_relocate): Likewise.
* ld-arm/thumb-b-lks-sym.d: Updated to be more flexible.
* ld-arm/thumb-bl-lks-sym.d: Likewise.
(elf32_arm_stub_long_branch_arm_nacl_pic): New variable.
(arm_build_one_stub): Increase MAXRELOCS to 3.
(arm_type_of_stub): Use them if GLOBALS->nacl_p.
(struct elf32_arm_link_hash_table): Give add_stub_section member's
pointee type a third argument.
(elf32_arm_create_or_find_stub_sec): Update caller.
(elf32_arm_size_stubs): Update argument type.
* bfd-in.h (elf32_arm_size_stubs): Update decl.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* emultempl/armelf.em (elf32_arm_add_stub_section): Take third
argument ALIGNMENT_POWER, use it instead of constant 3.
* ld-arm/farcall-arm-nacl.d: New file.
* ld-arm/farcall-arm-nacl-pic.d: New file.
* ld-arm/farcall-data-nacl.d: New file.
* ld-arm/arm-elf.exp (armeabitests_common): Add extra element to
"action" lists for those cases to use a different dump file for NaCl
targets.
Massage $armeabitests_common to drop the extra element or the one
before it, depending on [istarget "arm*-*-nacl*"].
* ld-arm/arm-elf.exp (armelftests_common): Move all "Cortex-A8
erratum fix", Thumb-only and interworking cases to ...
(armelftests_nonacl): ... here.
(armeabitests_common): Move all "erratum 760522 fix", Thumb-only
and interworking cases to ...
(armeabitests_nonacl): ... here.
* mips.h (EF_MIPS_NAN2008): New macro.
bfd/
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Handle
EF_MIPS_NAN2008.
(_bfd_mips_elf_print_private_bfd_data): Likewise.
binutils/
* readelf.c (get_machine_flags): Handle EF_MIPS_NAN2008.
gas/
* config/tc-mips.c (mips_flag_nan2008): New variable.
(options): Add OPTION_NAN enum value.
(md_longopts): Handle it.
(md_parse_option): Likewise.
(s_nan): New function.
(mips_elf_final_processing): Handle EF_MIPS_NAN2008.
(md_show_usage): Add -mnan.
* doc/as.texinfo (Overview): Add -mnan.
* doc/c-mips.texi (MIPS Opts): Document -mnan.
(MIPS NaN Encodings): New node. Document .nan directive.
(MIPS-Dependent): List the new node.
gas/testsuite/
* gas/mips/nan-2008-1.d: New test.
* gas/mips/nan-2008-2.d: New test.
* gas/mips/nan-2008-3.d: New test.
* gas/mips/nan-2008-4.d: New test.
* gas/mips/nan-legacy-1.d: New test.
* gas/mips/nan-legacy-2.d: New test.
* gas/mips/nan-legacy-3.d: New test.
* gas/mips/nan-legacy-4.d: New test.
* gas/mips/nan-legacy-5.d: New test.
* gas/mips/nan-error-1.l: New list test.
* gas/mips/nan-error-2.l: New list test.
* gas/mips/nan-2008-override.s: New test source.
* gas/mips/nan-2008.s: New test source.
* gas/mips/nan-legacy-override.s: New test source.
* gas/mips/nan-legacy.s: New test source.
* gas/mips/nan-error-1.s: New test source.
* gas/mips/nan-error-2.s: New test source.
* gas/mips/mips.exp: Run the new tests.
ld/testsuite/
* ld-mips-elf/nan-2008.d: New test.
* ld-mips-elf/nan-legacy.d: New test.
* ld-mips-elf/nan-mixed-1.d: New test.
* ld-mips-elf/nan-mixed-2.d: New test.
* ld-mips-elf/nan-2008.s: New test source.
* ld-mips-elf/nan-legacy.s: New test source.
* elfxx-mips.h (_bfd_mips_elf_get_synthetic_symtab): New
prototype.
* elf32-mips.c (elf_backend_plt_sym_val): Remove macro.
(bfd_elf32_get_synthetic_symtab): New macro.
* elfxx-mips.c (plt_entry): New structure.
(mips_elf_link_hash_entry): Add use_plt_entry member.
(mips_elf_link_hash_table): Rename plt_entry_size member to
plt_mips_entry_size. Add plt_comp_entry_size, plt_mips_offset,
plt_comp_offset, plt_got_index entries and plt_header_is_comp
members.
(STUB_LW_MICROMIPS, STUB_MOVE_MICROMIPS): New macros.
(STUB_LUI_MICROMIPS, STUB_JALR_MICROMIPS): Likewise.
(STUB_ORI_MICROMIPS, STUB_LI16U_MICROMIPS): Likewise.
(STUB_LI16S_MICROMIPS): Likewise.
(MICROMIPS_FUNCTION_STUB_NORMAL_SIZE): Likewise.
(MICROMIPS_FUNCTION_STUB_BIG_SIZE): Likewise.
(micromips_o32_exec_plt0_entry): New variable.
(mips16_o32_exec_plt_entry): Likewise.
(micromips_o32_exec_plt_entry): Likewise.
(mips_elf_link_hash_newfunc): Initialize use_plt_entry.
(mips_elf_output_extsym): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_gotplt_index): Likewise. Remove the VxWorks
restriction. Use MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_elf_count_got_symbols): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_calculate_relocation): Handle MIPS16/microMIPS PLT
entries.
(_bfd_mips_elf_create_dynamic_sections): Don't set PLT sizes
here.
(mips_elf_make_plt_record): New function.
(_bfd_mips_elf_check_relocs): Update comment. Record occurences
of JAL relocations that might need a PLT entry.
(_bfd_mips_elf_adjust_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Set individual
PLT entry sizes here. Handle MIPS16/microMIPS PLT entries.
Don't set the symbol's value in the symbol table for PLT
references here. Don't set the PLT or PLT GOT section sizes
here.
(mips_elf_estimate_stub_size): Handle microMIPS stubs.
(mips_elf_allocate_lazy_stub): Likewise.
(mips_elf_lay_out_lazy_stubs): Likewise. Define a _MIPS_STUBS_
magic symbol.
(mips_elf_set_plt_sym_value): New function.
(_bfd_mips_elf_size_dynamic_sections): Set PLT header size and
PLT and PLT GOT section sizes here. Set the symbol values in
the symbol table for PLT references here. Handle microMIPS
annotation of the _PROCEDURE_LINKAGE_TABLE_ magic symbol.
(_bfd_mips_elf_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Handle
MIPS16/microMIPS PLT entries. Handle microMIPS stubs.
(_bfd_mips_vxworks_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Use
MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_finish_exec_plt): Handle microMIPS PLT. Return status.
(_bfd_mips_elf_finish_dynamic_sections): Handle result from
mips_finish_exec_plt.
(_bfd_mips_elf_link_hash_table_create): Update to use
gotplt_union's plist member rather than offset.
(_bfd_mips_elf_get_synthetic_symtab): New function.
include/elf/
* mips.h (ELF_ST_IS_MIPS_PLT): Respect STO_MIPS16 setting.
(ELF_ST_SET_MIPS_PLT): Likewise.
gdb/
* mips-tdep.c (mips_elf_make_msymbol_special): Handle MIPS16 and
microMIPS synthetic symbols.
ld/
* emulparams/elf32btsmip.sh: Arrange for .got.plt to be placed
as close to .plt as possible.
* scripttempl/elf.sc: Handle $INITIAL_READWRITE_SECTIONS and
$PLT_NEXT_DATA variables.
ld/testsuite/
* ld-mips-elf/jalx-2.dd: Update for microMIPS PLT support.
* ld-mips-elf/pic-and-nonpic-3a.dd: Update for the _MIPS_STUBS_
magic symbol.
* ld-mips-elf/pic-and-nonpic-3b.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise.
* ld-mips-elf/stub-dynsym-1-10000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-2fe80.d: Likewise.
* ld-mips-elf/stub-dynsym-1-7fff.d: Likewise.
* ld-mips-elf/stub-dynsym-1-8000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-fff0.d: Likewise.
* ld-mips-elf/tlslib-o32.d: Likewise.
opcodes/
* mips-dis.c (is_mips16_plt_tail): New function.
(print_insn_mips16): Handle MIPS16 PLT entry's GOT slot address
word.
(is_compressed_mode_p): Handle MIPS16/microMIPS PLT entries.
* elf64-aarch64.c (elf64_aarch64_final_link_relocate): Call
aarch64_resolve_relocation and bfd_elf_aarch64_put_addend to
handle the relocations of R_AARCH64_JUMP26, R_AARCH64_CALL26,
R_AARCH64_LD64_GOT_LO12_NC, R_AARCH64_ADR_GOT_PAGE and
R_AARCH64_GOT_LD_PREL19.
ld/testsuite/
* ld-aarch64/aarch64-elf.exp: Add 'ifunc-7c'.
* ld-aarch64/ifunc-7c.d: New test.
* elf32-arm.c (allocate_dynrelocs_for_symbol): Transform
ST_BRANCH_TO_ARM into ST_BRANCH_TO_THUMB if the target only
supports thumb instructions.
PR ld/15302
* ld-arm/branch-lks-sym.ld: New script.
* ld-arm/thumb-b-lks-sym.s: New test.
* ld-arm/thumb-b-lks-sym.d: Expected disassembly.
* ld-arm/thumb-bl-lks-sym.s: New test.
* ld-arm/thumb-bl-lks-sym.d: Expected disassembly.
* ld-arm/arm-elf.exp: Run the new tests.
* write.c (resolve_reloc_expr_symbols): On REL targets don't
convert relocs who have no relocatable field either. Rephrase
the conditional so that the PC-relative check is only applied
for REL targets.
gas/testsuite/
* gas/mips/jalr3.d: New test.
* gas/mips/jalr3-n32.d: New test.
* gas/mips/jalr3-n64.d: New test.
* gas/mips/jalr3.s: New test source.
* gas/mips/mips.exp: Run the new tests.
ld/testsuite/
* ld-mips-elf/jalr3.dd: New test.
* ld-mips-elf/jalr3.ld: New test linker script.
* ld-mips-elf/mips-elf.exp: Run the new test.
The .except, .loader and .typchk are not mapped to memory,
so do not set their SEC_ALLOC flag.
bfd/ChangeLog:
* coffcode.h (styp_to_sec_flags) [RS6000COFF_C]: Add handling
of STYP_EXCEPT, STYP_LOADER and STYP_TYPCHK sections.
ld/testsuite/ChangeLog:
* ld-powerpc/aix-core-sec-1.hd, ld-powerpc/aix-core-sec-2.hd,
ld-powerpc/aix-core-sec-3.hd: Adjust expected section flags
for section .loader.
PR ld/15365
* layout.cc (Layout::finalize): Make __ehdr_start STV_HIDDEN.
ld/
PR ld/15365
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation):
Restrict __ehdr_start's export class to no less than STV_HIDDEN.
ld/testsuite/
PR ld/15365
* ld-elf/ehdr_start.d: Expect __ehdr_start to be STB_LOCAL.
* ld-mips-elf/ehdr_start-1.nd: New test.
* ld-mips-elf/ehdr_start-2.nd: New test.
* ld-mips-elf/ehdr_start-1.ld: New test linker script.
* ld-mips-elf/ehdr_start-2.ld: New test linker script.
* ld-mips-elf/ehdr_start-new.s: New test source.
* ld-mips-elf/ehdr_start-o32.s: New test source.
* ld-mips-elf/mips-elf.exp: Run the new tests.
* ld-elf/provide-hidden-abs.nd: New test.
* ld-elf/provide-hidden-def.nd: New test.
* ld-elf/provide-hidden-dyn.nd: New test.
* ld-elf/provide-hidden-sec.nd: New test.
* ld-elf/provide-hidden-dynabs.nd: New test.
* ld-elf/provide-hidden-dynsec.nd: New test.
* ld-elf/provide-hidden-s.ld: New test linker script.
* ld-elf/provide-hidden-1.ld: New test linker script.
* ld-elf/provide-hidden-2.ld: New test linker script.
* ld-elf/provide-hidden-1.s: New test source.
* ld-elf/provide-hidden-2.s: New test source.
* ld-elf/provide-hidden-3.s: New test source.
* ld-elf/provide-hidden-4.s: New test source.
* ld-elf/provide-hidden.exp: New test script.
* config.bfd (msp430): Define targ_selvecs.
* configure.in: Add bfd_elf32_msp430_ti_vec.
* cpu-msp430.c: Add some more MSP430 machine numbers.
* elf32-msp430.c Add support for MSP430X relocations.
Add support for TI compiler generated relocations.
Add support for sym_diff relocations.
Add support for relaxing out of range short branches into long
branches.
Add support for MSP430 attribute section.
* reloc.c: Add MSP430X relocations.
* targets.c: Add bfd_elf32_msp430_ti_vec.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* readelf.c: Add support for MSP430X architecture.
* readelf.exp: Expect -wi test to fail for the MSP430.
* config/tc-msp430.c: Add support for the MSP430X architecture.
Add code to insert a NOP instruction after any instruction that
might change the interrupt state.
Add support for the LARGE memory model.
Add code to initialise the .MSP430.attributes section.
* config/tc-msp430.h: Add support for the MSP430X architecture.
* doc/c-msp430.texi: Document the new -mL and -mN command line
options.
* NEWS: Mention support for the MSP430X architecture.
* gas/all/gas.exp: Skip the DIFF1 test for the MSP430.
Expect the FORWARD test to pass for the MSP430.
Skip the REDEF tests for the MSP430.
Expect the 930509A test to fail for the MSP430.
* gas/all/sleb128-4.d: Skip for the MSP430.
* gas/elf/elf.exp: Set target_machine to msp430 for the MSP430.
Skip the EHOPT0 test for the MSP430.
Skip the REDEF and EQU-RELOC tests for the MSP430.
* gas/elf/section2.e-msp430: New file.
* gas/lns/lns-big-delta.d: Remove expectation of 20-bit
addresses.
* gas/lns/lns.exp: Use alternate LNS COMMON test for the MSP430.
* gas/msp430/msp430x.s: New test.
* gas/msp430/msp430x.d: Expected disassembly.
* gas/msp430/msp430.exp: Run new test.
* gas/msp430/opcode.d: Update expected disassembly.
* msp430.h: Add MSP430X relocs.
Add some more MSP430 machine numbers.
Add values used by .MSP430.attributes section.
* msp430.h: Add patterns for MSP430X instructions.
* Makefile.am: Add emsp430X.c
* Makefine.in: Regenerate.
* configure.tgt (msp430): Add msp430X emulation.
* ldmain.c (multiple_definition): Only disable relaxation if it
was enabled by the user.
* ldmain.h (RELAXATION_ENABLED_BY_USER): New macro.
* emulparams/msp430all.sh: Add support for MSP430X.
* emultempl/generic.em: (before_parse): Enable relaxation for the
MSP430.
* scripttempl/msp430.sc: Reorganize sections. Add .rodata
section.
* scripttempl/msp430_3.sc: Likewise.
* NEWS: Mention support for MSP430X.
* ld-elf/flags1.d: Expect this test to pass on the MSP430.
* ld-elf/init-fini-arrays.d: Expect this test to fail on the
MSP430.
* ld-elf/merge.d: Expect this test to pass on the MSP430.
* ld-elf/sec64k.exp: Skip these tests for the MSP430.
* ld-gc/pr13683.d: Expect this test to fail on the MSP430.
* ld-srec/srec.exp: Expect these tests to fail on the MSP430.
* ld-undefined/undefined.exp: Expect the UNDEFINED LINE test to
fail on the MSP430.
* msp430-dis.c: Add support for MSP430X instructions.
ld/testsuite/ChangeLog:
2013-04-30 Will Newton <will.newton@linaro.org>
* ld-arm/arm-elf.exp: Use linker script for IFUNC test 17.
* ld-arm/ifunc-17.dd: Update offsets for linker script.
* ld-arm/ifunc-17.gd: Likewise.
* ld-arm/ifunc-17.rd: Likewise.
The test for ld/12942 fails with gcc versions before 4.7.0. This patch
disables this test with these versions of gcc.
ld/testsuite/ChangeLog:
2013-04-29 Will Newton <will.newton@linaro.org>
* ld-plugin/lto.exp: Disable ld/12942 test for gcc < 4.7.0.
non_got_ref may not be set when building shared library. We need to set
non_got_ref if there are any non-PIC relocations. But we only did this
when there were no PLT/GOT relocations. It failed when there is a PLT
relocation. This checkin moves the non_got_ref check out.
bfd/
2013-04-15 H.J. Lu <hongjiu.lu@intel.com>
PR ld/15371
* elf-ifunc.c (_bfd_elf_allocate_ifunc_dyn_relocs): Check
regular reference without non-GOT reference when building
shared library.
ld/testsuite/
2013-04-15 H.J. Lu <hongjiu.lu@intel.com>
PR ld/15371
* ld-ifunc/ifunc-20-i386.d: New file.
* ld-ifunc/ifunc-20-x86-64.d: Likewise.
* ld-ifunc/ifunc-20.s: Likewise.
diff --git a/bfd/elf-ifunc.c b/bfd/elf-ifunc.c
index e56427d..7e7ec36 100644
--- a/bfd/elf-ifunc.c
+++ b/bfd/elf-ifunc.c
@@ -187,23 +187,20 @@ _bfd_elf_allocate_ifunc_dyn_relocs (struct bfd_link_info *info,
htab = elf_hash_table (info);
+ /* When building shared library, we need to handle the case where it is
+ marked with regular reference, but not non-GOT reference since the
+ non-GOT reference bit may not be set here. */
+ if (info->shared && !h->non_got_ref && h->ref_regular)
+ for (p = *head; p != NULL; p = p->next)
+ if (p->count)
+ {
+ h->non_got_ref = 1;
+ goto keep;
+ }
+
/* Support garbage collection against STT_GNU_IFUNC symbols. */
if (h->plt.refcount <= 0 && h->got.refcount <= 0)
{
- /* When building shared library, we need to handle the case
- where it is marked with regular reference, but not non-GOT
- reference. It may happen if we didn't see STT_GNU_IFUNC
- symbol at the time when checking relocations. */
- if (info->shared
- && !h->non_got_ref
- && h->ref_regular)
- for (p = *head; p != NULL; p = p->next)
- if (p->count)
- {
- h->non_got_ref = 1;
- goto keep;
- }
-
h->got = htab->init_got_offset;
h->plt = htab->init_plt_offset;
*head = NULL;
diff --git a/ld/testsuite/ld-ifunc/ifunc-20-i386.d b/ld/testsuite/ld-ifunc/ifunc-20-i386.d
new file mode 100644
index 0000000..9373fcf
--- /dev/null
+++ b/ld/testsuite/ld-ifunc/ifunc-20-i386.d
@@ -0,0 +1,13 @@
+#source: ifunc-20.s
+#ld: -shared -m elf_i386 -z nocombreloc
+#as: --32
+#readelf: -r --wide
+#target: x86_64-*-* i?86-*-*
+
+Relocation section '.rel.ifunc' at offset 0x[0-9a-f]+ contains 1 entries:
+[ ]+Offset[ ]+Info[ ]+Type[ ]+.*
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_386_32[ ]+ifunc\(\)[ ]+ifunc
+
+Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 1 entries:
+[ ]+Offset[ ]+Info[ ]+Type[ ]+.*
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_386_JUMP_SLOT[ ]+ifunc\(\)[ ]+ifunc
diff --git a/ld/testsuite/ld-ifunc/ifunc-20-x86-64.d b/ld/testsuite/ld-ifunc/ifunc-20-x86-64.d
new file mode 100644
index 0000000..39492d4
--- /dev/null
+++ b/ld/testsuite/ld-ifunc/ifunc-20-x86-64.d
@@ -0,0 +1,13 @@
+#source: ifunc-20.s
+#ld: -shared -m elf_x86_64 -z nocombreloc
+#as: --64
+#readelf: -r --wide
+#target: x86_64-*-*
+
+Relocation section '.rela.ifunc' at offset 0x[0-9a-f]+ contains 1 entries:
+[ ]+Offset[ ]+Info[ ]+Type[ ]+.*
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_X86_64_64[ ]+ifunc\(\)[ ]+ifunc \+ 0
+
+Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 1 entries:
+[ ]+Offset[ ]+Info[ ]+Type[ ]+.*
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_X86_64_JUMP_SLOT[ ]+ifunc\(\)[ ]+ifunc \+ 0
diff --git a/ld/testsuite/ld-ifunc/ifunc-20.s b/ld/testsuite/ld-ifunc/ifunc-20.s
new file mode 100644
index 0000000..9d45455
--- /dev/null
+++ b/ld/testsuite/ld-ifunc/ifunc-20.s
@@ -0,0 +1,16 @@
+ .section .data.rel,"aw",@progbits
+ .globl ifunc_ptrt
+ .type ifunc_ptr, @object
+ifunc_ptr:
+ .dc.a ifunc
+ .text
+ .type ifunc, @gnu_indirect_function
+ .globl ifunc
+ifunc:
+ ret
+ .size ifunc, .-ifunc
+ .type bar, @function
+ .globl bar
+bar:
+ call ifunc@PLT
+ .size bar, .-bar
