These files are source files and have no business being +x. We couldn't
easily fix it in CVS (you need login+write access to the raw rcs files),
but we can fix this w/git.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com>
* binutils-all/objcopy.exp: Consider mips-mti-elf the same as
mips-sde-elf
* binutils-all/readelf.exp: Likewise
gas/testsuite/
2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com>
* gas/mips/mips.exp: Consider mips-mti-elf the same as mips-sde-elf
ld/testsuite/
2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com>
* ld-mips-elf/mips-elf.exp: Consider mips-mti-elf the same as
mips-sde-elf
gas/
* config/tc-arm.c (arm_archs): New armv7ve architecture option.
(arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
(cpu_arch_ver): Likewise.
* doc/c-arm.texi: Document armv7ve.
gas/testsuite/
* gas/arm/attr-march-armv7ve.d: New test case for armv7ve.
include/opcode/
* arm.h (ARM_AEXT_V7VE): New define.
(ARM_ARCH_V7VE): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): Removed.
* config/tc-aarch64.c (set_other_error): New function.
(parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
the variable to which it points with 'o'.
(parse_operands): Update; check for write to read-only system
registers or read from write-only ones.
gas/testsuite/
* gas/aarch64/diagnostic.s: Add tests.
* gas/aarch64/diagnostic.l: Update.
* gas/aarch64/tracereg-illegal.d: New file.
* gas/aarch64/tracereg-illegal.l: Ditto.
* gas/aarch64/tracereg-illegal.s: Ditto.
* gas/aarch64/tracereg.d: Ditto.
* gas/aarch64/tracereg.s: Ditto.
include/opcode
* aarch64.h (aarch64_sys_reg_readonly_p): New declaration.
(aarch64_sys_reg_writeonly_p): Ditto.
opcodes/
* aarch64-opc.c (CPENT): New define.
(F_READONLY, F_WRITEONLY): Likewise.
(aarch64_sys_regs): Add trace unit registers.
(aarch64_sys_reg_readonly_p): New function.
(aarch64_sys_reg_writeonly_p): Ditto.
* config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
call aarch64_sys_reg_deprecated_p and warn about the deprecated
system registers.
gas/testsuite/
* gas/aarch64/deprecated.d: New file.
* gas/aarch64/deprecated.l: New file.
* gas/aarch64/deprecated.s: New file.
* gas/aarch64/sysreg-1.s: Add tests.
* gas/aarch64/sysreg-1.d: Add tests.
include/opcode/
* aarch64.h (aarch64_sys_reg): New typedef.
(aarch64_sys_regs): Change to define with the new type.
(aarch64_sys_reg_deprecated_p): Declare.
opcodes/
* aarch64-opc.c (F_DEPRECATED): New macro.
(aarch64_sys_regs): Update; flag "spsr_svc" and "spsr_hyp" with
F_DEPRECATED.
(aarch64_print_operand): Call aarch64_sys_reg_deprecated_p on
AARCH64_OPND_SYSREG.
Parsing a vector mov instruction currently leads to a phantom undefined
symbol being added to the symbol table. e.g.:
.text
mov x0, v0.D[0]
Produces an undefined symbol called "v0.D".
gas/ChangeLog:
2013-11-05 Will Newton <will.newton@linaro.org>
PR gas/16103
* config/tc-aarch64.c (parse_operands): Avoid trying to
parse a vector register as an immediate.
gas/testsuite/ChangeLog:
2013-11-05 Will Newton <will.newton@linaro.org>
* gas/aarch64/advsimd-mov-bad.d: New file.
* gas/aarch64/advsimd-mov-bad.s: Likewise.
Without this, constructs like "orw %rax, (%rax)" aren't being rejected
(other than any other wrong suffix/register combination).
gas/
2013-11-04 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (check_long_reg): Correct comment indentation.
(check_qword_reg): Correct comment and its indentation.
(check_word_reg): Extend comment and correct its indentation. Also
check for 64-bit register.
gas/testsuite/
2013-11-04 Jan Beulich <jbeulich@suse.com>
* gas/i386/x86-64-suffix-bad.[sl]: New.
* gas/i386/i386.exp: Run new test.
I think HJ has already fixed the binutils and ld tests with his
2013-09-27 readelf change, but this allows them to pass with wider
address output as per Nick's 2013-09-12 readelf change.
binutils/testsuite/
* binutils-all/x86-64/compressed-1a.d: Allow wide display of addresses.
gas/testsuite/
* gas/cfi/cfi-x86_64.d: Match when lacking end of section padding.
ld/testsuite/
* ld-pe/cfi.d: Allow wide display of addresses.
This defines the ELF symbol st_other field used to encode the number
of instructions between a function "global entry" and its "local entry",
and adds support related to the local entry offset.
include/elf/
* ppc64.h (STO_PPC64_LOCAL_BIT, STO_PPC64_LOCAL_MASK): Define.
(ppc64_decode_local_entry, ppc64_encode_local_entry): New functions.
(PPC64_LOCAL_ENTRY_OFFSET, PPC64_SET_LOCAL_ENTRY_OFFSET): Define.
bfd/
* elf64-ppc.c (struct ppc_stub_hash_entry): Add "other".
(stub_hash_newfunc): Init new ppc_stub_hash_entry field, and one
we forgot, "plt_ent".
(ppc64_elf_add_symbol_hook): Check ELFv1 objects don't have
st_other bits only valid in ELFv2.
(ppc64_elf_merge_symbol_attribute): New function.
(ppc_type_of_stub): Add local_off param to test branch range.
(ppc_build_one_stub): Adjust destinations for ELFv2 locals.
(ppc_size_one_stub, toc_adjusting_stub_needed): Similarly.
(ppc64_elf_size_stubs): Pass local_off to ppc_type_of_stub.
Set "other" field.
(ppc64_elf_relocate_section): Adjust destination for ELFv2 local
calls.
gas/
* config/tc-ppc.c (md_pseudo_table): Add .localentry.
(ppc_elf_localentry): New function.
(ppc_force_relocation): Force relocs on all branches to localenty
symbols.
(ppc_fix_adjustable): Don't reduce such symbols to section+offset.
binutils/
* readelf.c (get_ppc64_symbol_other): New function.
(get_symbol_other): Use it for EM_PPC64.
Defines bits in ELF e_flags to differentiate ELFv2 objects from ELFv2,
adds .abiversion directive to explicitly choose the ABI, and code to
check and automatically select ABI.
include/elf/
* ppc64.h (EF_PPC64_ABI): Define.
bfd/
* elf64-ppc.c (abiversion, set_abiversion): New functions.
(ppc64_elf_get_synthetic_symtab): Handle ELFv2 objects without .opd.
(struct ppc_link_hash_table): Add opd_abi.
(ppc64_elf_check_relocs): Check no .opd with ELFv2.
(ppc64_elf_merge_private_bfd_data): New function.
(ppc64_elf_print_private_bfd_data): New function.
(ppc64_elf_tls_setup): Set htab->opd_abi.
(ppc64_elf_size_dynamic_sections): Don't emit OPD related dynamic
tags for ELFv2.
(ppc_build_one_stub): Use R_PPC64_IRELATIVE for ELFv2 ifunc.
(ppc64_elf_finish_dynamic_symbol): Likewise
binutils/
* readelf.c (get_machine_flags): Display ABI version for EM_PPC64.
gas/
* config/tc-ppc.c: Include elf/ppc64.h.
(ppc_abiversion): New variable.
(md_pseudo_table): Add .abiversion.
(ppc_elf_abiversion, ppc_elf_end): New functions.
* config/tc-ppc.h (md_end): Define.
This changes the behaviour of @h and @ha on PowerPC64 to report errors
on 32-bit overflow. The motivation for this change is that on
PowerPC64, most uses of @h and @ha modifiers and their corresponding
relocations are to build up 32-bit offsets. We'd like to know when
such offsets overflow. Only rarely do people use @h or @ha with the
high 32-bit modifiers to build a 64-bit constant. Those uses will now
need to use two new modifiers, @high and @higha, if the constant isn't
known at assembly time. For now, we won't report overflow at assembly
time..
This also fixes an error when applying some of the HIGHER and HIGHEST
relocations.
include/elf/
* ppc64.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): New.
(IS_PPC64_TLS_RELOC): Match new tls relocs.
bfd/
* reloc.c (BFD_RELOC_PPC64_ADDR16_HIGH, BFD_RELOC_PPC64_ADDR16_HIGHA,
BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA,
BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): New.
* elf64-ppc.c (ppc64_elf_howto_raw): Add entries for new relocs.
Make all _HA and _HI relocs report signed overflow.
(ppc64_elf_reloc_type_lookup): Handle new relocs.
(must_be_dyn_reloc, ppc64_elf_check_relocs): Likewise.
(dec_dynrel_count, ppc64_elf_relocate_section): Likewise.
(ppc64_elf_relocate_section): Don't apply 0x8000 adjust to
R_PPC64_TPREL16_HIGHER, R_PPC64_TPREL16_HIGHEST,
R_PPC64_DTPREL16_HIGHER, and R_PPC64_DTPREL16_HIGHEST.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (SEX16): Don't mask.
(REPORT_OVERFLOW_HI): Define as zero.
(ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
@tprel@high, and @tprel@higha modifiers.
(md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
Handle new relocs.
(md_apply_fix): Similarly.
elfcpp/
* powerpc.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::check_non_pic): Handle new relocs.
(Target_powerpc::Scan::global, local): Likewise.
(Target_powerpc::Relocate::relocate): Likewise. Check for overflow
on all ppc64 @h and @ha relocs.
There's no real need to emit these always: They're needed only if we
indeed want to emit a localized symbol. Hence defer emission until we
at least did the basic early checks that would lead to no such symbol
getting emitted. This in particular avoids emitting such a symbol in
the majority of (if not all) "ld -r" cases.
I hope my set of cross build tests caught all the test cases needing
adjustment - please forgive if I missed a few.
bfd/
2013-10-29 Jan Beulich <jbeulich@suse.com>
* elflink.c (struct elf_outext_info): Add field file_sym_done.
(bfd_elf_final_link): Initialize new field. Move fake STT_FILE
symbol emission from here ...
(elf_link_output_extsym): ... to here.
gas/testsuite/
2013-10-29 Jan Beulich <jbeulich@suse.com>
* gas/microblaze/relax_size.elf: Drop expectation of no longer
present STT_FILE symbol.
* gas/microblaze/relax_size2.elf: Likewise.
ld/testsuite/
2013-10-29 Jan Beulich <jbeulich@suse.com>
* ld-cris/tls-e-tpoffcomm1.d: Drop expectation of no longer
present STT_FILE symbol.
* ld-mmix/bpo-18.d: Likewise.
* ld-mmix/bpo-22.d: Likewise.
* ld-mmix/greg-6.d: Likewise.
* ld-mmix/greg-7.d: Likewise.
* ld-mmix/loc4.d: Likewise.
* ld-mmix/local1.d: Likewise.
* ld-mmix/local3.d: Likewise.
* ld-mmix/local5.d: Likewise.
* ld-mmix/local7.d: Likewise.
* ld-mmix/loct-1.d: Likewise.
* ld-sh/sh64/abi32.xd: Likewise.
* ld-sh/sh64/abi64.xd: Likewise.
* ld-sh/sh64/cmpct1.xd: Likewise.
* ld-sh/sh64/crange1.rd: Likewise.
* ld-sh/sh64/crange2.rd: Likewise.
* ld-sh/sh64/crange3-cmpct.rd: Likewise.
* ld-sh/sh64/crange3-media.rd: Likewise.
* ld-sh/sh64/crange3.rd: Likewise.
* ld-sh/sh64/crangerel1.rd: Likewise.
* ld-sh/sh64/crangerel2.rd: Likewise.
* ld-sh/sh64/mix1.xd: Likewise.
* ld-sh/sh64/mix2.xd: Likewise.
* ld-sh/sh64/shdl32.xd: Likewise.
* ld-sh/sh64/shdl64.xd: Likewise.
* config/tc-mips.c (fpr_read_mask): Test MSA registers.
(fpr_write_mask): Test MSA registers.
(can_swap_branch_p): Check fpr write followed by fpr read.
opcodes/
* nios2-opc.c (nios2_builtin_reg): Use "sstatus" rather than "ba"
as the primary name of r30.
gas/
* config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
also test/refer to "sstatus". Reformat the warning message.
gas/testsuite/
* gas/nios2/warn_nobreak.l: Update text of warning messages.
* gas/nios2/registers.s: Use "sstatus" rather than "ba"
as the primary name of r30.
* gas/nios2/registers.d: Likewise.
2013-10-10 Jan Beulich <jbeulich@suse.com>
* tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
swapping for bndmk, bndldx, and bndstx.
for "<foo>a". Issue error messages for unrecognised or corrrupt
size extensions.
* gas/msp430/bad.s: New test: Checks erroneous size extensions.
* gas/msp430/bad.d: New test command file.
* gas/msp430/bad.l: New file: Expected error messages.
* gas/msp430/msp430.exp: Run the new test.
* gas/msp430/msp430x.s: Add "<foo>.a" aliases of "<foo>a"
instructions.
* gas/msp430/msp430x.d: Update expected disassembly.
