Commit graph

1735 commits

Author SHA1 Message Date
Nick Clifton
c0ae4cccdd Add comment describoing why dgettext() is used in _() macro. 2000-05-31 18:32:07 +00:00
Nick Clifton
c1485d85e0 Replace defines with those from intl/libgettext.h to quieten gcc warnings. 2000-05-30 18:35:35 +00:00
Alan Modra
2114f57b93 Update dependencies. 2000-05-26 14:14:21 +00:00
Alexandre Oliva
d60622826d * m10300-dis.c (disassemble): Don't assume 32-bit longs when
sign-extending operands.
2000-05-26 01:54:33 +00:00
Donald Lindsay
344fc69a7b Add ALONE flag to most of the short branch instructions. 2000-05-25 22:21:38 +00:00
Diego Novillo
fb48caede3 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
(STD_REGISTER_NAMES): New name for REGISTER_NAMES.
	(reg_names): Rename to std_reg_names. Change it to a char **
	static variable.
	(std_reg_names): New name for reg_names.
	(set_mips_isa_type): Set reg_names to point to std_reg_names by
	default.
2000-05-24 15:24:56 +00:00
Nick Clifton
6c298591a3 Define LIBIBERTY 2000-05-21 17:01:02 +00:00
Frank Ch. Eigler
f660ee8b2e * cgen/opcodes fix
* approved by nickc

[opcodes/ChangeLog]
2000-05-16  Frank Ch. Eigler  <fche@redhat.com>

	* fr30-desc.h: Partially regenerated to account for changed
	CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
	* m32r-desc.h: Ditto.

[include/opcode/ChangeLog]
2000-05-16  Frank Ch. Eigler  <fche@redhat.com>

	* cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32.  Check that
	it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
	(CGEN_MAX_IFMT_OPERANDS): Increase to 16.  Check that it exceeds
	CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
2000-05-16 19:28:07 +00:00
Nick Clifton
322f2c4579 Add support for _x and _s flags to MSR instruction 2000-05-15 19:25:22 +00:00
Nick Clifton
60fc8cba61 Fix disassembly of DLRS{H|B} instruction 2000-05-12 17:15:21 +00:00
Alan Modra
73da6b6b40 Don't mask top 32 bits of 64-bit address. 2000-05-11 07:10:19 +00:00
Geoffrey Keating
d2f75a6f40 * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
also available in common mode when powerpc syntax is being used.
2000-05-10 19:42:25 +00:00
Alan Modra
821011cc5b Kill compiler warnings with ATTRIBUTE_UNUSED. 2000-05-08 07:22:54 +00:00
Timothy Wall
5c84d377b6 Support for tic54x target. 2000-05-06 17:14:34 +00:00
J.T. Conklin
786e2c0f62 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
vector unit operands.
(VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
unit instruction formats.
(PPCVEC): New macro, mask for vector instructions.
(powerpc_operands): Add table entries for above operand types.
(powerpc_opcodes): Add table entries for vector instructions.

* ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
(print_insn_little_powerpc): Likewise.
(print_insn_powerpc): Prepend 'v' when printing vector registers.
2000-05-03 22:25:08 +00:00
Denis Chertykov
3c504221d4 * avr-dis.c (reg_fmul_d): New. Extract destination register from
FMUL instruction.
	(reg_fmul_r): New. Extract source register from FMUL instruction.
	(reg_muls_d): New. Extract destination register from MULS instruction.
	(reg_muls_r): New. Extract source register from MULS instruction.
	(reg_movw_d): New. Extract destination register from MOVW instruction.
	(reg_movw_r): New. Extract source register from MOVW instruction.
	(print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
	EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
2000-05-01 08:45:11 +00:00
Clinton Popetz
7f6d05e83e Add XCOFF64 support.
bfd:
	* Makefile.am (coff64-rs6000.lo): New rule.
	* Makefile.in: Regenerate.
	* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
	xcoff_is_local_label_name, xcoff_rtype2howto,
	xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
	xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
	xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
	(NO_COFF_SYMBOLS): Define.
	(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
	xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
	internally.
	(MINUS_ONE): New macro.
	(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
	relocation.
	(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
	coff_SWAP_aux_out): Map to the new functions.
	* coff64-rs6000.c: New file.
	* libcoff.h (bfd_coff_backend_data): Add new fields
	_bfd_coff_force_symnames_in_strings and
	_bfd_coff_debug_string_prefix_length.
	(bfd_coff_force_symnames_in_strings,
	bfd_coff_debug_string_prefix_length): New macros for above fields.
	* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
	Set machine to 620 for XCOFF64.  Use bfd_coff_swap_sym_in instead
	of using coff_swap_sym_in directly.
	(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
	(coff_set_flags) Set magic for XCOFF64.
	(coff_compute_section_file_positions): Add symbol name length to
	string section length if bfd_coff_debug_string_prefix_length is
	true.
	(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
	(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
	using coff_swap_lineno_in directly.
	(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
	and _bfd_coff_debug_string_prefix_length fields.
	* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
	symbol names into strings table when
	bfd_coff_force_symnames_in_strings is true.
	* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
	SET_RELOC_VADDR): New macros.
	(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
	(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
	code.
	(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
	changes within RS6000COFF_C specific code.
	(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
	MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
	* reloc.c (bfd_perform_relocation, bfd_install_relocation):
	Extend existing hack on target name.
	* xcofflink.c (XCOFF_XVECP): Extend existing hack on
	target name.
	* coff-tic54x.c (ticof): Keep up to date with new fields
	in bfd_coff_backend_data.
	* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
	targ_selvecs to include rs6000coff64_vec for rs6000.
	* configure.in: Add rs6000coff64_vec case.
 	* cpu-powerpc.c: New bfd_arch_info_type.

	gas:
	* as.c (parse_args): Allow md_parse_option to override -a listing
	option.
	* config/obj-coff.c (add_lineno): Change type of offset parameter
	from "int" to "bfd_vma."
	* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
	(ppc_mach, ppc_subseg_align, ppc_target_format): New.
	(ppc_change_csect): Align correctly for XCOFF64.
	(ppc_machine): New function, which discards "ppc_machine" line.
	(ppc_tc): Cons for 8 when code is 64 bit.
	(md_apply_fix3): Don't check operand->insert.  Handle 64 bit
	relocations.
	(md_parse_option): Handle -a64 and -a32.
	(ppc_xcoff64): New.
	* config/tc-ppc.h (TARGET_MACH): Define.
	(TARGET_FORMAT): Move to function.
	(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.

	include:
	* include/coff/rs6k64.h: New file.

	opcodes:
	* configure.in: Add bfd_powerpc_64_arch.
	* disassemble.c (disassembler): Use print_insn_big_powerpc for
	64 bit code.
2000-04-26 15:09:44 +00:00
Nick Clifton
447b43fa50 Initialise signed_overflow field 2000-04-24 17:32:36 +00:00
Timothy Wall
aa170a07eb Misc assembly/disassembly fixes. 2000-04-23 02:39:13 +00:00
Jeff Law
91b1cc5d0b * hppa-dis.c (extract_16): New function.
(print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
        new operand types l,y,&,fe,fE,fx.
2000-04-21 22:04:29 +00:00
Jim Wilson
800eeca487 IA-64 ELF support. 2000-04-21 20:22:24 +00:00
Alexandre Oliva
4d85706b80 * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
(disassemble): Use them.
2000-04-20 22:15:32 +00:00
Alan Modra
0d8dfecfe9 More portability patches. Include sysdep.h everywhere. 2000-04-14 04:16:58 +00:00
Andrew Cagney
a2d91340f3 Remove ``-W -Wall'' from top-level Makefile/configure.
Add ``-W -Wall'' to sub-directories bfd, binutils, gas gprof, ld and
opcodes by the addition of WARN_CFLAGS to Makefile.am and configury to
set it.  Add configure option --enable-build-warnings.
Re-generate all and sundry using auto*-000227.
2000-04-09 12:17:43 +00:00
Joern Rennecke
52ccafd035 opcodes:
* sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
	stc GBR,@-<REG_N> is available for arch_sh1_up.
	Group parallel processing insn with identical mnemonics together.
	Make three-operand psha / pshl come first.
gas:
	* config/tc-sh.c (get_operands): There's no third operand if the
	first operand is an immediate.
2000-04-05 21:43:26 +00:00
Joern Rennecke
015551fcfb sh-dsp REPEAT support:
opcodes:

        * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
        Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}.  Add REPEAT.
        (sh_arg_type): Add A_PC.
        (sh_table): Update entries using immediates.  Add repeat.
        * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
        Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}.  Add REPEAT.

gas:

        * config/tc-sh.c (immediate): Delete.
        (sh_operand_info): Add immediate member.
        (parse_reg): Use A_PC for pc.
        (parse_exp): Add second argument 'op'.  All callers changed.
        (parse_at): Expect pc to be coded as A_PC.
        Use immediate field in *op.
        (insert): Add fourth argument 'op'.  All callers changed.
        (build_relax): Add second argument 'op'.  All callers changed.
        (insert_loop_bounds): New function.
        (build_Mytes): Remove DISP_4.
        Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}.  Add REPEAT.
        (assemble_ppi): Use immediate field in *operand.
        (sh_force_relocation): Handle BFD_RELOC_SH_LOOP_{START,END}.
        (md_apply_fix): Likewise.
        (tc_gen_reloc): Likewise.  Check for a pcrel BFD_RELOC_SH_LABEL.

include/coff:

        * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define.

include/elf:

        * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs.

bfd:

        * reloc.c (_bfd_relocate_contents): Add BFD_RELOC_SH_LOOP_START and
        BFD_RELOC_SH_LOOP_END.
        * elf32-sh.c (sh_elf_howto_tab): Change special_func to
        sh_elf_ignore_reloc for all entries that sh_elf_reloc used to ignore.
        Add entries for R_SH_LOOP_START and R_SH_LOOP_END.
        (sh_elf_reloc_loop): New function.
        (sh_elf_reloc): No need to test for always-to-be-ignored relocs
        any more.
        (sh_rel): Add entries for BFD_RELOC_SH_LOOP_{START,END}.
        (sh_elf_relocate_section): Handle BFD_RELOC_SH_LOOP_{START,END}.
        * bfd-in2.h, libbfd.h: Regenerate.
2000-04-05 21:23:05 +00:00
Alan Modra
8ad3436c79 Move translated part of bug report string back into .c files so
xgettext can find it.  Regnerate .pot files.
2000-04-04 14:32:35 +00:00
Alan Modra
41b49281c1 Use "gcc -MM" for dependencies, and update them. 2000-04-04 10:53:56 +00:00
Alan Modra
b77a133c96 Tidy some code. Print pc rel addresses as signed. 2000-04-03 14:17:43 +00:00
Ian Lance Taylor
9aaaa29133 * disassemble.c (disassembler_usage): Don't use a prototype. Mark
the parameter ATTRIBUTE_UNUSED.
	* ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
2000-04-02 06:26:09 +00:00
Alexandre Oliva
5728a7d74f * m10300-opc.c: SP-based offsets are always unsigned. 2000-04-01 22:03:31 +00:00
Nick Clifton
67b60d924f Disassemble 0xde.. to "bal" [branch always] instead of "undefined". 2000-03-29 18:23:57 +00:00
Nick Clifton
ba23e138c9 Fix value of SHORT_A1.
Move SHORT_AR to end of list of short instructions.
2000-03-27 20:17:02 +00:00
Ian Lance Taylor
832ddf6235 * Makefile.am (CFILES): Add avr-dis.c.
(ALL_MACHINES): Add avr-dis.lo.
2000-03-27 16:34:34 +00:00
Alan Modra
adde6300e0 ATMEL AVR microcontroller support. 2000-03-27 08:39:14 +00:00
Joern Rennecke
05102e700f * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement. 2000-03-06 21:13:15 +00:00
Nick Clifton
866afedcb4 Apply patch for 100679 2000-03-02 23:01:40 +00:00
Nick Clifton
77343c58f9 Replace 'flags' with 'signed_overflow_ok_p' 2000-02-28 17:57:40 +00:00
Ian Lance Taylor
e56f75e906 2000-02-27 Eli Zaretskii <eliz@is.elta.co.il>
* Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
	name of the libtool directory.
	* Makefile.in: Rebuild.
2000-02-27 17:08:06 +00:00
Nick Clifton
fa7928cae2 Add functions to modify/examine the signed_overflow_ok_p field in cpu_desc. 2000-02-24 23:58:52 +00:00
Andrew Haley
cfcdbe9790 2000-02-23 Andrew Haley <aph@cygnus.com>
* m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
        m32r-ibld.c,m32r-opc.h: Rebuild.
2000-02-24 16:19:36 +00:00
Alan Modra
5b93d8bb51 Add IBM 370 support. 2000-02-23 13:52:23 +00:00
Chandra Chavva
b669ceb922 * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
        procedure.
2000-02-22 20:44:14 +00:00
Andrew Haley
8027df8989 1999-12-30 Andrew Haley <aph@cygnus.com>
* mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
	force gp32 to zero.
	* mips-opc.c (G6): New define.
	(mips_builtin_op): Add "move" definition for -gp32.
2000-02-22 14:41:46 +00:00
Ian Lance Taylor
4db3857a87 From Grant Erickson <gerickso@Brocade.COM>:
* ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
2000-02-22 07:44:54 +00:00
Alan Modra
f6af82bd44 This lot mainly cleans up `comparison between signed and unsigned' gcc
warnings.  One usused var, and a macro parenthesis fix too.  Also check
input sections are elf when doing gc in elflink.h.
2000-02-21 12:01:27 +00:00
Joern Rennecke
d4845d5762 bfd:
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.

bfd:

	* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
	(bfd_mach_sh3_dsp): Likewise.
	(bfd_mach_sh4): Reinstate.
	(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
	* bfd-in2.h: Regenerate.
	* coff-sh.c (struct sh_opcode): flags is no longer short.
	(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
	(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
	(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
	(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
	(sh_opcodes): No longer const.
	(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
	(sh_insn_uses_reg): Check for USESAS and USESR8.
	(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
	(_bfd_sh_align_load_span): Return early for SH4.
	Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
	Take into account that field b of a parallel processing insn
	could be mistaken for a separate insn.
	* cpu-sh.c (arch_info_struct): New array elements for
	sh2, sh-dsp and sh3-dsp.
	Reinstate element for sh4.
	(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
	(SH4_NEXT): Reinstate.
	(SH3_NEXT, SH3E_NEXT): Adjust.
	* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
	* elf32-sh.c (sh_elf_set_private_flags): New function.
	(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
	(sh_elf_merge_private_data): New function.
	(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
	(bfd_elf32_bfd_copy_private_bfd_data): Define.
	(bfd_elf32_bfd_merge_private_bfd_data): Change to
	sh_elf_merge_private_data.

gas:

	* config/tc-sh.c ("elf/sh.h"): Include.
	(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
	(md.begin): Initialize target_arch.
	Only include opcodes in has table that match selected architecture.
	(parse_reg): Recognize register names for sh-dsp.
	(parse_at): Recognize post-modify addressing.
	(get_operands): The leading space is now optional.
	(get_specific): Remove FDREG_N support.  Add support for sh-dsp
	arguments.  Update valid_arch.
	(build_Mytes): Add support for SDT_REG_N.
	(find_cooked_opcode): New function, broken out of md_assemble.
	(assemble_ppi, sh_elf_final_processing): New functions.
	(md_assemble): Use find_cooked_opcode and assemble_ppi.
	(md_longopts, md_parse_option): New option: -dsp.
	* config/tc-sh.h (elf_tc_final_processing): Define.
	(sh_elf_final_processing): Declare.

include/elf:

	* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
	(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
	(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.

opcodes:

	* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
	(print_insn_ppi): Likewise.
	(print_insn_shx): Use info->mach to select appropriate insn set.
	Add support for sh-dsp.  Remove FD_REG_N support.
	* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
	(sh_arg_type): Likewise.  Remove FD_REG_N.
	(sh_dsp_reg_nums): New enum.
	(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
	(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
	(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
	(arch_sh3_dsp_up): Likewise.
	(sh_opcode_info): New field: arch.
	(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
	D_REG_N.  Fill in arch field.  Add sh-dsp insns.
2000-02-17 00:33:36 +00:00
Fernando Nasser
a7f8487eec 2000-02-14 Fernando Nasser <fnasser@totem.to.cygnus.com>
* arm-dis.c: Change flavor name from atpcs-special to
	special-atpcs to prevent name conflict in gdb.
	(get_arm_regname_num_options, set_arm_regname_option,
	get_arm_regnames): New functions.  API to access the several
	flavor of register names.  Note: Used by gdb.
	(print_insn_thumb): Use the register name entry from the currently
	selected flavor for LR and PC.
2000-02-14 19:02:47 +00:00
Nick Clifton
97ee9b94b2 Add support for M340 part. 2000-02-10 21:41:11 +00:00
Nick Clifton
a3d9c82d14 Rename parse_disassembler_option (again) 2000-02-07 18:27:19 +00:00
Timothy Wall
940b2b788c octets vs bytes changes for binutils 2000-02-03 18:12:55 +00:00
Nick Clifton
6c082ed806 Rename parse_disassembler_option to parse_arm_disassembler_option and allow it
to be exported.
2000-01-28 01:55:09 +00:00
Nick Clifton
58efb6c0fd Add ATPCS support to ARM disassembler.
Document ARM disassembler options.
2000-01-27 22:17:12 +00:00
Nick Clifton
94470b237b Add support for documenting target specific disassembler options 2000-01-27 21:44:26 +00:00
Nick Clifton
2f0ca46a49 Apply Thoams de Lellis's patch to fic disassembly of Thumb instructions when
bounded by non-function labels.
2000-01-27 20:05:32 +00:00
Nick Clifton
cb26882951 Prevent double dumping of raw thumb instructions. 2000-01-25 22:10:13 +00:00
Nick Clifton
06b53c1bff Add 'add" as an offial alias for "addu" 2000-01-21 00:27:29 +00:00
Nick Clifton
01c7f6303d Add support for --disassembler-options=force-thumb 2000-01-03 20:50:57 +00:00
Alan Modra
3138f287b1 x86 indirect jump/call syntax fixes. Disassembly fix for lcall. 1999-12-27 16:10:31 +00:00
Jeff Law
a9af5e0481 * m10300-opc.c, m10300-dis.c: Add am33 support. 1999-12-01 10:36:22 +00:00
Jeff Law
61e8273b2c * hppa-dis.c (unit_cond_names): Add PA2.0 unit condition names.
(print_insn_hppa): Handle 'B' operand.
1999-11-25 03:29:14 +00:00
Nick Clifton
96ac8957e8 Fix binary pattern for cpfg,f0,c instruction 1999-11-22 15:13:26 +00:00
Gavin Romig-Koch
5fce5ddfd3 For include/opcode:
* mips.h (INSN_ISA5): New.

For opcodes:

	* mips-opc.c (I5): New.
	(abs.ps,add.ps,alnv.ps,c.COND.ps,cvt.s.pl,cvt.s.pu,cvt.ps.s
	madd.ps,movf.ps,movt.ps,mul.ps,net.ps,nmadd.ps,nmsub.ps,
	pll.ps,plu.ps,pul.ps,puu.ps,sub.ps,suxc1,luxc1): New.
1999-11-18 19:53:48 +00:00
Donald Lindsay
cfbd315cb2 Added 'X' format to ARM code. 1999-11-16 03:37:02 +00:00
Gavin Romig-Koch
6e3708af13 * mips-opc.c (la): Create a version that just uses addiu directly.
(dla): Expand to daddiu if possible.
1999-11-15 15:34:17 +00:00
Nick Clifton
c156a9fd87 Add ssnop pattern. 1999-11-11 11:38:41 +00:00
Gavin Romig-Koch
2bd7f1f332 For include/opcode:
* mips.h (OPCODE_IS_MEMBER): New.

For gas:

	* config/tc-mips.c (macro_build): Use OPCODE_IS_MEMBER.
	(mips_ip): Use OPCODE_IS_MEMBER.

For opcodes:

	* mips-dis.c (_print_insn_mips): Use OPCODE_IS_MEMBER.
1999-11-01 19:29:55 +00:00
Nick Clifton
11fd822a84 oops - omitted from previous delta 1999-10-29 09:48:23 +00:00
Nick Clifton
b8d5f53766 fix typo in previous delta 1999-10-28 09:05:19 +00:00
Nick Clifton
cb6a5892d8 fix compile time warnings. 1999-10-27 18:14:17 +00:00
Nick Clifton
452a37f009 revert previous delta 1999-10-25 16:30:37 +00:00
Nick Clifton
9cac79d30b Apply patch supplied for case 102229 to implement new insns psrclr and psrset. 1999-10-25 15:28:44 +00:00
Michael Meissner
446a06c9b8 Add md expression support; Cleanup alpha warnings 1999-10-18 22:29:15 +00:00
Jeff Law
1c170bd8b2 * hppa-dis.c (print_insn_hppa): Add new codes 'cc', 'cd', 'cC',
'co', '@'.

        * hppa-dis.c (print_insn_hppa): Removed unused args.  Fix '?W'.

        * hppa-dis.c (print_insn_hppa):  Implement codes "?N", "?Q".
1999-10-10 07:58:37 +00:00
Diego Novillo
c43185deeb Added seven new instructions ld, ld2w, sac, sachi, slae, st and
st2w for d10v. Created new testsuite for d10v to verify new
instructions.
1999-10-07 06:17:04 +00:00
Doug Evans
1fa60b5dde * fr30-asm.c,fr30-desc.h: Rebuild.
* m32r-asm.c,m32r-desc.c,m32r-desc.h: Rebuild.  Add m32rx support.
	* m32r-dis.c,m32r-ibld.c,m32r-opc.c,m32r-opc.h,m32r-opinst.c: Ditto.
1999-10-05 00:05:52 +00:00
Nick Clifton
abf4be04fa Fix bit patterns of some load/store instructions to match latest docs. 1999-09-29 14:18:05 +00:00
Jeff Law
1fb72ed144 * hppa-dis.c (print_insn_hppa): Replace 'B', 'M', 'g' and 'l' with
cleaner code using completer prefixes.  Add 'Y'.
1999-09-23 14:28:25 +00:00
Jeff Law
9c1faa8229 * hppa-dis.c: (print_insn_hppa): Correct 'cJ', 'cc'. 1999-09-19 20:17:48 +00:00
Jeff Law
b3fe7ee280 * hppa-dis.c (extract_22): New function. 1999-09-19 20:14:30 +00:00
Jeff Law
eb32eb44aa * hppa-dis.c (print_insn_hppa): Handle 'J', 'K', and 'cc'. 1999-09-19 20:10:45 +00:00
Jeff Law
f322c2c2c1 * hppa-dis.c (print_insn_hppa): Handle 'fe' and 'cJ'. 1999-09-19 19:52:39 +00:00
Jeff Law
d758242c73 * hppa-dis.c (print_insn_hppa): Handle '#', 'd', and 'cq'. 1999-09-19 19:29:37 +00:00
Jeff Law
838c65f040 * hppa-dis.c (print_insn_hppa): Handle 'm', 'h', '='. 1999-09-19 18:50:17 +00:00
Jeff Law
3610d1317d * hppa-dis.c (print_insn_hppa): Handle 'X' operand. 1999-09-19 18:11:48 +00:00
Jeff Law
69138680ad * hppa-dis.c (print_insn_hppa): Handle 'B' operand. 1999-09-19 17:36:54 +00:00
Jeff Law
2784abe525 * hppa-dis.c (print_insn_hppa): Handle 'M' and 'L' operands. 1999-09-19 17:06:11 +00:00
Jeff Law
a5c4b2b4cd * hppa-dis.c (print_insn_hppa): Handle 'l' operand. 1999-09-19 16:59:47 +00:00
Jeff Law
321e8dac9b * hppa-dis.c (print_insn_hppa): Handle 'g' operand. 1999-09-19 16:44:16 +00:00
Jeff Law
e46def7bdf * hppa-dis.c (print_insn_hppa): Output a space after 'X' completer. 1999-09-18 19:11:39 +00:00
Jeff Law
46e36b17b0 * hppa-dis.c: (print_insn_hppa): Do output a space before a 'v'
operand.
1999-09-18 18:19:56 +00:00
Jeff Law
debc018de3 * hppa-dis.c: (print_insn_hppa): Handle 'fX'. 1999-09-18 18:09:38 +00:00
Jeff Law
2f87f883f1 * hppa-dis.c: (print_insn_hppa): Add missing break after
FP register case.
1999-09-18 17:57:08 +00:00
Jeff Law
58d0c905e5 * hppa-dis.c: Finish constifying various completers, register
names, etc etc.
1999-09-18 17:38:51 +00:00
Michael Meissner
6d83c84bcf Fix problem with going to automake 2.14 1999-09-14 23:29:35 +00:00
Jeff Law
2beaab59a5 * hppa-dis.c (print_insn_hppa): Escape '%' in output strings. 1999-09-07 19:57:23 +00:00
Jeff Law
d1e9bd1f11 * hppa-dis.c (print_insn_hppa): Handle 'Z' argument. 1999-09-07 19:52:51 +00:00
Nick Clifton
f45812f66a Add patterns with correct names for mulu and muls instructions (mulu.w and muls.w) 1999-09-07 17:26:21 +00:00
Ian Lance Taylor
1e608f986c 1999-09-04 Steve Chamberlain <sac@pobox.com>
* pj-opc.c: New file.
	* pj-dis.c: New file.
	* disassemble.c	(disassembler): Handle bfd_arch_pj.
	* configure.in: Handle bfd_pj_arch.
	* Makefile.am: Rebuild dependencies.
	(CFILES): Add pj-dis.c and pj-opc.c.
	(ALL_MACHINES): Add pj-dis.lo and pj-opc.lo.
	* configure, Makefile.in: Rebuild.
1999-09-04 17:14:37 +00:00
Ian Lance Taylor
4fe53c9827 1999-09-04 H.J. Lu <hjl@gnu.org>
* i386-dis.c (print_insn_i386): Set bytes_per_line to 7.
1999-09-04 15:49:35 +00:00
Richard Henderson
bfe5c752f1 * alpha-opc.c (fetch, fetch_m, ecb, wh64): RA must be R31. 1999-08-31 02:01:22 +00:00
Doug Evans
eb1b03df1a * fr30-asm.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
* m32r-asm.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
	* m32r-opinst.c: Rebuild.
1999-08-29 21:16:25 +00:00
Jeff Law
a349b1517f * hppa-dis.c (print_insn_hppa): Replace 'f' by 'v'. Prefix float
register args by 'f'.
1999-08-29 07:53:24 +00:00
Jeff Law
af10de8240 * hppa-dis.c (print_insn_hppa): Add args q, %, !, and |. 1999-08-28 10:59:07 +00:00
Jeff Law
3b67cf2b51 * hppa-dis.c (MASK_10, read_write_names, add_compl_names,
extract_10U_store):  New.
        (print_insn_hppa):  Add new completers.
1999-08-28 10:17:07 +00:00
Jeff Law
1eee34f59f * hppa-dis.c (signed_unsigned_names,mix_half_names,
saturation_names):  New.
        (print_insn_hppa): Add completer codes 'a', 'ch', 'cH', 'cS', and 'c*'.
1999-08-28 08:47:50 +00:00
Jeff Law
3281117ae1 * hppa-dis.c (print_insn_hppa): Place completers behind prefix 'c'. 1999-08-28 08:17:36 +00:00
Jeff Law
46424e052b * hppa-dis.c (print_insn_hppa): Add cases for '.', '~'. '$'. and '!' 1999-08-28 06:45:18 +00:00
Jeff Law
4f31259178 * hppa-dis.c (print_insn_hppa): Look at next arg instead of bits
to decide to print a space.
1999-08-28 06:29:15 +00:00
Alan Modra
9e525108fe Add AMD athlon support to x86 assembler and disassembler. 1999-08-21 12:40:39 +00:00
Ian Lance Taylor
9c492adce5 From Wally Iimura <iimura@microunity.com>:
* dis-buf.c (buffer_read_memory): Rewrite expression to avoid
	overflow at end of address space.
	(generic_print_address): Use sprintf_vma.
1999-08-10 15:02:41 +00:00
Ian Lance Taylor
73c418f421 * Makefile.am: Rename .dep* files to DEP*. Change DEP variable to
MKDEP.  Rebuild dependencies.
	* Makefile.in: Rebuild.
1999-08-08 17:31:00 +00:00
Jeff Law
b333b6c6d3 * hppa-dis.c (compare_cond_64_names, cmpib_cond_64_names,
add_cond_64_names, wide_add_cond_names, logical_cond_64_names,
        unit_cond_64_names, shift_cond_64_names, bb_cond_64_names): New.
        (print_insn_hppa): Add 64 bit condition completers.
1999-08-06 15:50:21 +00:00
Jeff Law
feb129926a * hppa-dis.c (print_insn_hppa): Change condition args to use
'?' prefix.
1999-08-05 23:02:01 +00:00
Jeff Law
3ea80b3388 * hppa-dis.c (print_insn_hppa): Remove unnecessary test in 'E'
code.
1999-07-28 10:36:10 +00:00
Ian Lance Taylor
8f36e47c10 From Mark Elbrecht:
* configure.bat: Remove; obsolete.
1999-07-22 01:16:49 +00:00
Ian Lance Taylor
57d91c3ced * dis-buf.c: Add ATTRIBUTE_UNUSED as appropriate.
(generic_strcat_address): Add cast to avoid warning.
	* i386-dis.c: Initialize all structure fields to avoid warnings.
	Add ATTRIBUTE_UNUSED as appropriate.
1999-07-11 20:04:29 +00:00
Richard Henderson
9df31319e8 Jakub Jelinek <jj@ultra.linux.cz>
* sparc-dis.c (print_insn_sparc): Differentiate between
        addition and oring when guessing symbol for comment.
1999-07-08 16:14:07 +00:00
Nick Clifton
9f20bbfd4c Display hex equivalent of rotated ARM constants. 1999-07-05 07:44:09 +00:00
Alan Modra
1008451944 P
include/opcode/i386.h: Allow bswapl, arplw, and other dodgy insns.
opcodes/i386-dis.c: Fix a comment
1999-06-23 06:00:14 +00:00
Ian Lance Taylor
6094e721e9 * alpha-dis.c: Don't include <stdlib.h>.
* arm-dis.c: Include "sysdep.h".
	* tic30-dis.c: Don't include <stdlib.h> or <string.h>.  Include
	"sysdep.h".
	* Makefile.am: Rebuild dependencies.
	* Makefile.in: Rebuild.
1999-06-21 10:11:52 +00:00
Nick Clifton
5876e06d81 Add detection of IMB and IMBRange SWIs. 1999-06-16 02:58:52 +00:00
Nick Clifton
dd92f63977 Add -M command line switch to objdump - text of switch is passed on to disassembler
Add support for register name set selection ot ARM disassembler.
1999-06-16 02:24:36 +00:00
Ian Lance Taylor
63a5042b9b x 1999-06-13 17:05:17 +00:00
Ian Lance Taylor
5076851fbc * i386-dis.c (FWAIT_OPCODE): Define.
(fetch_data): Don't print an error message if we have already
	found an fwait prefix.
	(ckprefix): Use FWAIT_OPCODE rather than 0x9b.
	(print_insn_i386): If setjmp fails, indicating a data error, but
	we have found an fwait prefix, then print it as an fwait
	instruction.  In any case, return the number of bytes consumed, if
	any, rather than always returning -1.
1999-06-13 13:56:26 +00:00
Richard Henderson
440034c99f Jakub Jelinek <jj@ultra.linux.cz>
* sparc-opc.c: Fix up set, setsw, setuw operand kinds.
        Support signx %reg, clruw %reg.
1999-06-07 12:44:48 +00:00
Richard Henderson
bed2c8562a Jakub Jelinek <jj@ultra.linux.cz>
* sparc-opc.c: Add aliases Solaris as supports.
1999-06-07 12:26:46 +00:00
Andreas Schwab
71f221746a * Makefile.am (CFILES): Add arc-{dis,opc}.c and v850-{dis,opc}.c.
* Makefile.in: Regenerated.
1999-06-07 03:06:39 +00:00
Nick Clifton
886796f9fa Make LDRH/LDRB consistent with LDR when target is PC-relative 1999-06-04 07:14:10 +00:00
Ian Lance Taylor
461d5ddde0 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
* m68k-opc.c: Rename MACL/MSACL to MAC/MSAC.  Add MACM/MSACM.  Add
	MOVE MACSR,CCR.
	* m68k-dis.c (fetch_arg): Add places `n', `o'.
	* m68k-opc.c: Add MSAC, MACL, MOVE to/from ACC, MACSR, MASK.
	Add mcf5206e to appropriate instructions.
	Add alias for MAC, MSAC.
	* m68k-dis.c (print_insn_arg): Add formats `E', `G', `H' and place
	`N'.
	* m68k-opc.c (m68k_opcodes): Add divsw, divsl, divuw, divul, macl,
	macw, remsl, remul for mcf5307.  Change mcf5200 --> mcf.
	* m68k-dis.c: Add format `u' and places `h', `m', `M'.
1999-05-27 22:33:14 +00:00
Alan Modra
5028a927f6 a
Add missing files from last change in gas/testsuite.
i386-dis.c: Catch a number of cases where an invalid modrm would result in
bogus disassembly.  const lots of places.
1999-05-17 08:35:41 +00:00
Alan Modra
c608c12e5e P
i386 PIII SIMD support, remove ReverseRegRegmem kludge
tidy a few things in i386 intel mode disassembly
1999-05-13 06:00:30 +00:00
Nick Clifton
886851536e Use .short to display unidentified instructions 1999-05-07 09:14:56 +00:00
Nick Clifton
76f4998ad1 remove mentions of mcore. 1999-05-06 07:08:37 +00:00
Richard Henderson
252b5132c7 19990502 sourceware import 1999-05-03 07:29:11 +00:00