* config/tc-i386.c (i386_operand): Don't set the size of an
immediate address based solely on the suffix and the mode.
* config/tc-i386.c (md_assemble): Add assertion to make sure
overlap2 does not set Imm.
* config/tc-i386.c (space_chars): Remove. The scrubber converts
sequences of whitespace to a single space.
(is_space_chars): Just compare with space.
(md_begin): Don't initialize space_chars.
(md_assemble): Just skip a single whitespace character.
(i386_operand): Rewrite base-index parsing to use new
parse_register, and to skip white space. Skip white space in a
number of other places too. Don't give error message if
parse_register fails.
(parse_register): Change reg_string parameter to be non-const.
Add end_op parameter. Skip white space after the `%', and return
end of register string. Give error message here rather than
caller.
* obj-vms.c: Add C++ support with ctors/dtors sections. Add weak
symbol definitions.
(Ctors_Symbols, Dtors_Symbols): New symbol chains.
(ps_CTORS, ps_DTORS): New section types.
(vms_fixup_xtors_section): New function
(Ctors_Psect, Dtors_Psect): Define.
(IS_GXX_XTOR): Define
(global_symbol_directory): Change check of gxx_bug_fixed to 0.
Filter static constructors/destructors and add to
Ctors_Symbols/Dtors_Symbols chain.
(vms_write_object_file): Write Ctors_Symbols/Dtors_Symbols to
appropriate section.
* tc-alpha.h (TARGET_FORMAT): Rename "evax-alpha" to "vms-alpha".
* makefile.vms: Merge vax/vms support.
(md_pseudo_table): Add pseudo-ops to set the current machine type.
(md_begin): Default to mn10300 mode.
(md_assemble): Only accept instructions for the core mn10300
chip and the active machine type.
as synonyms for "rN" registers.
(xr_registers): Add mcrh, mcrl, mcvf, mdrq and sp as synonyms
for "xrN" registers.
(md_assemble): Fix typo computing the size of relocations.
* config/tc-mn10300.c (r_registers): Add missing registers.
(xr_registers): New set of registers.
(xr_register_name): New function.
(md_assemble): Handle XRREG and PLUS operands. Tweak handling of
RREG operand insertion. Handle new D6 and D7 instruction formats.
end-sanitize-am33
* config/tc-mn10300.c (mn10300_insert_operand): Do not hardcode the
shift amount for a repeated operand. The shift amount for the
repeated copy comes from the size of the operand.
other than their native tongues.
Wed Jun 17 14:02:10 1998 Frank Ch. Eigler <fche@cygnus.com>
* gas/mips/delay.d: Add -mcpu=NNNN to gas flags to let test case
run on differently targeted assembler.
* gas/mips/{ld-ilocks-addr32,ld-svr4pic.d}: Ditto.
* gas/mips/{ld-xgot.d,lif-svr4pic.d,lif-xgot.d}: Same.
* gas/mips/{mips16.d,mips4.d,nodelay.d}: Again.
* gas/mips/{trunc.d,uld.d,ulh-xgot.d,usd.d}: And then some.
* gas/mips/ld-ilocks.d: Removed disassembler flags to let target
defaults go unmodified. Replaced $f4/$f5 with $fp[45], as the
original `ld.d' had. Find `ld.s'.
* gas/mips/mul-ilocks.d: Nearly ditto.
* app.c (do_scrub_begin): If tc_symbol_chars is defined, treat all
characters in it as LEX_IS_SYMBOL_COMPONENT.
* config/tc-i386.h (tc_symbol_chars): Define.
(extra_symbol_chars): Declare.
* config/tc-i386.c (extra_symbol_chars): Define.
(comment_chars): Don't use '/' as comment start if TE_LINUX.
(line_comment_chars): Set to '/' if TE_LINUX.
* doc/c-i386.texi (i386-prefixes): Update.
* doc/internals.texi (CPU backend): Document tc_symbol_chars.
* config/tc-i386.h: Change Data16 to Size16, Data32 to Size32,
IgnoreDataSize to IgnoreSize as they are used for address size as
well as data size.
* config/tc-i386.c: Likewise. Add code to reject addr32/data32 in
32-bit mode, similarly addr16/data16 and variants.
* config/tc-i386.c: REPNE renamed to REPNE_PREFIX_OPCODE, and
likewise for REPE.
* config/tc-i386.c (reloc): Add braces.
* config/tc-i386.c (struct _i386_insn): Rename bi to sib to be
consistent with Intel naming.
* config/tc-i386.h (base_index_byte): Rename to sib_byte. Don't
use bitfields in sib_byte.
(modrm_byte): Don't use bitfields here either.
* config/tc-i386.c (current_templates): Add const.
(parse_register): Add const to return, param, and char *s.
(i386_operand): Add const to reg_entry *r.
* config/tc-i386.h (templates): Add const to start, end.
Inspired by code for 16 bit gas support from Martynas Kunigelis
<martynas@nm3.ktu.lt>:
* config/tc-i386.c (md_assemble): Add full support for 16 bit
modrm, and Jump, JumpByte, JumpDword, JumpInterSegment insns.
(uses_mem_addrmode): Remove.
(md_estimate_size_before_relax): Add support here too.
(md_relax_table): Rewrite interface to md_relax for 16 bit
support.
(BYTE, WORD, DWORD, UNKNOWN_SIZE): Remove.
(opcode_suffix_to_type): Remove.
(CODE16, SMALL, SMALL16, BIG, BIG16): Define.
(SIZE_FROM_RELAX_STATE): Modify to suit above.
(md_convert_frag): Likewise.
(i386_operand): Add support for 16 bit base/index regs,
immediates, and displacements. Remove some unnecessary casts, and
localise end_of_operand_string, displacement_string_start,
displacement_string_end variables. Add GCC_ASM_O_HACK.
* config/tc-i386.h (NO_BASE_REGISTER_16): Define.
* config/tc-i386.c (prefix_hash): Remove.
(md_begin): Rewrite without obstacks. Remove prefix hash table
handling. Rewrite lexical table handling.
(i386_print_statistics): Don't print prefix statistics.
(md_assemble): Rewrite instruction parser so that line is not
converted to lower case. Don't do a hash_find for prefixes,
instead recognise them via opcode modifier.
(expecting_operand, paren_not_balanced): Localise variables.
* config/tc-i386.h (IsPrefix): Define.
(prefix_entry): Remove.
* config/tc-i386.h (PREFIX_SEPERATOR): Don't define.
* config/tc-i386.c (PREFIX_SEPARATOR): Define here instead, using
'\\' in case where comment_chars contains '/'.
* config/tc-i386.c (MATCH): Ensure given operand and template
match for JumpAbsolute. Makes e.g. `ljmp table(%ebx)' invalid;
you must write `ljmp *table(%ebx)'.
From H.J. Lu <hjl@gnu.org>:
* config/tc-i386.c (BFD_RELOC_16, BFD_RELOC_16_PCREL): Define
as 0 ifndef BFD_ASSEMBLER.
(md_assemble): Allow immediate operands without suffix or
other reg operand to default in size to the current code size.
* config/tc-i386.c (mode_from_disp_size): Disp16 is mode 2.
(i386_operand): Simplify checks for valid base/index combinations.
Disallow `in 4(%dx),%al'.
* config/tc-i386.c (struct _i386_insn): Make regs, base_reg, and
index_reg const.
(add_prefix): Change parameter from char to int.
* config/tc-i386.h (Ugh): Define opcode modifier.
* config/tc-i386.c (md_assemble): Print warnings for Ugh insns.
* config/tc-i386.c (md_assemble): Rewrite MATCH and
CONSISTENT_REGISTER_MATCH macros to check register types more
thoroughly. Check for illegal suffix/operand combinations
when matching insns with operands. Handle new `s' suffix, and
associated FloatMF opcode modifier for float insns with memory
operands.
* config/tc-i386.h (FloatMF): Define new opcode modifier.
(No_sSuf, No_bSuf, No_wSuf, No_lSuf): Likewise.
(SHORT_OPCODE_SUFFIX, LONG_OPCODE_SUFFIX): Define.
* config/tc-i386.c: Rename WORD_PREFIX_OPCODE to
DATA_PREFIX_OPCODE throughout.
* config/tc-i386.c (REGISTER_WARNINGS): Define.
(md_assemble): Rewrite suffix/register operand checking code to be
more thorough. Remove Abs8,16,32. Change occurrences of Mem to
AnyMem, the better to grep.
(pi): Remove Abs.
(i386_operand): Don't set Mem bits in i.types[this_operand] when
given a memory operand. Don't set Abs bits either.
(type_names): Remove Mem*, Abs*.
* config/tc-i386.h (Mem8, Mem16, Mem32, Abs8, Abs16, Abs32): Don't
define opcode_modifiers as these cases are handled by Disp8,
Disp16, Disp32 and suffix checks.
(COMES_IN_BOTH_DIRECTIONS): Remove.
(FloatR): Define. It's OK to share the bit with ReverseRegRegmem.
* config/tc-i386.c (md_assemble): Don't emit operand size prefix
if IgnoreDataSize modifier given. Remove ShortformW modifier
test. Add test for ShortForm in W base_opcode modification.
Merge Seg2ShortForm and Seg3ShortForm code.
* config/tc-i386.h (ShortFormW): Remove.
(IgnoreDataSize): Define.
* gas/m68k/operands.s: For all pc relative addresses change tstl
to pea since the former does not allow pcrel on m68000. Do not
make label foo global, so that references to it can be relaxed on
ELF targets.
* gas/m68k/operands.d, gas/m68k/op68000.d: Updated.
* config/tc-i386.c (END_STRING_AND_SAVE): Protect arguments of
macros and enclose in do while(0).
(RESTORE_END_STRING): Likewise.
(md_assemble): Add one to printed operand number so we start
from 1 not 0. Add some more gettext invocations.
(i386_operand): Fix `%%s' -> `%%%s'. Inc printed operand
number here too.
* config/tc-i386.h (WAIT_PREFIX, LOCKREP_PREFIX, ADDR_PREFIX,
DATA_PREFIX, SEG_PREFIX): Define.
* config/tc-i386.c (struct _i386_insn): Remove wait_prefix field.
(check_prefix): Remove function.
(add_prefix): New function. Add prefix to i.prefix as well as
doing checks.
(md_assemble): Changes for add_prefix. Remove hack for wait
prefix, instead always output prefixes in fixed order. Test
for jcxz/loop when selecting between word & dword operations,
and add address size prefix rather than operand size prefix.
Remove operand -> address size hack when emitting jcxz/loop.
(i386_operand): Remove O_Absent check as it's done in expr.
* config/tc-m68k.c (md_estimate_size_before_relax): Add more calls
to relaxable_symbol to prevent references to external symbol from
being relaxed.
Wed Jun 3 14:10:36 1998 Ian Lance Taylor <ian@cygnus.com>
* config/tc-m68k.c (relaxable_symbol): If TARGET_OS is "elf", all
symbols are relaxable.
* macro.c (macro_mri_mode): New function.
* macro.h (macro_mri_mode): Declare.
* read.c (s_mri): Call macro_mri_mode when switching in and out of
MRI mode.
* config/tc-vax.c (md_create_short_jump): Fix off by two bug in
offset calculation. Also, use VAX_BRW from vax-inst.h instead
of hardcoded magic number.
(md_create_long_jump): Use VAX_JMP and VAX_ABSOLUTE_MODE macros.
* gas/mips/mips.exp: The r5900 has ilocks and gpr_ilocks.
* gas/mips/div-ilocks.d: Handle both "break" instruction variants.
* gas/mips/{div.d, mul-ilocks.d, mul.d}: Likewise.
