Commit graph

415 commits

Author SHA1 Message Date
Rainer Orth
1360ba7676 ld:
* emulparams/elf32_sparc_sol2.sh (OUTPUT_FORMAT): Set to
	elf32-sparc-sol2.
	* emulparams/elf64_sparc_sol2.sh (OUTPUT_FORMAT): Set to
	elf64-sparc-sol2.

	gas:
	* config/tc-sparc.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define as
	elf32-sparc-sol2.
	(ELF64_TARGET_FORMAT): Define as elf64-sparc-sol2.

	bfd:
	* elfxx-sparc.c (tpoff): Define bed, static_tls_size.
	Consider static_tls_alignment.

	* elf32-sparc.c (TARGET_BIG_SYM): Redefine to
	bfd_elf32_sparc_sol2_vec.
	(TARGET_BIG_NAME): Redefine to elf32-sparc-sol2.
	(elf32_bed): Redefine to elf32_sparc_sol2_bed.
	(elf_backend_static_tls_alignment): Redefine to 8.
	Include elf32-target.h.
	(elf_backend_static_tls_alignment): Undef again for VxWorks.

	* elf64-sparc.c (TARGET_BIG_SYM): Redefine to
	bfd_elf64_sparc_sol2_vec.
	(TARGET_BIG_NAME): Redefine to elf64-sparc-sol2.
	(ELF_OSABI): Undef.
	(elf64_bed): Redefine to elf64_sparc_sol2_bed.
	(elf_backend_static_tls_alignment): Redefine to 16.
	Include elf64-target.h.

	* config.bfd (sparc-*-solaris2.[0-6]): Split from sparc-*-elf*.
	Set targ_defvec to bfd_elf32_sparc_sol2_vec.
	[BFD64] (sparc-*-solaris2*): Set targ_defvec to
	bfd_elf32_sparc_sol2_vec.
	Replace bfd_elf64_sparc_vec by bfd_elf64_sparc_sol2_vec in
	targ_selvecs.

	* configure.in: Handle bfd_elf32_sparc_sol2_vec,
	bfd_elf64_sparc_sol2_vec.
	* configure: Regenerate.

	* targets.c (bfd_elf32_sparc_sol2_vec): Declare.
	(bfd_elf64_sparc_sol2_vec): Declare.
	(_bfd_target_vector): Add bfd_elf32_sparc_sol2_vec,
	bfd_elf64_sparc_sol2_vec.
2010-10-22 12:08:32 +00:00
Joseph Myers
75fa6dc1e8 bfd:
* elf32-tic6x.c (elf32_tic6x_merge_arch_attributes): Update for
	attribute renaming.
	(elf_backend_obj_attrs_section): Change to ".c6xabi.attributes".

binutils:
	* readelf.c (display_tic6x_attribute): Update for attribute
	renaming.

gas:
	* config/tc-tic6x.c (tic6x_arch_attribute, tic6x_arches,
	md_assemble, tic6x_set_attributes): Update for attribute renaming.
	* doc/c-tic6x.texi: Update for attribute renaming.

gas/testsuite:
	* gas/tic6x/attr-arch-directive-1.d,
	gas/tic6x/attr-arch-directive-2.d,
	gas/tic6x/attr-arch-directive-3.d,
	gas/tic6x/attr-arch-directive-4.d,
	gas/tic6x/attr-arch-directive-4.s,
	gas/tic6x/attr-arch-directive-5.d,
	gas/tic6x/attr-arch-directive-5.s,
	gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d,
	gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d,
	gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d,
	gas/tic6x/attr-arch-opts-none-1.d,
	gas/tic6x/attr-arch-opts-none-2.d,
	gas/tic6x/attr-arch-opts-override-1.d,
	gas/tic6x/attr-arch-opts-override-2.d: Update for attribute
	renaming and renumbering.

include/elf:
	* tic6x-attrs.h (Tag_C6XABI_Tag_CPU_arch): Change to Tag_ISA,
	value 4.
	* tic6x.h (Values for Tag_C6XABI_Tag_CPU_arch): Rename for
	attribute renaming.

ld:
	* emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Use
	.c6xabi.attributes, not __TI_build_attributes.

ld/testsuite:
	* ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d,
	ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d,
	ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d,
	ld-tic6x/attr-arch-c64x+-c62x.d, ld-tic6x/attr-arch-c64x+-c64x+.d,
	ld-tic6x/attr-arch-c64x+-c64x.d, ld-tic6x/attr-arch-c64x+-c674x.d,
	ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d,
	ld-tic6x/attr-arch-c64x-c62x.d, ld-tic6x/attr-arch-c64x-c64x+.d,
	ld-tic6x/attr-arch-c64x-c64x.d, ld-tic6x/attr-arch-c64x-c674x.d,
	ld-tic6x/attr-arch-c64x-c67x+.d, ld-tic6x/attr-arch-c64x-c67x.d,
	ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d,
	ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d,
	ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d,
	ld-tic6x/attr-arch-c67x+-c62x.d, ld-tic6x/attr-arch-c67x+-c64x+.d,
	ld-tic6x/attr-arch-c67x+-c64x.d, ld-tic6x/attr-arch-c67x+-c674x.d,
	ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d,
	ld-tic6x/attr-arch-c67x-c62x.d, ld-tic6x/attr-arch-c67x-c64x+.d,
	ld-tic6x/attr-arch-c67x-c64x.d, ld-tic6x/attr-arch-c67x-c674x.d,
	ld-tic6x/attr-arch-c67x-c67x+.d, ld-tic6x/attr-arch-c67x-c67x.d:
	Update for attribute renaming.
2010-10-21 21:16:54 +00:00
Rainer Orth
18a1a992e0 * emultempl/solaris2.em (elf_solaris2_before_allocation): Renamed
basever_syms to global_syms.
	Emit global_syms into .dynamic section for all executables and
	shared objects.
	(elf_solaris2_after_allocation): New function.
	(LDEMUL_AFTER_ALLOCATION): Use it.
	* emulparams/solaris2.sh: New file.
	* emulparams/elf32_sparc_sol2.sh: Use it.
	* emulparams/elf64_sparc_sol2.sh: Likewise.
	* emulparams/elf_i386_sol2.sh: Likewise.
	* emulparams/elf_x86_64_sol2.sh: Likewise.
	* Makefile.am (eelf32_sparc_sol2.c): Depend on
	$(srcdir)/emulparams/solaris2.sh.
	(eelf64_sparc_sol2.c): Likewise.
	(eelf_x86_64_sol2.c): Likewise.
	(eelf_i386_sol2.c): Likewise.
	* Makefile.in: Regenerate.
2010-10-12 18:39:36 +00:00
David S. Miller
d9b807ab58 * emulparams/elf32_sparc.sh: Set NOP to 0x01000000 2010-09-20 18:41:15 +00:00
Alan Modra
360cfc9c8b remove maxq-coff port 2010-06-29 04:17:34 +00:00
Joseph Myers
59e6276b64 bfd:
* elf-bfd.h (LEAST_KNOWN_OBJ_ATTRIBUTE): Decrease to 2.
	* elf32-tic6x.c (elf32_tic6x_obj_attrs_arg_type,
	elf32_tic6x_merge_arch_attributes, elf32_tic6x_merge_attributes,
	elf32_tic6x_merge_private_bfd_data): New.
	(bfd_elf32_bfd_merge_private_bfd_data,
	elf_backend_obj_attrs_arg_type, elf_backend_obj_attrs_section,
	elf_backend_obj_attrs_section_type, elf_backend_obj_attrs_vendor):
	Define.
	* elf32-tic6x.h (elf32_tic6x_merge_arch_attributes): Declare.

binutils:
	* readelf.c (display_tic6x_attribute, process_tic6x_specific):
	New.
	(process_arch_specific): Call process_tic6x_specific for
	EM_TI_C6000.

gas:
	* config/tc-tic6x.c: Include elf/tic6x.h.
	(tic6x_arch_attribute, tic6x_seen_insns): New.
	(tic6x_arch_table, tic6x_arches): Add attribute values.
	(tic6x_use_arch): Handle attribute settings.
	(tic6x_attributes_set_explicitly, s_tic6x_c6xabi_attribute,
	tic6x_attribute_table, tic6x_attributes,
	tic6x_convert_symbolic_attribute): New.
	(md_pseudo_table): Add c6xabi_attribute.
	(md_assemble): Set tic6x_seen_insns and tic6x_arch_attribute.
	(tic6x_set_attribute_int, tic6x_set_attributes): New.
	(tic6x_end): Call tic6x_set_attributes.
	* config/tc-tic6x.h (CONVERT_SYMBOLIC_ATTRIBUTE): Define.
	(tic6x_convert_symbolic_attribute): Declare.

gas/testsuite:
	* gas/elf/elf.exp: Set target_machine for tic6x-*-*.
	* gas/elf/section2.e-tic6x, gas/tic6x/attr-arch-directive-1.d,
	gas/tic6x/attr-arch-directive-1.s,
	gas/tic6x/attr-arch-directive-2.d,
	gas/tic6x/attr-arch-directive-2.s,
	gas/tic6x/attr-arch-directive-3.d,
	gas/tic6x/attr-arch-directive-3.s,
	gas/tic6x/attr-arch-directive-4.d,
	gas/tic6x/attr-arch-directive-4.s,
	gas/tic6x/attr-arch-directive-5.d,
	gas/tic6x/attr-arch-directive-5.s,
	gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d,
	gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d,
	gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d,
	gas/tic6x/attr-arch-opts-none-1.d,
	gas/tic6x/attr-arch-opts-none-2.d,
	gas/tic6x/attr-arch-opts-override-1.d,
	gas/tic6x/attr-arch-opts-override-2.d, gas/tic6x/empty.s: New.

include/elf:
	* tic6x-attrs.h: New.
	* tic6x.h: Include elf/tic6x-attrs.h for attribute table.
	(C6XABI_Tag_CPU_arch_none, C6XABI_Tag_CPU_arch_C62X,
	C6XABI_Tag_CPU_arch_C67X, C6XABI_Tag_CPU_arch_C67XP,
	C6XABI_Tag_CPU_arch_C64X, C6XABI_Tag_CPU_arch_C64XP,
	C6XABI_Tag_CPU_arch_C674X): Define.

ld:
	* emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Define.

ld/testsuite:
	* ld-elf/orphan3.d: Allow section names starting '_'.
	* ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d,
	ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d,
	ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d,
	ld-tic6x/attr-arch-c62x.s, ld-tic6x/attr-arch-c64x+-c62x.d,
	ld-tic6x/attr-arch-c64x+-c64x+.d, ld-tic6x/attr-arch-c64x+-c64x.d,
	ld-tic6x/attr-arch-c64x+-c674x.d,
	ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d,
	ld-tic6x/attr-arch-c64x+.s, ld-tic6x/attr-arch-c64x-c62x.d,
	ld-tic6x/attr-arch-c64x-c64x+.d, ld-tic6x/attr-arch-c64x-c64x.d,
	ld-tic6x/attr-arch-c64x-c674x.d, ld-tic6x/attr-arch-c64x-c67x+.d,
	ld-tic6x/attr-arch-c64x-c67x.d, ld-tic6x/attr-arch-c64x.s,
	ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d,
	ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d,
	ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d,
	ld-tic6x/attr-arch-c674x.s, ld-tic6x/attr-arch-c67x+-c62x.d,
	ld-tic6x/attr-arch-c67x+-c64x+.d, ld-tic6x/attr-arch-c67x+-c64x.d,
	ld-tic6x/attr-arch-c67x+-c674x.d,
	ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d,
	ld-tic6x/attr-arch-c67x+.s, ld-tic6x/attr-arch-c67x-c62x.d,
	ld-tic6x/attr-arch-c67x-c64x+.d, ld-tic6x/attr-arch-c67x-c64x.d,
	ld-tic6x/attr-arch-c67x-c674x.d, ld-tic6x/attr-arch-c67x-c67x+.d,
	ld-tic6x/attr-arch-c67x-c67x.d, ld-tic6x/attr-arch-c67x.s: New.
2010-06-16 00:36:04 +00:00
Bernd Schmidt
11dd4e37b4 * emulparams/elf32_tic6x_le.sh (OTHER_BSS_SECTIONS): New. 2010-06-08 20:15:18 +00:00
Nick Clifton
8e45593ff3 2010-05-21 Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers  <joseph@codesourcery.com>
            Andrew Stubbs  <ams@codesourcery.com>

        bfd/
        * config.bfd (sh-*-uclinux* | sh[12]-*-uclinux*): Add
        bfd_elf32_shl_vec, and FDPIC vectors to targ_selvecs.
        * configure.in: Handle FDPIC vectors.
        * elf32-sh-relocs.h: Add FDPIC and movi20 relocations.
        * elf32-sh.c (DEFAULT_STACK_SIZE): Define.
        (SYMBOL_FUNCDESC_LOCAL): Define.  Use it instead of
        SYMBOL_REFERENCES_LOCAL for function descriptors.
        (fdpic_object_p): New.
        (sh_reloc_map): Add FDPIC and movi20 relocations.
        (sh_elf_info_to_howto, sh_elf_relocate_section): Handle new invalid
        range.
        (struct elf_sh_plt_info): Add got20 and short_plt.  Update all
        definitions.
        (FDPIC_PLT_ENTRY_SIZE, FDPIC_PLT_LAZY_OFFSET): Define.
        (fdpic_sh_plt_entry_be, fdpic_sh_plt_entry_le, fdpic_sh_plts): New.
        (FDPIC_SH2A_PLT_ENTRY_SIZE, FDPIC_SH2A_PLT_LAZY_OFFSET): Define.
        (fdpic_sh2a_plt_entry_be, fdpic_sh2a_plt_entry_le)
        (fdpic_sh2a_short_plt_be, fdpic_sh2a_short_plt_le, fdpic_sh2a_plts):
        New.
        (get_plt_info): Handle FDPIC.
        (MAX_SHORT_PLT): Define.
        (get_plt_index, get_plt_offset): Handle short_plt.
        (union gotref): New.
        (struct elf_sh_link_hash_entry): Add funcdesc, rename tls_type to
        got_type and adjust all uses.  Add GOT_FUNCDESC.
        (struct sh_elf_obj_tdata): Add local_funcdesc.  Rename
        local_got_tls_type to local_got_type.
        (sh_elf_local_got_type): Renamed from sh_elf_local_got_tls_type.  All
        users changed.
        (sh_elf_local_funcdesc): Define.
        (struct elf_sh_link_hash_table): Add sfuncdesc, srelfuncdesc, fdpic_p,
        and srofixup.
        (sh_elf_link_hash_newfunc): Initialize new fields.
        (sh_elf_link_hash_table_create): Set fdpic_p.
        (sh_elf_omit_section_dynsym): New.
        (create_got_section): Create .got.funcdesc, .rela.got.funcdesc
        and .rofixup.
        (allocate_dynrelocs): Allocate local function descriptors and space
        for R_SH_FUNCDESC-related relocations, and for rofixups.
        Handle GOT_FUNCDESC.  Create fixups.  Handle GOT entries which
        require function descriptors.
        (sh_elf_always_size_sections): Handle PT_GNU_STACK and __stacksize.
        (sh_elf_modify_program_headers): New.
        (sh_elf_size_dynamic_sections): Allocate function descriptors for
        local symbols.  Allocate .got.funcdesc contents.  Allocate rofixups.
        Handle local GOT entries of type GOT_FUNCDESC.  Create fixups for
        local GOT entries.  Ensure that FDPIC libraries always have a PLTGOT
        entry in the .dynamic section.
        (sh_elf_add_dyn_reloc, sh_elf_got_offset, sh_elf_initialize_funcdesc)
        (sh_elf_add_rofixup, sh_elf_osec_to_segment)
        (sh_elf_osec_readonly_p, install_movi20_field): New functions.
        (sh_elf_relocate_section): Handle new relocations, R_SH_FUNCDESC,
        R_SH_GOTFUNCDESC and R_SH_GOTOFFFUNCDESC.  Use sh_elf_got_offset
        and .got.plt throughout to find _GLOBAL_OFFSET_TABLE_.  Add rofixup
        read-only section warnings.  Handle undefined weak symbols.  Generate
        fixups for R_SH_DIR32 and GOT entries.  Check for cross-segment
        relocations and clear EF_SH_PIC.  Handle 20-bit relocations.
        Always generate R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
        (sh_elf_gc_sweep_hook): Handle R_SH_FUNCDESC, R_SH_GOTOFF20,
        R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20, and R_SH_GOTOFFFUNCDESC.
        Handle 20-bit relocations.
        (sh_elf_copy_indirect_symbol): Copy function descriptor reference
        counts.
        (sh_elf_check_relocs): Handle new relocations.  Make symbols
        dynamic for FDPIC relocs.  Account for rofixups.  Error for FDPIC
        symbol mismatches.  Allocate a GOT for R_SH_DIR32. Allocate fixups
        for R_SH_DIR32.
        (sh_elf_copy_private_data): Copy PT_GNU_STACK size.
        (sh_elf_merge_private_data): Copy initial flags.  Do not clobber
        non-mach flags.  Set EF_SH_PIC for FDPIC.  Reject FDPIC mismatches.
        (sh_elf_finish_dynamic_symbol): Do not handle got_funcdesc entries
        here.  Rename sgot to sgotplt and srel to srelplt.  Handle short_plt,
        FDPIC descriptors, and got20.  Create R_SH_FUNCDESC_VALUE for FDPIC.
        Use install_movi20_field.  Rename srel to srelgot.  Always generate
        R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
        (sh_elf_finish_dynamic_sections): Fill in the GOT pointer in rofixup.
        Do not fill in reserved GOT entries for FDPIC.  Correct DT_PLTGOT.
        Rename sgot to sgotplt.  Assert that the right number of rofixups
        and dynamic relocations were allocated.
        (sh_elf_use_relative_eh_frame, sh_elf_encode_eh_address): New.
        (elf_backend_omit_section_dynsym): Use sh_elf_omit_section_dynsym.
        (elf_backend_can_make_relative_eh_frame)
        (elf_backend_can_make_lsda_relative_eh_frame)
        (elf_backend_encode_eh_address): Define.
        (TARGET_BIG_SYM, TARGET_BIG_NAME, TARGET_LITTLE_SYM)
        (TARGET_LITTLE_NAME, elf_backend_modify_program_headers, elf32_bed):
        Redefine for FDPIC vector.
        * reloc.c: Add SH FDPIC and movi20 relocations.
        * targets.c (_bfd_target_vector): Add FDPIC vectors.
        * configure, bfd-in2.h, libbfd.h: Regenerated.

        binutils/
        * readelf.c (get_machine_flags): Handle EF_SH_PIC and EF_SH_FDPIC.

        gas/
        * config/tc-sh.c (sh_fdpic): New.
        (sh_check_fixup): Handle relocations on movi20.
        (parse_exp): Do not reject PIC operators here.
        (build_Mytes): Check for unhandled PIC operators here.  Use
        sh_check_fixup for movi20.
        (enum options): Add OPTION_FDPIC.
        (md_longopts, md_parse_option, md_show_usage): Add --fdpic.
        (sh_fix_adjustable, md_apply_fix): Handle FDPIC and movi20 relocations.
        (sh_elf_final_processing): Handle --fdpic.
        (sh_uclinux_target_format): New.
        (sh_parse_name): Handle FDPIC relocation operators.
        * config/tc-sh.h (TARGET_FORMAT): Define specially for TE_UCLINUX.
        (sh_uclinux_target_format): Declare for TE_UCLINUX.
        * configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): Set
        em=uclinux.
        * doc/c-sh.texi (SH Options): Document --fdpic.

        gas/testsuite/
        * gas/sh/basic.exp: Run new tests.  Handle uClinux like Linux.
        * gas/sh/fdpic.d: New file.
        * gas/sh/fdpic.s: New file.
        * gas/sh/reg-prefix.d: Force big-endian.
        * gas/sh/sh2a-pic.d: New file.
        * gas/sh/sh2a-pic.s: New file.
        * lib/gas-defs.exp (is_elf_format): Include sh*-*-uclinux*.

        include/elf/
        * sh.h (EF_SH_PIC, EF_SH_FDPIC): Define.
        (R_SH_FIRST_INVALID_RELOC_6, R_SH_LAST_INVALID_RELOC_6): New.  Adjust
        other invalid ranges.
        (R_SH_GOT20, R_SH_GOTOFF20, R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20)
        (R_SH_GOTOFFFUNCDESC, R_SH_GOTOFFFUNCDESC20, R_SH_FUNCDESC)
        (R_SH_FUNCDESC_VALUE): New.

        ld/
        * Makefile.am (ALL_EMULATIONS): Add eshelf_fd.o and eshlelf_fd.o.
        (eshelf_fd.c, eshlelf_fd.c): New rules.
        * Makefile.in: Regenerate.
        * configure.tgt (sh-*-uclinux*): Add shelf_fd and shlelf_fd
        emulations.
        * emulparams/shelf_fd.sh: New file.
        * emulparams/shlelf_fd.sh: New file.
        * emulparams/shlelf_linux.sh: Update comment.

        ld/testsuite/
        * ld-sh/sh.exp: Handle uClinux like Linux.
        * lib/ld-lib.exp (is_elf_format): Include sh*-*-uclinux*.
        * ld-sh/fdpic-funcdesc-shared.d: New file.
        * ld-sh/fdpic-funcdesc-shared.s: New file.
        * ld-sh/fdpic-funcdesc-static.d: New file.
        * ld-sh/fdpic-funcdesc-static.s: New file.
        * ld-sh/fdpic-gotfuncdesc-shared.d: New file.
        * ld-sh/fdpic-gotfuncdesc-shared.s: New file.
        * ld-sh/fdpic-gotfuncdesc-static.d: New file.
        * ld-sh/fdpic-gotfuncdesc-static.s: New file.
        * ld-sh/fdpic-gotfuncdesci20-shared.d: New file.
        * ld-sh/fdpic-gotfuncdesci20-shared.s: New file.
        * ld-sh/fdpic-gotfuncdesci20-static.d: New file.
        * ld-sh/fdpic-gotfuncdesci20-static.s: New file.
        * ld-sh/fdpic-goti20-shared.d: New file.
        * ld-sh/fdpic-goti20-shared.s: New file.
        * ld-sh/fdpic-goti20-static.d: New file.
        * ld-sh/fdpic-goti20-static.s: New file.
        * ld-sh/fdpic-gotofffuncdesc-shared.d: New file.
        * ld-sh/fdpic-gotofffuncdesc-shared.s: New file.
        * ld-sh/fdpic-gotofffuncdesc-static.d: New file.
        * ld-sh/fdpic-gotofffuncdesc-static.s: New file.
        * ld-sh/fdpic-gotofffuncdesci20-shared.d: New file.
        * ld-sh/fdpic-gotofffuncdesci20-shared.s: New file.
        * ld-sh/fdpic-gotofffuncdesci20-static.d: New file.
        * ld-sh/fdpic-gotofffuncdesci20-static.s: New file.
        * ld-sh/fdpic-gotoffi20-shared.d: New file.
        * ld-sh/fdpic-gotoffi20-shared.s: New file.
        * ld-sh/fdpic-gotoffi20-static.d: New file.
        * ld-sh/fdpic-gotoffi20-static.s: New file.
        * ld-sh/fdpic-plt-be.d: New file.
        * ld-sh/fdpic-plt-le.d: New file.
        * ld-sh/fdpic-plt.s: New file.
        * ld-sh/fdpic-plti20-be.d: New file.
        * ld-sh/fdpic-plti20-le.d: New file.
        * ld-sh/fdpic-stack-default.d: New file.
        * ld-sh/fdpic-stack-size.d: New file.
        * ld-sh/fdpic-stack.s: New file.
2010-05-25 14:12:43 +00:00
Tristan Gingold
8b351884bb 2010-04-14 Tristan Gingold <gingold@adacore.com>
* emulparams/alphavms.sh: New file.
	* emultempl/vms.em: New file.
	* scripttempl/alphavms.sc: New file.
	* configure.tgt (alpha*-*-*vms*): Added.
	* Makefile.am (ALL_EMULATIONS): Add ealphavms.o
	(ealphavms.c): New target.
	* Makefile.in: Regenerate.
2010-04-14 09:27:27 +00:00
Joseph Myers
40b365969f bfd:
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
	(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
	(BFD32_BACKENDS): Add elf32-tic6x.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
	* Makefile.in: Regenerate.
	* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
	(bfd_archures_list): Update.
	* config.bfd (tic6x-*-elf): New.
	* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
	New.
	* configure: Regenerate.
	* cpu-tic6x.c, elf32-tic6x.c: New.
	* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
	BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
	BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
	BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
	BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
	BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
	BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
	BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
	BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
	BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
	BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
	BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
	BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
	* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
	(_bfd_target_vector): Update.
	* bfd-in2.h, libbfd.h: Regenerate.

binutils:
	* MAINTAINERS: Add self as TI C6X maintainer.
	* NEWS: Add news entry for TI C6X support.
	* readelf.c: Include elf/tic6x.h.
	(guess_is_rela): Handle EM_TI_C6000.
	(dump_relocations): Likewise.
	(get_tic6x_dynamic_type): New.
	(get_dynamic_type): Call it.
	(get_machine_flags): Handle EF_C6000_REL.
	(get_osabi_name): Handle machine-specific values only for relevant
	machines.  Handle C6X values.
	(get_tic6x_segment_type): New.
	(get_segment_type): Call it.
	(get_tic6x_section_type_name): New.
	(get_section_type_name): Call it.
	(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
	EM_TI_C6000.

gas:
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
	(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
	* Makefile.in: Regenerate.
	* NEWS: Add news entry for TI C6X support.
	* app.c (do_scrub_chars): Handle "||^" for TI C6X.  Handle
	TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR.  Keep spaces in
	operands if TC_KEEP_OPERAND_SPACES.
	* configure.tgt (tic6x-*-*): New.
	* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
	TC_PREDICATE_END_CHAR): Define.
	* config/tc-tic6x.c, config/tc-tic6x.h: New.
	* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TIC6X): Define.
	* doc/as.texinfo: Add TI C6X documentation.  Include c-tic6x.texi.
	* doc/c-tic6x.texi: New.

gas/testsuite:
	* gas/tic6x: New directory and testcases.

include:
	* dis-asm.h (print_insn_tic6x): Declare.

include/elf:
	* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
	* tic6x.h: New.

include/opcode:
	* tic6x-control-registers.h, tic6x-insn-formats.h,
	tic6x-opcode-table.h, tic6x.h: New.

ld:
	* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
	eelf32_tic6x_le.o.
	(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
	* NEWS: Add news entry for TI C6X support.
	* configure.tgt (tic6x-*-*): New.
	* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.

ld/testsuite:
	* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
	* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
	* ld-tic6x: New directory and testcases.

opcodes:
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	* Makefile.in: Regenerate.
	* configure.in (bfd_tic6x_arch): New.
	* configure: Regenerate.
	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	(disassembler): Handle TI C6X.
	* tic6x-dis.c: New.
2010-03-25 21:12:36 +00:00
Alan Modra
0002cc9f07 rename files 2010-03-17 08:46:49 +00:00
Rainer Orth
a6cc6b3bc4 ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_sparc_sol2.o,
	eelf_i386_sol2.o.
	(ALL_64_EMULATIONS): Add eelf_x86_64_sol2.o, eelf64_sparc_sol2.o.
	(eelf32_sparc_sol2.c): New rule.
	(eelf64_sparc_sol2.c): Likewise.
	(eelf_x86_64_sol2.c): Likewise.
	(eelf_i386_sol2.c): Likewise.
	* Makefile.in: Regenerate.
	* configure.tgt (i[3-7]86-*-solaris2*): Change targ_emul to
	elf_i386_sol2.
	Add elf_i386_ldso, elf_x86_64_sol2 to targ_extra_emuls.
	(x86_64-*-solaris2*): Change targ_emul to elf_x86_64_sol2.
	Add elf_x86_64, elf_i386_sol2, elf_i386 to targ_extra_emuls.
	(sparc-*-solaris2.[0-6]*): Change targ_emul to elf32_sparc_sol2.
	Add target_extra_emuls.
	(sparc-*-solaris2*): Change targ_emul to elf32_sparc_sol2.
	Add elf32_sparc, elf64_sparc_sol2 to targ_extra_emuls.
	(sparcv9-*-solaris2*): Change targ_emul to elf64_sparc_sol2.
	Add elf64_sparc, elf32_sparc_sol2 to target_extra_emuls.
	* emulparams/elf32_sparc_sol2.sh: New file.
	* emulparams/elf64_sparc_sol2.sh: New file.
	* emulparams/elf_i386_sol2.sh: New file.
	* emulparams/elf_x86_64_sol2.sh: New file.
	* emultempl/solaris2.em: New file.

	bfd:
	* elflink.c (bfd_elf_size_dynamic_sections): Don't emit base
	version twice.
	Skip it when constructing def.vd_next.

	* elf32-i386.c (TARGET_LITTLE_SYM): Redefine to
	bfd_elf32_i386_sol2_vec.
	(TARGET_LITTLE_NAME): Redefine to elf32-i386-sol2.
	(elf32_bed): Redefine to elf32_i386_sol2_bed.
	(elf_backend_want_plt_sym): Redefine to 1.

	* elf64-x86-64.c (TARGET_LITTLE_SYM): Redefine to
	bfd_elf64_x86_64_sol2_vec.
	(TARGET_LITTLE_NAME): Redefine to elf64-x86-64-sol2.
	(elf64_bed): Redefine to elf64_x86_64_sol2_bed.
	(elf_backend_want_plt_sym): Redefine to 1.

	* config.bfd (i[3-7]86-*-solaris2*): Set targ_defvec to
	bfd_elf32_i386_sol2_vec.
	Replace bfd_elf64_x86_64_vec by bfd_elf64_x86_64_sol2_vec in
	targ64_selvecs.
	(x86_64-*-solaris2*): Set targ_defvec to bfd_elf32_i386_sol2_vec.
	Replace bfd_elf64_x86_64_vec by bfd_elf64_x86_64_sol2_vec in
	targ_selvecs.

	* configure.in: Handle bfd_elf32_i386_sol2_vec,
	bfd_elf64_x86_64_sol2_vec.
	* configure: Regenerate.

	* targets.c (bfd_elf32_i386_sol2_vec): Declare.
	(bfd_elf64_x86_64_sol2_vec): Declare.
	(_bfd_target_vector): Add bfd_elf32_i386_sol2_vec,
	bfd_elf64_x86_64_sol2_vec.
2010-03-05 19:49:00 +00:00
Alan Modra
829da89821 PR ld/11012
* emulparams/elf64ppc.sh (OTHER_GOT_RELOC_SECTIONS): Move .rela.opd ..
	(INITIAL_RELOC_SECTIONS): .. to here.  New define.
	* scripttempl/elf.sc: Expand INITIAL_RELOC_SECTIONS.
2009-12-09 01:26:03 +00:00
Thomas Schwinge
ce5181b407 ld/
2009-11-20  Thomas Schwinge  <thomas@codesourcery.com>

	* emulparams/armelf.sh (OTHER_READONLY_SECTIONS)
	<__exidx_start, __exidx_end>: Use PROVIDE_HIDDEN.
	* emulparams/armelf_linux_eabi.sh (OTHER_READONLY_SECTIONS)
	<__exidx_start, __exidx_end>: Likewise.
	* emulparams/armsymbian.sh (OTHER_READONLY_SECTIONS)
	<.ARM.exidx$$Base, __exidx_start, __exidx_end, .ARM.exidx$$Limit>:
	Likewise.

ld/testsuite/
2009-11-20  Thomas Schwinge  <thomas@codesourcery.com>

	* ld-arm/arm-dyn.ld: Adapt to main linker script changes.
	* ld-arm/arm-lib.ld: Likewise.
	* ld-arm/armthumb-lib.sym: : Adjust expected results.
	* ld-arm/farcall-mixed-app-v5.d: Likewise.
	* ld-arm/farcall-mixed-app.d: Likewise.
	* ld-arm/farcall-mixed-app.sym: Likewise.
	* ld-arm/farcall-mixed-lib.d: Likewise.
	* ld-arm/mixed-app-v5.d: Likewise.
	* ld-arm/mixed-app.d: Likewise.
	* ld-arm/mixed-app.sym: Likewise.
	* ld-arm/mixed-lib.sym: Likewise.
	* ld-arm/preempt-app.sym: Likewise.
	* ld-arm/tls-app.d: Likewise.
2009-11-20 15:04:51 +00:00
Alan Modra
7984f34977 PR ld/9863
* emulparams/armelf_linux.sh (DATA_START_SYMBOLS): Use PROVIDE
	with __data_start.
2009-11-19 07:01:40 +00:00
Kai Tietz
decfa41eac 2009-11-04 Kai Tietz <kai.tietz@onevision.com>
* emulparams/arm_epoc_pe.sh: Remove ENTRY.
        * emulparams/arm_wince_pe.sh: Likewise.
        * emulparams/i386pe.sh: Likewise.
        * emulparams/i386pe_posix.sh: Likewise.
        * emulparams/mcorepe.sh: Likewise.
        * emulparams/mipspe.sh: Likewise.
        * emulparams/ppcpe.sh: Likewise.
        * emulparams/armpe.sh: Likewise.
        * emulparams/i386pep.sh: Likewise.
        * emulparams/shpe.sh: Likewise.
        Additionally cleaned up double-defined
        variables SUBSYSTEM and INITIAL_SYMBOL_CHAR.
        * emultempl/pe.em: Remove use of ENTRY.
        (pe_subsystem): New local variable.
        (gld_XXX_before_parse): Don't set default
        entry point here.
        (set_entry_point): New function to set entry
        point.
        (set_pe_subsystem): Remove code for entry point.
        (gld_XXX_after_parse): Use set_entry_point here.
        * emultempl/pep.em: Likewise.
2009-11-04 18:13:05 +00:00
Nathan Sidwell
64c1b14eac * emulparams/vxworks.sh (OTHER_READONLY_SECTIONS): Move into ...
(OTHER_READWRITE_SECTIONS): ... here.
2009-10-29 16:43:56 +00:00
Nick Clifton
94f63f209a * emulparams/m68kelf.sh (NOP): Use 0x4e71 (nop) rather than 0x4e75
(rts).
2009-09-29 16:28:52 +00:00
Nick Clifton
c7927a3c0e bfd
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
        (ALL_MACHINES_CFILES): Add cpu-rx.c.
        (BFD32_BACKENDS): Add elf32-rx.lo.
        (BFD32_BACKENDS_CFILES): Add elf32-rx.c.
        * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
        Export bfd_rx_arch.
        (bfd_archures_list): Add bfd_rx_arch.
        * config.bfd: Add entry for rx-*-elf.
        * configure.in: Add entries for bfd_elf32_rx_le_vec and
        bfd_elf32_rx_be_vec.
        * reloc.c: Add RX relocations.
        * targets.c: Add RX target vectors.
        * Makefile.in: Regenerate.
        * bfd-in2.h: Regenerate.
        * configure: Regenerate.
        * libbfd.h: Regenerate.
        * cpu-rx.c: New file.
        * elf32-rx.c: New file.

binutils
        * readelf.c: Add support for RX target.
        * MAINTAINERS: Add DJ and NickC as maintainers for RX.

gas
        * Makefile.am: Add RX target.
        * configure.in: Likewise.
        * configure.tgt: Likewise.
        * read.c (do_repeat_with_expander): New function.
        * read.h: Provide a prototype for do_repeat_with_expander.
        * doc/Makefile.am: Add RX target documentation.
        * doc/all.texi: Likewise.
        * doc/as.texinfo: Likewise.
        * Makefile.in: Regenerate.
        * NEWS: Mention support for RX architecture.
        * configure: Regenerate.
        * doc/Makefile.in: Regenerate.
        * config/rx-defs.h: New file.
        * config/rx-parse.y: New file.
        * config/tc-rx.h: New file.
        * config/tc-rx.c: New file.
        * doc/c-rx.texi: New file.

gas/testsuite
        * gas/rx: New directory.
        * gas/rx/*: New set of test cases.
        * gas/elf/section2.e-rx: New expected output file.
        * gas/all/gas.exp: Add support for RX target.
        * gas/elf/elf.exp: Likewise.
        * gas/lns/lns.exp: Likewise.
        * gas/macros/macros.exp: Likewise.

include
        * dis-asm.h: Add prototype for print_insn_rx.

include/elf
        * rx.h: New file.

include/opcode
        * rx.h: New file.

ld
        * Makefile.am: Add rules to build RX emulation.
        * configure.tgt: Likewise.
        * NEWS: Mention support for RX architecture.
        * Makefile.in: Regenerate.
        * emulparams/elf32rx.sh: New file.
        * emultempl/rxelf.em: New file.

opcodes
        * Makefile.am: Add RX files.
        * configure.in: Add support for RX target.
        * disassemble.c: Likewise.
        * Makefile.in: Regenerate.
        * configure: Regenerate.
        * opc2c.c: New file.
        * rx-decode.c: New file.
        * rx-decode.opc: New file.
        * rx-dis.c: New file.
2009-09-29 14:17:19 +00:00
Jie Zhang
7dd8f318c1 * emulparams/elf32bfinfd.sh (OTHER_SECTIONS): Add .l2.text
and .l2.data.
2009-09-04 04:07:58 +00:00
Jie Zhang
8d17e044d8 * scripttempl/elf.sc: Add ${USER_LABEL_PREFIX} to _start, etext,
_stack and __bss_start.
	* emulparams/bfin.sh (ENTRY): Remove.
2009-09-01 02:54:10 +00:00
Nick Clifton
7ba29e2a41 Add support for Xilinx MicroBlaze processor.
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
        * bfd/Makefile.in: Same.
        * bfd/archures.c: Add bfd_arch_microblaze.
        * bfd/bfd-in2.h: Regenerate.
        * bfd/config.bfd: Add microblaze target.
        * bfd/configure: Add bfd_elf32_microblaze_vec target.
        * bfd/configure.in: Same.
        * bfd/cpu-microblaze.c: New.
        * bfd/elf32-microblaze.c: New.
        * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
        * bfd/libbfd.h: Regenerate.
        * bfd/reloc.c: Add MICROBLAZE relocations.
        * bfd/section.c: Add struct relax_table and relax_count to section.
        * bfd/targets.c: Add bfd_elf32_microblaze_vec.
        * binutils/MAINTAINERS: Add self as maintainer.
        * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
        EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
        get_machine_name().
        * config.sub: Add microblaze target.
        * configure: Same.
        * configure.ac: Same.
        * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
        TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
        DEP_microblaze_elf target.
        * gas/Makefile.in: Same.
        * gas/config/tc-microblaze.c: Add MicroBlaze assembler.
        * gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
        * gas/configure: Add microblaze target.
        * gas/configure.in: Same.
        * gas/configure.tgt: Same.
        * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
        * gas/doc/Makefile.in: Same.
        * gas/doc/all.texi: Set MICROBLAZE.
        * gas/doc/as.texinfo: Add MicroBlaze doc links.
        * gas/doc/c-microblaze.texi: New MicroBlaze docs.
        * include/dis-asm.h: Decl print_insn_microblaze().
        * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
        * include/elf/microblaze.h: New reloc definitions.
        * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
        ALL_EMULATIONS, targets.
        * ld/Makefile.in: Same.
        * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
        * ld/emulparams/elf32mb_linux.sh: New.
        * ld/emulparams/elf32microblaze.sh. New.
        * ld/scripttempl/elfmicroblaze.sc: New.
        * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
        CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
        * opcodes/Makefile.in: Same.
        * opcodes/configure: Add bfd_microblaze_arch target.
        * opcodes/configure.in: Same.
        * opcodes/disassemble.c: Define ARCH_microblaze, return
        print_insn_microblaze().
        * opcodes/microblaze-dis.c: New MicroBlaze disassembler.
        * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
        * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
Trevor Smigiel
9cc305ec20 bfd/
* elf32-spu.h (spu_elf_params): Add member emit_fixups.
	(spu_elf_size_sections): Declare prototype.
	* elf32-spu.c (spu_link_hash_table): Add member sfixup.
	(FIXUP_RECORD_SIZE, FIXUP_GET, FIXUP_PUT): New macros.
	(spu_elf_emit_fixup): New function.
	(spu_elf_relocate_section): Emit fixup for each SPU_ADDR32.
	(spu_elf_size_sections): New function.
ld/
	* emulparams/elf32_spu.sh (OTHER_READONLY_SECTIONS): Add .fixup
	section and __fixup_start symbol.
	* emultempl/spuelf.em (params): Initialize emit_fixups member.
	(spu_before_allocation): Call spu_elf_size_sections.
	(OPTION_SPU_EMIT_FIXUPS): Define.
	(PARSE_AND_LIST_LONGOPTS): Add --emit-fixups.
	(PARSE_AND_LIST_ARGS_CASES): Handle --emit-fixups.
	* ld.texinfo (--emit-fixups): Document.
ld/testsuite/
	* ld-spu/fixup.d: New.
	* ld-spu/fixup.s: New.
2009-08-05 20:40:34 +00:00
Alan Modra
8dfab6dd9a * emulparams/elf32ppc.sh (PLT): Don't include ".iplt".
* emulparams/elf_i386.sh (IREL_IN_PLT): Define.
	* emulparams/elf_x86_64.sh (IREL_IN_PLT): Define.
	* scripttempl/elf.sc: Create separate .iplt and .rela.iplt sections
	when !IREL_IN_PLT.
2009-07-29 14:59:23 +00:00
Hans-Peter Nilsson
18c32df5b4 * scripttempl/mmo.sc: For relocateable links, set $OUTPUT_FORMAT to
the new $RELOCATEABLE_OUTPUT_FORMAT, if set.
	(OUTPUT_FORMAT): Use the variable $OUTPUT_FORMAT.
	(ENTRY): Don't emit for relocateable links.
	(/DISCARD/): Don't discard .gnu.warning.* for relocateable links.
	* emulparams/mmo.sh (RELOCATEABLE_OUTPUT_FORMAT): Set, to
	elf64-mmix.
	* emulparams/elf64mmix.sh (OTHER_TEXT_SECTIONS): Empty, don't
	provide "Main" or set "_start.", for relocateable links.
2009-07-29 00:25:22 +00:00
H.J. Lu
da7a27102f Add missing files. 2009-07-25 15:08:26 +00:00
Alan Modra
e054468f6c STT_GNU_IFUNC support for PowerPC. 2009-07-10 12:19:58 +00:00
Nick Clifton
84f1b567bb * scripttempl/avr.sc (MEMORY): Use DATA_ORIGIN.
* emulparams/avr1.sh (DATA_ORIGIN): Add.
        * emulparams/avr2.sh (DATA_ORIGIN): Add.
        * emulparams/avr25.sh (DATA_ORIGIN): Add.
        * emulparams/avr3.sh (DATA_ORIGIN): Add.
        * emulparams/avr31.sh (DATA_ORIGIN): Add.
        * emulparams/avr35.sh (DATA_ORIGIN): Add.
        * emulparams/avr4.sh (DATA_ORIGIN): Add.
        * emulparams/avr5.sh (DATA_ORIGIN): Add.
        * emulparams/avr51.sh (DATA_ORIGIN): Add.
        (DATA_LENGTH): Update.
        * emulparams/avr6.sh (DATA_ORIGIN): Add.
        (DATA_LENGTH): Update.
2009-05-05 11:28:36 +00:00
Nathan Sidwell
1f7f5cbe1c * emulparams/vxworks.sh (TEXT_START_ADDR): Override. 2009-05-01 15:23:42 +00:00
Anthony Green
efaf18f368 Move moxie stack out in memory. 2009-04-30 04:29:23 +00:00
Nick Clifton
20135e4cea Add new binutils target: moxie 2009-04-16 15:39:48 +00:00
DJ Delorie
4d28413b40 [include/elf]
* mep.h (EF_MEP_CPU_C5): New.
[bfd]
	* archures.c: Add bfd_mach_mep_c5.
	* bfd-in2.h: Likewise.
	* cpu-mep.c: Add bfd_c5_arch.
	* elf32-mep.c: Support it.
[gas]
	* config/tc-mep.c: Add UCI/DSP instruction support.  Add C5 support.
	(md_show_usage): Change default endian to little.
	* config/tc-mep.h (TARGET_BYTES_BIG_ENDIAN): Change default to little.
[ld]
	* emulparams/elf32mep.sh: Change default endian to little.
2009-04-08 02:24:23 +00:00
Nick Clifton
c3b7224ae4 Add support for Score7 architecture. 2009-03-02 10:33:08 +00:00
Dave Anglin
d1bbb13a63 * configure.tgt: Only use elf64hppa target emulation for hpux.
* emulparams/elf64hppa.sh: Don't include hppa64linux.sh.
	(SCRIPT_NAME): Use new script elf64hppa.
	(SCRIPT_NAME, ELFSIZE, NO_REL_RELOCS, ARCH, MACHINE, ENTRY,
	TEMPLATE_NAME, GENERATE_SHLIB_SCRIPT, OTHER_READONLY_SECTIONS,
	OTHER_READWRITE_SECTIONS, OTHER_BSS_SECTIONS, OTHER_GOT_RELOC_SECTIONS,
	DATA_START_SYMBOLS, OTHER_SYMBOLS, DATA_PLT, PLT_BEFORE_GOT,
	TEXT_DYNAMIC): Define.
	* emulparams/hppa64linux.sh: Adjust comments.
	* scripttempl/elf64hppa.sc: New file.
2009-03-01 22:10:36 +00:00
Joseph Myers
268e4015fc * emulparams/m68kelf.sh: Add newline at end of file. 2009-02-05 21:52:36 +00:00
Nick Clifton
84e94c9023 Add LM32 port. 2008-12-23 19:10:25 +00:00
M R Swami Reddy
7251ccbfd7 * emultempl/cr16elf.em (cr16_after_open): New function to handle
CR16 ELF embedded reloc creation (ld --embedded-relocs).
        (check_sections): New function.
        (LDEMUL_AFTER_OPEN): Define.
        * emulparams/elf32cr16.sh (EMBEDDED): Define.
	* NEWS: Add comment on cr16 new feature.
2008-11-27 12:41:14 +00:00
Bob Wilson
e78c4c7ea8 * emulparams/elf32xtensa.sh (NO_REL_RELOCS): Set.
* scripttempl/elfxtensa.sc (NO_REL_RELOCS, NO_RELA_RELOCS)
	(NON_ALLOC_DYN): Import changes from elf.sc.
2008-11-03 18:52:52 +00:00
Alan Modra
f407252f29 * emulparams/elf32_i960.sh (TEMPLATE_NAME): "generic", not "elf32".
(EXTRA_EM_FILE): Define.
2008-10-22 06:06:09 +00:00
Alan Modra
485cf67968 * scripttempl/elf.sc (NO_REL_RELOCS, NO_RELA_RELOCS, NON_ALLOC_DYN):
Handle these defines.
	* emulparams/criself.sh, * emulparams/crislinux.sh,
	* emulparams/elf32am33lin.sh, * emulparams/elf32fr30.sh,
	* emulparams/elf32_i860.sh, * emulparams/elf32ip2k.sh,
	* emulparams/elf32mcore.sh, * emulparams/elf32ppccommon.sh,
	* emulparams/elf32ppcwindiss.sh, * emulparams/elf32_sparc.sh,
	* emulparams/elf32_spu.sh, * emulparams/elf32vax.sh,
	* emulparams/elf64alpha.sh, * emulparams/elf64mmix.sh,
	* emulparams/elf64ppc.sh, * emulparams/elf64_s390.sh,
	* emulparams/elf64_sparc.sh, * emulparams/elf_s390.sh,
	* emulparams/elf_x86_64.sh, * emulparams/h8300elf.sh,
	* emulparams/hppa64linux.sh, * emulparams/hppalinux.sh,
	* emulparams/m68kelf.sh, * emulparams/mn10200.sh,
	* emulparams/pjelf.sh, * emulparams/ppclynx.sh,
	* emulparams/shelf32.sh, * emulparams/shelf_nto.sh,
	* emulparams/shelf.sh, * emulparams/shelf_vxworks.sh,
	* emulparams/shlelf32_linux.sh, * emulparams/shlelf_linux.sh,
	* emulparams/shlelf_nto.sh (NO_REL_RELOCS): Set.
	* emulparams/arcelf.sh, * emulparams/elf32_i960.sh,
	* emulparams/elf32openrisc.sh, * emulparams/elf_i386_be.sh,
	* emulparams/elf_i386_ldso.sh, * emulparams/elf_i386.sh,
	* emulparams/elf_i386_vxworks.sh, * emulparams/i386lynx.sh,
	* emulparams/i386moss.sh, * emulparams/i386nto.sh,
	* emulparams/or32elf.sh, * emulparams/scoreelf.sh (NO_RELA_RELOCS): Set.
2008-10-22 05:20:44 +00:00
Joseph Myers
b796d39d3a * emulparams/elf64ppc.sh (OTHER_GOT_RELOC_SECTIONS): Add .rela.opd
and .rela.branch_lt.
2008-09-30 15:04:34 +00:00
Eric B. Weddington
7b21ac3f45 Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
	* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
	bfd_mach_avr51): New.
	* bfd-in2.h: Regenerate.
	* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
	architectures. Change comments to match architecture comments in GCC.
	(compatible): Add test for new AVR architectures.
	* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
	bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
	(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.

gas/
	* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
	architectures. Reorganize list to put mcu types in correct architectures
	and to order list same as in GCC. Use new ISA definitions in
	include/opcode/avr.h.
	* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
	descriptions. Reorganize descriptions to put mcu types in correct
	architectures and to order lists same as in GCC.

include/
	* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
	(EF_AVR_MACH): Redefine to 0x7F.
	* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
	(AVR_ISA_AVR3): Redefine.
	(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
	AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
	AVR_ISA_AVR6): Define.

ld/
	* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
	and eavr51.o.
	Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
	* Makefile.in: Regenerate.
	* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
	and avr51.
	* emulparams/avr25.sh: New file.
	* emulparams/avr31.sh: New file.
	* emulparams/avr35.sh: New file.
	* emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
Daniel Jacobowitz
861fb55ab5 2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>
	    Maxim Kuvyrkov  <maxim@codesourcery.com>

	* elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with...
	(elf_mips_copy_howto): ...this howto.  Clear the size fields.
	(mips_vxworks_jump_slot_howto_rela): Replace with...
	(elf_mips_jump_slot_howto): ...this howto.
	(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
	(elf_backend_plt_readonly): Define.
	(elf_backend_plt_sym_val): Define for non-VxWorks targets.
	(mips_vxworks_bfd_reloc_type_lookup): Delete.
	(mips_vxworks_bfd_reloc_name_lookup): Likewise.
	(mips_vxworks_rtype_to_howto): Likewise.
	(elf_backend_want_dynbss): Don't define for VxWorks.
	(elf_backend_plt_readonly): Likewise.
	(bfd_elf32_bfd_reloc_type_lookup): Likewise.
	(bfd_elf32_bfd_reloc_name_lookup): Likewise.
	(elf_backend_mips_rtype_to_howto): Likewise.
	(elf_backend_adjust_dynamic_symbol): Likewise.
	(elf_backend_got_symbol_offset): Don't define.
	* elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
	(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and
	R_MIPS_JUMP_SLOT.
	(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
	(elf_backend_plt_sym_val): Define.
	* elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
	(bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
	(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
	(elf_backend_plt_sym_val): Define.
	* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete.
	(_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs)
	(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare.
	* elfxx-mips.c (mips_elf_la25_stub): New structure.
	(LA25_LUI, LA25_J, LA25_ADDIU): New macros.
	(mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs"
	and "has_nonpic_branches" fields.  Remove "is_relocation_target" and
	"is_branch_target".
	(mips_elf_link_hash_table): Add blank lines.  Add
	"use_plts_and_copy_relocs", "reserved_gotno", "strampoline",
	"la25_stubs" and "add_stub_section" fields.
	(mips_htab_traverse_info): New structure.
	(PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros.
	(MIPS_RESERVED_GOTNO): Delete.
	(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry)
	(mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables.
	(mips_elf_link_hash_newfunc): Update after the changes to
	mips_elf_link_hash_entry.
	(mips_elf_check_mips16_stubs): Replace the DATA parameter with
	an INFO parameter.  Don't look through warnings symbols here;
	do it in mips_elf_check_symbols instead.
	(mips_elf_create_stub_symbol): New function.
	(mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions.
	(_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise.
	(mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise.
	(mips_elf_add_la25_stub, mips_elf_check_symbols): New functions.
	(mips_elf_gotplt_index): Check for VxWorks.
	(mips_elf_output_dynamic_relocation): Take the relocation index
	as an extra parameter.  Do not increment reloc_count here.
	(mips_elf_initialize_tls_slots): Update the calls to
	mips_elf_output_dynamic_relocation accordingly.
	(mips_elf_multi_got): Use htab->reserved_gotno instead of
	MIPS_RESERVED_GOTNO.
	(mips_elf_create_got_section): Don't allocate reserved GOT
	entries here.  Unconditionally create .got.plt, but don't
	set its alignment here.
	(mips_elf_relocation_needs_la25_stub): New function.
	(mips_elf_calculate_relocation): Redirect branches and jumps to
	a non-PIC stub if one exists.  Check !h->has_static_relocs instead
	of !htab->is_vxworks when deciding whether to create dynamic
	relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64.
	(_bfd_mips_elf_create_dynamic_sections): Unconditionally call
	_bfd_elf_create_dynamic_sections.  Unconditionally set up
	htab->splt and htab->sdynbss.  Set htab->srelplt to ".rel.plt"
	if !htab->is_vxworks.  Add non-VxWorks values of
	htab->plt_header_size and htab->plt_entry_size.
	(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
	non-branch static relocations.  Set has_nonpic_branches when an la25
	stub might be required.  Set can_make_dynamic_p to TRUE if R_MIPS_32,
	R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic,
	rather than duplicating the condition.  Do not make them dynamic
	for read-only sections in non-PIC executable objects.
	Do not protect this code with dynobj == NULL || htab->sgot == NULL;
	handle each group of cases separately.  Add a default case that
	sets has_static_relocs for non-GOT relocations that cannot be
	made dynamic.  Don't set is_relocation_target and is_branch_target.
	Reject non-PIC static relocations in shared objects.
	(_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into...
	(_bfd_mips_elf_adjust_dynamic_symbol): ...here, using
	htab->use_plts_and_copy_relocs instead of htab->is_vxworks
	to select PLT and copy-reloc handling.  Set the alignment of
	.plt and .got.plt when allocating the first entry.  Generalize
	code to handle REL as well as RELA sections and 64-bit as well as
	32-bit GOT entries.  Complain if we find a static-only reloc
	against an externally-defined symbol and if we cannot create
	dynamic relocations for it.  Allocate copy relocs using
	mips_elf_allocate_dynamic_relocations on non-VxWorks targets.
	Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs.
	Skip reserved .got.plt entries.
	(_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols
	instead of mips_elf_check_mips16_stubs to process each symbol.
	Do the traversal for relocatable objects too.
	(mips_elf_lay_out_got): Use htab->reserved_gotno instead of
	MIPS_RESERVED_GOTNO.
	(_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it
	is empty.  Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling
	to non-VxWorks targets.  Only add DT_REL{,A}, DT_REL{,A}SZ and
	DT_REL{,A}ENT if .rel.dyn is nonempty.  Create a symbol for the
	PLT.  Allocate a nop at the end of the PLT.  Allocate DT_MIPS_PLTGOT.
	(mips_elf_create_la25_stub_info): New function.
	(_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries
	and copy relocs where necessary.  Check pointer_equality_needed.
	(mips_finish_exec_plt): New function.
	(_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT
	to the beginning of htab->sgot.  Use htab->reserved_gotno instead
	of MIPS_RESERVED_GOTNO.  Assert htab->use_plts_and_copy_relocs
	instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL.
	Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets.
	Use mips_finish_exec_plt to create non-VxWorks PLT headers.  Set
	DT_MIPS_PLTGOT.
	(_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs
	from the indirect symbol to the direct symbol.  Also copy
	has_nonpic_branches for indirect symbols.
	(_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
	DT_MIPS_RWPLT.
	(_bfd_mips_elf_link_hash_table_create): Initialize the new
	mips_elf_link_hash_table fields.
	(_bfd_mips_vxworks_link_hash_table_create): Set
	use_plts_and_copy_relocs to TRUE.  Use TRUE rather than 1
	when setting is_vxworks.
	(_bfd_mips_elf_use_plts_and_copy_relocs): New function.
	(_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for
	each la25_stub.
	(_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects
	as PIC.  Generalize message about linking PIC and non-PIC.
	(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New
	functions.
	* reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT.
	* bfd-in2.h: Regenerated.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>

	* readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and
	STO_MIPS_PIC.
	(slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here.
	(dump_relocations, debug_apply_relocations): Don't handle it here.
	(get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT.
	(print_mips_pltgot_entry): New function.
	(process_mips_specific): Dump the PLT GOT.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
	(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
	(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
	(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
	(md_longopts): Add -call_nonpic.
	(md_parse_option): Handle OPTION_CALL_NONPIC.
	(md_show_usage): Add -call_nonpic.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>

	* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
	* gas/mips/mips.exp: Run it.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>

	* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
	(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to...
	(OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these
	two variables.
	* emulparams/elf32bmipn32-defs.sh: Likewise.
	* emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h.
	(is_mips_elf): New macro.
	(stub_file, stub_bfd): New variables.
	(hook_stub_info): New structure.
	(hook_in_stub): New function.
	(mips_add_stub_section): Likewise.
	(mips_create_output_section_statements): Likewise.
	(mips_before_allocation): Likewise.
	(real_func): New variable.
	(mips_for_each_input_file_wrapper): New function.
	(mips_lang_for_each_input_file): Likewise.
	(lang_for_each_input_file): Define.
	(LDEMUL_BEFORE_ALLOCATION): Likewise.
	(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* ld-mips-elf/mips16-pic-3a.s,
	ld-mips-elf/mips16-pic-3b.s,
	ld-mips-elf/mips16-pic-3.dd,
	ld-mips-elf/mips16-pic-3.gd,
	ld-mips-elf/mips16-pic-3.rd,
	ld-mips-elf/mips16-pic-3.inc,
	ld-mips-elf/pic-and-nonpic-1a.s,
	ld-mips-elf/pic-and-nonpic-1b.s,
	ld-mips-elf/pic-and-nonpic-1.ld,
	ld-mips-elf/pic-and-nonpic-1.dd,
	ld-mips-elf/pic-and-nonpic-1.nd,
	ld-mips-elf/pic-and-nonpic-1-rel.dd,
	ld-mips-elf/pic-and-nonpic-1-rel.nd,
	ld-mips-elf/pic-and-nonpic-2a.s,
	ld-mips-elf/pic-and-nonpic-2b.s,
	ld-mips-elf/pic-and-nonpic-2.d,
	ld-mips-elf/pic-and-nonpic-3a.s,
	ld-mips-elf/pic-and-nonpic-3a.ld,
	ld-mips-elf/pic-and-nonpic-3a.dd,
	ld-mips-elf/pic-and-nonpic-3a.gd,
	ld-mips-elf/pic-and-nonpic-3a.sd,
	ld-mips-elf/pic-and-nonpic-3b.s,
	ld-mips-elf/pic-and-nonpic-3b.ld,
	ld-mips-elf/pic-and-nonpic-3b.ad,
	ld-mips-elf/pic-and-nonpic-3b.dd,
	ld-mips-elf/pic-and-nonpic-3b.gd,
	ld-mips-elf/pic-and-nonpic-3b.nd,
	ld-mips-elf/pic-and-nonpic-3b.pd,
	ld-mips-elf/pic-and-nonpic-3b.rd,
	ld-mips-elf/pic-and-nonpic-3b.sd,
	ld-mips-elf/pic-and-nonpic-3-error.d,
	ld-mips-elf/pic-and-nonpic-4a.s,
	ld-mips-elf/pic-and-nonpic-4b.s,
	ld-mips-elf/pic-and-nonpic-4b.ld,
	ld-mips-elf/pic-and-nonpic-4b.ad,
	ld-mips-elf/pic-and-nonpic-4b.dd,
	ld-mips-elf/pic-and-nonpic-4b.gd,
	ld-mips-elf/pic-and-nonpic-4b.nd,
	ld-mips-elf/pic-and-nonpic-4b.rd,
	ld-mips-elf/pic-and-nonpic-4b.sd,
	ld-mips-elf/pic-and-nonpic-4-error.d,
	ld-mips-elf/pic-and-nonpic-5a.s,
	ld-mips-elf/pic-and-nonpic-5b.s,
	ld-mips-elf/pic-and-nonpic-5b.ld,
	ld-mips-elf/pic-and-nonpic-5b.ad,
	ld-mips-elf/pic-and-nonpic-5b.dd,
	ld-mips-elf/pic-and-nonpic-5b.gd,
	ld-mips-elf/pic-and-nonpic-5b.nd,
	ld-mips-elf/pic-and-nonpic-5b.rd,
	ld-mips-elf/pic-and-nonpic-5b.sd,
	ld-mips-elf/pic-and-nonpic-5b.pd,
	ld-mips-elf/pic-and-nonpic-6.ld,
	ld-mips-elf/pic-and-nonpic-6-o32a.s,
	ld-mips-elf/pic-and-nonpic-6-o32b.s,
	ld-mips-elf/pic-and-nonpic-6-o32c.s,
	ld-mips-elf/pic-and-nonpic-6-o32.ad,
	ld-mips-elf/pic-and-nonpic-6-o32.dd,
	ld-mips-elf/pic-and-nonpic-6-o32.gd,
	ld-mips-elf/pic-and-nonpic-6-o32.nd,
	ld-mips-elf/pic-and-nonpic-6-o32.pd,
	ld-mips-elf/pic-and-nonpic-6-o32.rd,
	ld-mips-elf/pic-and-nonpic-6-o32.sd,
	ld-mips-elf/pic-and-nonpic-6-n32a.s,
	ld-mips-elf/pic-and-nonpic-6-n32b.s,
	ld-mips-elf/pic-and-nonpic-6-n32c.s,
	ld-mips-elf/pic-and-nonpic-6-n32.ad,
	ld-mips-elf/pic-and-nonpic-6-n32.dd,
	ld-mips-elf/pic-and-nonpic-6-n32.gd,
	ld-mips-elf/pic-and-nonpic-6-n32.nd,
	ld-mips-elf/pic-and-nonpic-6-n32.pd,
	ld-mips-elf/pic-and-nonpic-6-n32.rd,
	ld-mips-elf/pic-and-nonpic-6-n32.sd,
	ld-mips-elf/pic-and-nonpic-6-n64a.s,
	ld-mips-elf/pic-and-nonpic-6-n64b.s,
	ld-mips-elf/pic-and-nonpic-6-n64c.s,
	ld-mips-elf/pic-and-nonpic-6-n64.ad,
	ld-mips-elf/pic-and-nonpic-6-n64.dd,
	ld-mips-elf/pic-and-nonpic-6-n64.gd,
	ld-mips-elf/pic-and-nonpic-6-n64.nd,
	ld-mips-elf/pic-and-nonpic-6-n64.pd,
	ld-mips-elf/pic-and-nonpic-6-n64.rd,
	ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests.
	* ld-mips-elf/mips-elf.exp: Run them.
2008-08-08 19:24:49 +00:00
Jie Zhang
b0a0b9787e bfd/
* elf32-bfin.c (elf32_bfin_special_sections[]): New.
	(elf_backend_special_sections): Define.

	ld/
	* emulparams/elf32bfinfd.sh (OTHER_SECTIONS): Define.
2008-07-15 13:09:47 +00:00
Jie Zhang
1bac266e85 Revert my last change since it has not been approved. 2008-07-12 08:54:13 +00:00
Jie Zhang
8c68457827 bfd/
* elf.c (_bfd_elf_map_sections_to_segments): Don't put
	executable sections into the same segment with other
	read only sections if --sep-code.
	* elf32-bfin.c (elf32_bfin_code_in_l1): New variable.
	(elf32_bfin_data_in_l1): New variable.
	(elf32_bfin_final_write_processing): New.
	(elf32_bfin_special_sections[]): New.
	(elf_backend_final_write_processing): Define.
	(elf_backend_special_sections): Define.

	binutils/
	* readelf.c (get_machine_flags): Deal with Blackfin specific
	flags.

	include/
	* bfdlink.h (struct bfd_link_info): Add sep_code member
	variable.
	* elf/bfin.h (EF_BFIN_CODE_IN_L1): Define.
	(EF_BFIN_DATA_IN_L1): Define.

	ld/
	* Makefile.am (eelf32bfin.c): Depend on bfin.em.
	(eelf32bfinfd.c): Likewise.
	* Makefile.in: Regenerate.
	* gen-doc.texi: Set Blackfin.
	* ld.texinfo: Document --sep-code and Blackfin specific
	options.
	* ldmain.c (main): Initialize link_info.sep_code.
	* lexsup.c (enum option_values): Add OPTION_SEP_CODE.
	(ld_options[]): Add --sep-code.
	(parse_args): Deal with --sep-code.
	* emulparams/bfin.sh (EXTRA_EM_FILE): Define.
	* emulparams/elf32bfinfd.sh (OTHER_SECTIONS): Define.
	* emultempl/bfin.em: New file.
2008-07-11 19:24:39 +00:00
Alan Modra
97407faf3d include/
* bfdlink.h (struct bfd_link_info): Add "path_separator".
bfd/
	* elf32-spu.c (spu_elf_auto_overlay): Relax requirement that
	file names be unique.  Specify archive:path in overlay script.
ld/
	* ldlang.c (name_match): New function.
	(unique_section_p, walk_wild_consider_section): Use it here.
	(walk_wild_section_general): And here.
	(archive_path): New function.
	(walk_wild): Match archive:path filespecs.
	(open_input_bfds): Don't load archive:path files.
	* emultempl/spuelf.em (choose_target): Set path_separator.
	* emulparams/elf32_spu.sh: Add ._ea.* sections to ._ea output.
2008-06-06 06:02:00 +00:00
Alan Modra
8374f9d4b5 bfd/
* elf32-spu.c (spu_elf_special_sections): Add "._ea".
	(spu_elf_relocate_section): Handle relocations against symbols
	defined in ._ea specially.
binutils/
	* embedspu.sh: Take note of R_SPU_PPU32/64 relocs without a symbol,
	and if present, put image in ".data.speelf".  Put program handle
	in ".data.spehandle".
ld/emulparams/
	* elf32_spu.sh (OTHER_SECTIONS): Add "._ea".
	* elf32ppc.sh: If building with spu support, put ".data.spehandle"
	sections at the start of ".data" and provide a symbol to locate
	the directory of embedded spe programs.
ld/testsuite/
	* ld-spu/ear.s: Align various sections.
	* ld-spu/embed.rd: Update.
2008-05-07 14:46:44 +00:00
Nick Clifton
9e44863147 * emulparams/m68kelf.sh (GENERATE_PIE_SCRIPT): Define.
(COMMONPAGESIZE): Define.
2008-03-06 12:29:52 +00:00
Paul Brook
845b51d665 2008-02-20 Paul Brook <paul@codesourcery.com>
ld/
	* emultempl/armelf.em (OPTION_FIX_V4BX_INTERWORKING): Define.
	(PARSE_AND_LIST_LONGOPTS): Add fix-v4bx-interworking.
	(PARSE_AND_LIST_OPTIONS): Ditto.
	(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FIX_V4BX_INTERWORKING.
	* emulparams/armelf.sh (OTHER_TEXT_SECTIONS): Add .v4_bx.
	* emulparams/armelf_linux.sh (OTHER_TEXT_SECTIONS): Ditto.
	* emulparams/armnto.sh (OTHER_TEXT_SECTIONS): Ditto.
	* ld.texinfo: Document --fix-v4bx-interworking.

	ld/testsuite/
	* ld-arm/armv4-bx.d: New test.
	* ld-arm/armv4-bx.s: New test.
	* ld-arm/arm.ld: Add .v4bx.
	* ld-arm/arm-elf.exp: Add armv4-bx.

	gas/testsuite/
	* gas/arm/thumb.d: Exclude EABI targets.
	* gas/arm/arch4t.d: Exclude EABI targts.
	* gas/arm/v4bx.d: New test.
	* gas/arm/v4bx.s: New test.
	* gas/arm/thumb-eabi.d: New test.
	* gas/arm/arch4t-eabi.d: New test.

	gas/
	* config/tc-arm.c (fix_v4bx): New variable.
	(do_bx): Generate V4BX relocations.
	(md_assemble): Allow bx on v4 codes when fix_v4bx.
	(md_apply_fix): Handle BFD_RELOC_ARM_V4BX.
	(tc_gen_reloc): Ditto.
	(OPTION_FIX_V4BX): Define.
	(md_longopts): Add fix-v4bx.
	(md_parse_option): Handle OPTION_FIX_V4BX.
	(md_show_usage): Document --fix-v4bx.
	* doc/c-arm.texi: Document --fix-v4bx.

	bfd/
	* reloc.c: Add BFD_RELOC_ARM_V4BX.
	* elf32-arm.c (elf32_arm_reloc_map): Add BFD_RELOC_ARM_V4BX.
	(ARM_BX_GLUE_SECTION_NAME, ARM_BX_GLUE_SECTION_NAME): Define.
	(elf32_arm_link_hash_table): Add bx_glue_size and bx_glue_offset.
	Update comment for fix_v4bx.
	(elf32_arm_link_hash_table_create): Zero bx_glue_size and
	bx_glue_offset.
	(ARM_BX_VENEER_SIZE, armbx1_tst_insn, armbx2_moveq_insn,
	armbx3_bx_insn): New.
	(bfd_elf32_arm_allocate_interworking_sections): Allocate BX veneer
	section.
	(bfd_elf32_arm_add_glue_sections_to_bfd): Ditto.
	(bfd_elf32_arm_process_before_allocation): Record BX veneers.
	(record_arm_bx_glue, elf32_arm_bx_glue): New functions.
	(elf32_arm_final_link_relocate): Handle BX veneers.
	(elf32_arm_output_arch_local_syms): Output mapping symbol for .v4_bx.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
2008-02-20 15:17:56 +00:00