Commit graph

5722 commits

Author SHA1 Message Date
Ulrich Drepper
4bde3cdd70 Update x86 register name documentation.
* doc/c-i386.texi (Register Naming): Update to details of the
        latest architecture version.
2016-03-15 11:00:28 +00:00
Mickael Guene
a9f02af88d PR gas/19744: Thumb-1 pcrop relocations don't work on Thumb-2 targets
gas/
	* config/tc-arm.c (do_arit): Protect against bad relocations usage.
	(do_mov): Likewise.
	(do_t_add_sub): Allow pcrop relocations for Thumb-2 targets.
	(do_t_mov_cmp): Likewise.
	(do_t_add_sub): Protect against bad relocations usage.
	(do_t_mov_cmp): Likewise.

	gas/testsuite/
	* gas/arm/adds-thumb1-reloc-local-armv7-m.s: New.
	* gas/arm/adds-thumb1-reloc-local-armv7-m.d: New.
	* gas/arm/movs-thumb1-reloc-local-armv7-m.s: New.
	* gas/arm/movs-thumb1-reloc-local-armv7-m.d: New.

	ld/
	* testsuite/ld-arm/arm-elf.exp: New tests.
	* testsuite/ld-arm/thumb1-adds-armv7-m.s: New.
	* testsuite/ld-arm/thumb1-movs-armv7-m.s: New.
2016-03-10 17:06:35 +01:00
Trevor Saunders
aa8a08637e fixup -Wshadow warnings on gcc-4.7
gcc 4.7 complains about variables that shadow function names, which now happens
in tc-arm.c because there is a global function do_align (), and local variables
do_align.  The simplest fix for this seems to be to rename those variables to
do_alignment.

gas/ChangeLog:

2016-03-09  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* config/tc-arm.c (neon_alignment_bit): Rename do_align to
	do_alignment.
	(do_neon_ld_st_lane): Likewise.
	(do_neon_ld_dup): Likewise.
2016-03-09 09:29:17 -05:00
Claudiu Zissulescu
72f3b6aae7 [ARC] Allow non-instruction relocations within .text sections
bfd/
2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
	    Andrew Burgess  <andrew.burgess@embecosm.com>

	* elf32-arc.c (arc_bfd_get_32): Becomes an alias for bfd_get_32.
	(arc_bfd_put_32): Becomes an alias for bfd_put_32.
	(arc_elf_howto_init): Added assert to validate relocations.
	(get_middle_endian_relocation): Delete.
	(middle_endian_convert): New function.
	(ME): Redefine, now does nothing.
	(IS_ME): New define.
	(arc_do_relocation): Extend the attached 'ARC_RELOC_HOWTO'
	definition to call middle_endian_convert.  Add a new local
	variable and make use of this throughout. Added call to
	arc_bfd_get_8 and arc_bfd_put_8 for 8 bit relocations.

gas/
2016-03-08  Andrew Burgess  <andrew.burgess@embecosm.com>

	* testsuite/gas/arc/inline-data-1.d: New file.
	* testsuite/gas/arc/inline-data-1.s: New file.

include/
2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
	    Andrew Burgess  <andrew.burgess@embecosm.com>

	* elf/arc-reloc.def: Add a call to ME within the formula for each
	relocation that requires middle-endian correction.
2016-03-08 14:19:52 +01:00
Thomas Preud'homme
5f47401071 [ARM] Add support for Cortex-R8
2016-03-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>

gas/
    * config/tc-arm.c (arm_cpus): Add cortex-r8.
    * doc/c-arm.texi: Add cortex-r8.
2016-03-07 17:35:29 +00:00
Trevor Saunders
f86f586366 Add const qualifiers at various places.
opcodes	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

include	* opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
	* opcode/h8300.h (struct h8_opcode): Likewise.
	* opcode/hppa.h (struct pa_opcode): Likewise.
	* opcode/msp430.h: Likewise.
	* opcode/spu.h (struct spu_opcode): Likewise.
	* opcode/tic30.h (struct _register): Likewise.
	* opcode/tic4x.h (struct tic4x_register): Likewise.
	(struct tic4x_cond): Likewise.
	(struct tic4x_indirect): Likewise.
	(struct tic4x_inst): Likewise.
	* opcode/visium.h (struct reg_entry): Likewise.

gas	* config/tc-arc.c: Add const qualifiers.
	* config/tc-h8300.c (md_begin): Likewise.
	* config/tc-ia64.c (print_prmask): Likewise.
	* config/tc-msp430.c (msp430_operands): Likewise.
	* config/tc-nds32.c (struct suffix_name): Likewise.
	(struct nds32_parse_option_table): Likewise.
	(struct nds32_set_option_table): Likewise.
	(do_pseudo_pushpopm): Likewise.
	(do_pseudo_pushpop_stack): Likewise.
	(nds32_relax_relocs): Likewise.
	(nds32_flag): Likewise.
	(struct nds32_hint_map): Likewise.
	(nds32_find_reloc_table): Likewise.
	(nds32_match_hint_insn): Likewise.
	* config/tc-s390.c: Likewise.
	* config/tc-sh.c (get_specific): Likewise.
	* config/tc-tic30.c: Likewise.
	* config/tc-tic4x.c (tic4x_inst_add): Likewise.
	(tic4x_indirect_parse): Likewise.
	* config/tc-vax.c (vax_cons): Likewise.
	* config/tc-z80.c (struct reg_entry): Likewise.
	* config/tc-epiphany.c (md_assemble): Adjust.
	(epiphany_assemble): New function.
	(epiphany_elf_section_rtn): Call do_align directly.
	(epiphany_elf_section_text): Likewise.
	* config/tc-ip2k.c (ip2k_elf_section_rtn): Likewise.
	(ip2k_elf_section_text): Likewise.
	* read.c (do_align): Make it not static.
	* read.h (do_align): New prototype.
2016-03-07 15:16:28 +00:00
Matthew Wahab
9411fd44aa [ARM] Build attributes for ARMv8.1-A AdvSIMD
binutils/
2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>

	* readelf.c (arm_attry_tag_FP_arch): Add "NEON for ARMv8.1".

gas/
2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>

	* config/tc-arm.c (aeabi_set_public_attributes): Emit attribute
	for ARMv8.1 AdvSIMD use.
	* testsuite/gas/arm/attr-march-armv8-a+rdma.d: New.
	* testsuite/gas/arm/attr-march-armv8_1-a+simd.d: New.

Change-Id: I3c356e0681b97df2f9c0dabd7c0fd1b441cc2755
2016-03-04 14:16:48 +00:00
Matthew Wahab
643afb90da [ARM] Add feature check for ARMv8.1 AdvSIMD instructions.
gas/
2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>

	* config/gas/tc-arm.c (fpu_neon_ext_v8_1): Restrict to the ARMv8.1 RDMA
	feature.
	(record_feature_use): New.
	(mark_feature_used): Use record_feature_use.
	(do_neon_qrdmlah): New.
	(insns): Use do_neon_qrdmlah for vqrdmlah and vqrdmlsh and
	variants.
	(arm_extensions): Put into alphabetical order.  Re-indent "simd"
	and "rdma" entries.  Fix the incorrect merge value for "+rdma".
	* testsuite/gas/arm/armv8-a+rdma-warning.d: New.
	* testsuite/gas/arm/armv8-a+rdma.d: Add assembler command line options.
	Make source file explicit.
	* testsuite/gas/arm/armv8-a+rdma.l: New.
	* testsuite/gas/arm/armv8-a+rdma.s: Remove .arch and .arch_extension
	directives.  Fix white-space.
	* testsuite/gas/arm/armv8_1-a+simd.d: New.

include/opcode
2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>

	* arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
	(ARM_CPU_HAS_FEATURE): Add comment.

Change-Id: Ie19250e8fa50aed44e44ab40ff30b04b38bc1a3d
2016-03-04 11:32:04 +00:00
H.J. Lu
25aa3689f0 Adjust testsuite/gas/i386/x86_64-intel.d for COFF
* testsuite/gas/i386/x86_64-intel.d: Adjusted for COFF.
2016-03-02 05:15:32 -08:00
Claudiu Zissulescu
841fdfcdd9 [ARC] Local symbols relocation cleanup
bfd/
2016-02-29  Cupertino Miranda  <cmiranda@synopsys.com>

	* elf32-arc.c (elf_arc_relocate_section): Added rules to fix the
	relocation addend when sections get merged.

gas/
2016-02-29  Cupertino Miranda  <cmiranda@synopsys.com>
	    Claudiu Zissulescu  <Claudiu.Zissulescu@synopsys.com>

        * config/tc-arc.c (arc_extra_reloc): Change size to 0.
        (tc_arc_fix_adjustable): Changed default return value to 1.
        * testsuite/gas/arc/j.d: Updated expected symbol
        * testsuite/gas/arc/jl.d: Likewise
        * testsuite/gas/arc/relax-avoid1.d: Likewise
        * testsuite/gas/arc/st.d: Likewise

ld/
2016-02-29 Cupertino Miranda  <cmiranda@synopsys.com>

	* testsuite/ld-elf/merge.d: Removed xfail for ARC.
	* testsuite/ld-elf/merge2.d: Likewise.
	* testsuite/ld-elf/merge3.d: Likewise.
2016-02-29 16:51:11 +01:00
Claudiu Zissulescu
7e4588997e [ARC] General fixes.
bfd/
2016-02-29  Cupertino Miranda <Cupertino.Miranda@synopsys.com>

	* elf32-arc.c (arc_elf_final_write_processing): Add condition to
	the flag change.
        (elf_arc_relocate_section): Fixes and conditions to support PIE.
	Assert for code sections dynamic relocs.

gas/
2016-02-29  Claudiu Zissulescu  <Claudiu.Zissulescu@synopsys.com>

	* config/tc-arc.c: Enable code density instructions for ARC EM.

ld/
2016-02-29  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>

	* scripttempl/arclinux.sc: Force .tdata and .tbss to always be
	generated.
2016-02-29 16:07:48 +01:00
H.J. Lu
11e5f1ec54 Add ChangeLog entries for PR ld/19645 2016-02-26 06:44:03 -08:00
Trevor Saunders
e0471c16c5 Convert more variables to a constant form.
* as.c (select_emulation_mode): Add const qualifiers.
	* as.h: Likewise.
	* config/bfin-defs.h: Likewise.
	* config/bfin-parse.y: Likewise.
	* config/rx-parse.y: Likewise.
	* config/tc-aarch64.c (struct aarch64_option_table): Likewise.
	(struct aarch64_cpu_option_table): Likewise.
	(struct aarch64_arch_option_table): Likewise.
	(struct aarch64_option_cpu_value_table): Likewise.
	(struct aarch64_long_option_table): Likewise.
	(struct aarch64_option_abi_value_table): Likewise.
	* config/tc-arm.c (struct reloc_entry): Likewise.
	(tc_gen_reloc): Likewise.
	(struct arm_option_table): Likewise.
	(struct arm_legacy_option_table): Likewise.
	(struct arm_cpu_option_table): Likewise.
	(struct arm_arch_option_table): Likewise.
	(struct arm_option_extension_value_table): Likewise.
	(struct arm_option_fpu_value_table): Likewise.
	(struct arm_option_value_table): Likewise.
	(struct arm_long_option_table): Likewise.
	* config/tc-avr.c (struct avr_opcodes_s): Likewise.
	(struct mcu_type_s): Likewise.
	(struct exp_mod_s): Likewise.
	(avr_operand): Likewise.
	(avr_operands): Likewise.
	* config/tc-d10v.c (md_begin): Likewise.
	* config/tc-dlx.c: Likewise.
	* config/tc-fr30.c (fr30_is_colon_insn): Likewise.
	* config/tc-ft32.c (parse_condition): Likewise.
	* config/tc-h8300.c (do_a_fix_imm): Likewise.
	* config/tc-hppa.c (pa_ip): Likewise.
	(hppa_regname_to_dw2regnum): Likewise.
	* config/tc-i370.c (i370_elf_suffix): Likewise.
	* config/tc-i960.c (struct tabentry): Likewise.
	* config/tc-m32r.c: Likewise.
	* config/tc-m68k.c: Likewise.
	* config/tc-m68k.h: Likewise.
	* config/tc-mcore.c (parse_psrmod): Likewise.
	* config/tc-metag.c (struct metag_core_option): Likewise.
	(struct metag_long_option): Likewise.
	* config/tc-microblaze.c: Likewise.
	* config/tc-mips.c (macro): Likewise.
	* config/tc-mn10200.c: Likewise.
	* config/tc-mn10300.c: Likewise.
	* config/tc-msp430.c (struct rcodes_s): Likewise.
	(struct hcodes_s): Likewise.
	(md_parse_option): Likewise.
	* config/tc-ns32k.c (struct ns32k_option): Likewise.
	(optlist): Likewise.
	* config/tc-ppc.c (ppc_elf_suffix): Likewise.
	(tc_ppc_regname_to_dw2regnum): Likewise.
	* config/tc-ppc.h: Likewise.
	* config/tc-rl78.c: Likewise.
	* config/tc-rx.c (struct cpu_type): Likewise.
	* config/tc-sh.c (sh_regname_to_dw2regnum): Likewise.
	* config/tc-sparc.c (struct priv_reg_entry): Likewise.
	(sparc_ip): Likewise.
	* config/tc-spu.c (insn_fmt_string): Likewise.
	* config/tc-tic54x.c (tic54x_set_default_include): Likewise.
	* config/tc-v850.c: Likewise.
	* config/tc-visium.c (struct visium_arch_option_table): Likewise.
	(struct visium_long_option_table): Likewise.
	* config/tc-xgate.c: Likewise.
	* config/tc-z8k.c: Likewise.
	* read.c (add_include_dir): Likewise.
	* read.h: Likewise.
2016-02-25 16:55:21 +00:00
Andrew Burgess
e6e7b7c49f gas: Update tests for big-endian arc targets
Some gas tests are excluded for arc targets using the pattern arc-*-*,
however this only covers little endian arc targets.  This commit extends
the patter to cover big endian arc targets, the pattern is now arc*-*-*.

gas/ChangeLog:

	* testsuite/gas/all/gas.exp: Change target pattern to cover
	arceb-*.
	* testsuite/gas/all/redef3.d: Likewise.
	* testsuite/gas/elf/elf.exp: Likewise.
2016-02-25 10:46:41 +00:00
Renlin Li
9db2f6b426 [GAS][ARM][3/3]Add armv8.2 fp16 scalar instruction support. Based on SE_H instruction shape.
gas/

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* config/tc-arm.c (BAD_FP16): New error message macro.
	(do_scalar_fp16_v82_encode): Change the coproc field to 9 for armv8.2
	fp16 scalar instructions.
	(neon_check_type): Allow different size from key.
	(do_vfp_nsyn_add_sub): Add support SE_H shape support.
	(try_vfp_nsyn): Likewise.
	(do_vfp_nsyn_mla_mls): Likewise.
	(do_vfp_nsyn_fma_fms): Likewise.
	(do_vfp_nsyn_ldm_stm): Likewise
	(do_vfp_nsyn_sqrt): Likewise
	(do_vfp_nsyn_div): Likewise
	(do_vfp_nsyn_nmul): Likewise.
	(do_vfp_nsyn_cmp): Likewise.
	(do_neon_shll): Likewise.
	(do_vfp_nsyn_cvt_fpv8): Likewise.
	(do_neon_cvttb_2): Likewise.
	(do_neon_mov): Likewise.
	(do_neon_rshift_round_imm): Likewise.
	(do_neon_ldr_str): Likewise.
	(do_vfp_nsyn_fpv8): Likewise.
	(do_vmaxnm): Likewise.
	(do_vrint_1): Likewise.
	(insns): New entry for vins, vmovx.
	(md_apply_fix): Left shift 1 bit for fp16 vldr/vstr.
	* testsuite/gas/arm/armv8-2-fp16-scalar-thumb.d: New.
	* testsuite/gas/arm/armv8-2-fp16-scalar.d: New.
	* testsuite/gas/arm/armv8-2-fp16-scalar.s: New.
	* testsuite/gas/arm/armv8-2-fp16-scalar-bad.s: New
	* testsuite/gas/arm/armv8-2-fp16-scalar-bad.d: New
	* testsuite/gas/arm/armv8-2-fp16-scalar-bad.l: New
2016-02-24 18:09:02 +00:00
Renlin Li
d54af2d070 [GAS][ARM][2/3]Add SE_H shape to represent fp16 type.
gas/

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* config/tc-arm.c (NEON_ENC_TAB): Add fp16 instruction shape.
	(neon_shape_class): New SC_HALF.
	(neon_shape_el): New SE_H.
	(neon_shape_el_size): New size for SE_H.
	(N_F_ALL): New macro to aggregate N_F16, N_F32, N_64.
	(neon_select_shape): Add SE_H support code.
	(el_type_of_type_chk): Use N_F_ALL.
	(do_vfp_nsyn_cvt): Add SE_H shape support.
	(do_neon_cvtz): Likewise.
	(do_neon_cvt_1): Likewise.
	(do_neon_cvttb_1): Likewise.
2016-02-24 14:18:16 +00:00
Renlin Li
b0c1177766 [OPCODES][ARM][1/3]Add armv8.2 fp16 instruction dissembler support.
opcodes/

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instruction.

gas/

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* testsuite/gas/arm/copro.d: Adjust output.
	* testsuite/gas/arm/copro.s: Adjust co-processor num.
2016-02-24 14:08:39 +00:00
Renlin Li
3e309328e8 [OPCODES][ARM]Fix mask for a few coprocessor opcodes.
opcodes/

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Fix mask for vsel, vmaxnm, vminnm,
	vrint(mpna).

gas/

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* testsuite/gas/arm/mask_1.d: New.
	* testsuite/gas/arm/mask_1.s: New.
2016-02-24 14:02:51 +00:00
Renlin Li
8afc7bea40 [OPCODE][ARM]Correct disassembler for cdp/cdp2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2
opcodes/

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

gas/

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* testsuite/gas/arm/copro.s: Use coprocessor other than 10, 11.
	* testsuite/gas/arm/copro.d: Update.
2016-02-24 14:02:51 +00:00
Kyrylo Tkachov
6735952f7c [ARM][gas] Add support for Cortex-A32
2016-02-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

    * config/tc-arm.c (arm_cpus): Add entry for cortex-a32.
    * doc/c-arm.texi (ARM Options): Document cortex-a32.
2016-02-24 10:55:09 +00:00
Kyrylo Tkachov
ed5491b9a9 [ARM][doc] Document cortex-a17 mcpu option
2016-02-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

    * doc/c-arm.texi (ARM Options): Document cortex-a17.
2016-02-24 10:53:55 +00:00
H.J. Lu
742e5034ef Skip tests for common directive on hpux
hpux has a non-standard common directive.

	* testsuite/gas/elf/elf.exp: Skip tests for common directive on
	hpux.
2016-02-23 10:40:43 -08:00
Trevor Saunders
3b4dbbbf59 Add more const type qualifiers to GAS sources.
* output-file.c (output_file_create): Make file name argument const.
	(output_file_close): Likewise.
	* output-file.h (output_file_create): Adjust.
	(output_file_close): Likewise.
	* depend.c (quote_string_for_make): Make src argument const char *.
	(register_dependency): Likewise.
	(wrap_output): Likewise.
	* as.h (register_dependency): Adjust.
	* config/tc-xtensa.c (finish_vinsn): Remove unnecessary calls to
	as_where ();
	* symbols.c (S_SET_EXTERNAL): Likewise.
	* input-scrub.c (as_where): Return the file name.
	* as.h (as_where): Adjust prototype.
	* app.c (do_scrub_chars): Adjust.
	* cond.c (s_elseif): Likewise.
	(s_else): Likewise.
	(initialize_cframe): Likewise.
	* config/obj-coff.c (obj_coff_init_stab_section): Likewise.
	* config/obj-elf.c (obj_elf_init_stab_section): Likewise.
	* config/obj-som.c (obj_som_init_stab_section): Likewise.
	* config/tc-aarch64.c (output_info): Likewise.
	* config/tc-ia64.c (md_assemble): Likewise.
	(dot_alias): Likewise.
	* config/tc-m68k.c (m68k_frob_label): Likewise.
	* config/tc-mmix.c (s_bspec): Likewise.
	(mmix_handle_mmixal): Likewise.
	* config/tc-rx.c (rx_include): Likewise.
	* config/tc-tic54x.c (tic54x_set_default_include): Likewise.
	(tic54x_adjust_symtab): Likewise.
	* config/tc-xtensa.c (directive_push): Likewise.
	(xtensa_sanity_check): Likewise.
	(xtensa_relax_frag): Likewise.
	(md_convert_frag): Likewise.
	(tinsn_to_slotbuf): Likewise.
	* dwarf2dbg.c (dwarf2_where): Likewise.
	* ecoff.c (add_file): Likewise.
	(ecoff_generate_asm_lineno): Likewise.
	* expr.c (make_expr_symbol): Likewise.
	* frags.c (frag_new): Likewise.
	(frag_var_init): Likewise.
	* listing.c (listing_newline): Likewise.
	* messages.c (identify): Likewise.
	(as_show_where): Likewise.
	(as_warn_internal): Likewise.
	(as_bad_internal): Likewise.
	* read.c (s_irp): Likewise.
	(s_macro): Likewise.
	(s_reloc): Likewise.
	* stabs.c (stabs_generate_asm_file): Likewise.
	(stabs_generate_asm_lineno): Likewise.
	(stabs_generate_asm_func): Likewise.
	* write.c (fix_new_internal): Likewise.
	* as.h (PRINTF_WHERE_LIKE): Make file name argument const.
	(as_warn_value_out_of_range): Adjust prototype.
	(as_bad_value_out_of_range): Adjust prototype.
	* messages.c (identify): Make file name argument const char *.
	(as_warn_internal): Likewise.
	(as_warn_where): Likewise.
	(as_bad_internal): Likewise.
	(as_bad_where): Likewise.
	(as_internal_value_out_of_range): Likewise.
	(as_warn_value_out_of_range): Likewise.
	(as_bad_value_out_of_range): Likewise.
	* as.h (found_comment_file): Change type to const char *.
	* cond.c (file_line::file): Likewise.
	* config/obj-coff.c (obj_coff_init_stab_section): Make variable const.
	* config/obj-elf.c (obj_elf_init_stab_section): Likewise.
	* config/obj-som.c (obj_som_init_stab_section): Likewise.
	* config/tc-aarch64.c (output_info): Likewise.
	* config/tc-alpha.c (insert_operand): Likewise.
	* config/tc-arc.c (insert_operand): Likewise.
	* config/tc-d30v.c (check_size): Likewise.
	* config/tc-ia64.c (struct alias): Likewise.
	* config/tc-m68k.c (struct label_line): Likewise.
	* config/tc-mcore.c (md_apply_fix): Likewise.
	* config/tc-microblaze.c (md_estimate_size_before_relax): Likewise.
	* config/tc-mips.c (mips16_immed): Likewise.
	* config/tc-mmix.c (mmix_handle_mmixal): Likewise.
	* config/tc-ppc.c (ppc_insert_operand): Likewise.
	* config/tc-rx.c (rx_include): Likewise.
	* config/tc-s390.c (s390_insert_operand): Likewise.
	* config/tc-tic54x.c (tic54x_set_default_include): Likewise.
	(tic54x_adjust_symtab): Likewise.
	* config/tc-tilegx.c (insert_operand): Likewise.
	(apply_special_operator): Likewise.
	* config/tc-tilepro.c (insert_operand): Likewise.
	* config/tc-xtensa.c (directive_push): Likewise.
	* ecoff.c (add_file): Likewise.
	(ecoff_generate_asm_lineno): Likewise.
	* listing.c (listing_newline): Likewise.
	* read.c (s_irp): Likewise.
	* write.c (install_reloc): Likewise.
	* write.h (struct fix): Likewise.
	* input-file.c (file_name): Change type to const char *.
	(saved_file::file_name): Likewise.
	(input_file_open): Change type of argument to const char *.
	* input-file.h (input_file_open): Adjust.
	* input-scrub.c (logical_input_file): change type to const char *.
	(physical_input_file): Likewise.
       	(struct input_save): Adjust.
	(input_scrub_push): Adjust.
	(input_scrub_begin): Adjust.
	(as_where): Adjust.
	* input-scrub.c (input_scrub_new_file): Make file name argument const.
	(input_scrub_include_file): Likewise.
	(new_logical_line_flags): Likewise.
	(new_logical_line): Likewise.
	* as.h: Adjust.
	* frags.h (struct frag): Change type of fr_file to const char *.
	* expr.c (expr_symbol_where): Change type of file argument to
	const char **.
	* expr.h (expr_symbol_where): Likewise.
	* config/tc-i370.c (md_apply_fix): adjust.
	* config/tc-mmix.c (mmix_md_end): Likewise.
	* config/tc-ppc.c (md_apply_fix): Likewise.
	* config/tc-s390.c (md_apply_fix): Likewise.
	* symbols.c (report_op_error): Likewise.
	(resolve_symbol_value): Likewise.
	* config/tc-ia64.c (slot::src_file): Change type to const char *.
	(rsrc::file): Likewise.
	* config/tc-xtensa.c (xtensa_sanity_check): Change type of variable to
	const char *.
	(xtensa_relax_frag): Likewise.
	(md_convert_frag): Likewise.
	(tinsn_to_slotbuf): Likewise.
	* expr.c (expr_symbol_line): Likewise.
	* macro.c (define_macro): Likewise.
	* macro.h (macro_struct): Likewise.
	* messages.c (as_show_where): Likewise.
	* read.c (s_macro): Likewise.
	* stabs.c (stabs_generate_asm_file): Likewise.
	(generate_asm_file): Likewise.
	(stabs_generate_asm_lineno): Likewise.
	* write.h (struct reloc_list): Likewise.
	* input-scrub.c (as_where): Change return type to const char *.
	* as.h (as_wheree): Adjust.
2016-02-22 14:11:27 +00:00
H.J. Lu
8ecb73ddd7 Set BFD compression bits in write_object_file
There is no need to set BFD compression bits for each section.  We
should just set it once in write_object_file.

	* write.c (compress_debug): Move BFD compression bits setting
	to ...
	(write_object_file): Here.
2016-02-21 06:46:11 -08:00
H.J. Lu
200cbe0f46 [i386] Check RegVRex in register_number
Increment register number by 16 if RegVRex is set.

	* config/tc-i386.c (register_number): Check RegVRex.
	* testsuite/gas/i386/x86-64-avx512f.s: Add a test for vgatherqpd
	with %zmm19 and %zmm3.
	* testsuite/gas/i386/x86-64-avx512f-intel.d: Updated.
	* testsuite/gas/i386/x86-64-avx512f.d: Likewise.
2016-02-20 09:23:20 -08:00
Jiong Wang
b8ec4e871e [ARM] Add FP16 feature extension for ARMv8.2 architecture
include/
  * opcode/arm.h (ARM_EXT2_FP16_INSN): New.

gas/
  * config/tc-arm.c (arm_ext_fp16): New.
  (arm_extensions): New entry for "fp16".
2016-02-19 14:27:23 +00:00
Nick Clifton
3be64886b5 Prevent seg-fault in gas reading a binary input file.
PR 19630
	* read.c (read_a_source_file): Check for assemble_one returning
	with input_line_pointer set to NULL.
2016-02-19 13:19:57 +00:00
Trevor Saunders
3d13c64701 Change the return type of the rebuffer_line function to void.
* listing.c (rebuffer_line): Change return type to void.
2016-02-19 12:13:08 +00:00
Trevor Saunders
cd0bbe6ef9 Add const to various variables in the gas sources.
* symbols.c (decode_local_label_name): Make type a const char *.
	* listing.c (print_source): Make type of p const char *.
	(print_line): Make type of string const	char *.
	(buffer_line): Return const char *.
	(title): Make type const char *.
	(subtitle): Likewise.
	(listing_listing): Make type of p const char *.
	* messages.c (as_internal_value_out_of_range): Make type of prefix
	const char *.
	* stabs.c (s_stab_generic): make type of stab_secname, stabstr_secname
	and string const char *.
	* read.c (_bfd_rel): Make type of name const char *.
	* app.c (out_string): Change type to const char *.
       	(struct app_save::out_string): Likewise.
2016-02-19 12:03:08 +00:00
Dan Gisselquist
9136aa49ab Avoid setting or recording negative alignments when the target stores multiple octets in a single byte.
gas	* read.c (finish_bundle): Avoid recording a negative alignment.
	(do_align): Use unsigned values for n, len and max.  Only create
	a frag if the alignment requirement is greater than the minimum
	byte alignment.  Avoid recording a negative alignment.
	(s_align): Use unsigned values where appropriate.
	(bss_alloc): Use an unsigned value for the alignment.
	(sizeof_sleb128): Add a comment noting that we encode one octet
	per byte, regardless of the value of OCTETS_PER_BYTE_POWER.
	(emit_leb129_expr): Abort if the emitted encoding was longer than
	expected.
	* read.h (output_leb128): Update prototype.
	(sizeof_leb128): Update prototype.
	(bss_alloc): Update prototype.
	* write.c (record_alignment): Use an unsigned value for the
	alignment.  Do not record alignments less than the minimum
	alignment for a byte.
	* write.h (record_alignment): Update prototype.
2016-02-18 09:49:04 +00:00
Max Filippov
4111950f36 xtensa: fix .init/.fini literals moving
Despite the documentation and the comment in xtensa_move_literals, in
the presence of --text-section-literals and --auto-litpools literals are
moved from the separate literal sections into .init and .fini, because
the check in the xtensa_move_literals is incorrect.

This moving was broken with introduction of auto litpools: some literals
now may be lost. This happens because literal frags emitted from .init
and .fini are not closed when new .literal_position marks new literal
pool. Then frag_align(2, 0, 0) changes type of the last literal frag to
rs_align. rs_align frags are skipped in the xtensa_move_literals. As a
result fixups against such literals are not moved out of .init.literal/
.fini.literal sections producing the following assembler error:

  test.S: Warning: fixes not all moved from .init.literal
  test.S: Internal error!

Fix check for .init.literal/.fini.literal in the xtensa_move_literals
and don't let it move literals from there in the presence of
--text-section-literals or --auto-litpools.

2016-02-17  Max Filippov  <jcmvbkbc@gmail.com>
gas/
	* config/tc-xtensa.c (xtensa_move_literals): Fix check for
	.init.literal/.fini.literal section name.
	* testsuite/gas/xtensa/all.exp: Add init-fini-literals to the
	list of xtensa tests.
	* testsuite/gas/xtensa/init-fini-literals.d: New file:
	init-fini-literals test result patterns.
	* testsuite/gas/xtensa/init-fini-literals.s: New file:
	init-fini-literals test.
2016-02-17 23:08:15 +03:00
Nick Clifton
b27c40ec1f Update list of known MSP430 MCUs.
* config/tc-msp430.c (msp430_mcu_data): Sync with data from TI's
	devices.csv file as of March 2016.
2016-02-17 09:55:32 +00:00
Claudiu Zissulescu
726c18e1c8 [ARC] Enable .cfi_* pseudo-ops.
gas/
2016-02-16  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/tc-arc.c (tc_arc_frame_initial_instructions): New
	function.
	(tc_arc_regname_to_dw2regnum): Likewise.
	* config/tc-arc.h (TARGET_USE_CFIPOP): Define
	(tc_cfi_frame_initial_instructions): Likewise.
	(tc_regname_to_dw2regnum): Likewise.

gas/testsuite
2016-02-16  Claudiu Zissulescu  <claziss@synopsys.com>

	* gas/cfi/cfi-arc-1.d: New file.
	* gas/cfi/cfi-arc-1.s: Likewise.
	* gas/cfi/cfi.exp: Allow running tests for arc.

binutils/
2016-02-16  Claudiu Zissulescu  <claziss@synopsys.com>

	* readelf.c (is_32bit_pcrel_reloc): Add R_ARC_32_PCREL.
2016-02-16 15:56:04 +01:00
Trevor Saunders
9406ee731d Remove documentation of deleted function S_IS_EXTERN. 2016-02-16 10:37:32 +00:00
Nick Clifton
eda683bbaa Fix formatting problems caused by previous update to as.texinfo.
* doc/as.texinfo (Section): Fix up texinfo snafus in previous
	update.
2016-02-16 10:35:54 +00:00
Renlin Li
671eeb286f [PR19620][GAS][AArch64]Remove mov[z,k,n] relocation symbol name restriction.
In AArch64 gas, register name or string starts with valid register name
is not allowed as symbol name for mov[z,k,n] instruction.
This patch removes the restriction.

gas/
	PR gas/19620
	* config/tc-aarch64.c (parse_half): Remove restrictions on symbol name.
	* testsuite/gas/aarch64/movw_label.d: New.
	* testsuite/gas/aarch64/movw_label.s: New.
2016-02-16 10:04:41 +00:00
H.J. Lu
804021fbed Fix typos in gas/ChangeLog 2016-02-15 16:11:23 -08:00
Nick Clifton
58cda01864 Fix changelog entry for previous delta. 2016-02-15 16:54:49 +00:00
Vinay Kumar G
6439ea1a88 Correct opcode generated for RX indirect MOVs without an offset.
PR gas/19665
	* config/rx-parse.y (MOV):  Opcode generation for index
	register addressing mode.
	* testsuite/gas/rx/rx.exp: Updated for new testcase.
	* testsuite/gas/rx/pr19665.s: New file.
	* testsuite/gas/rx/pr19665.s: New file.
	* testsuite/gas/rx/mov.d: Update expected output.
2016-02-15 16:34:34 +00:00
Nick Clifton
9fb71ee49f Enhance GAS's .section directive so that it can take numeric values for the flags and type fields. (ELF only)
gas	* doc/as.texinfo (.section): Document that numeric values can now
	be used for the flags and type fields of the ELF target's .section
	directive.  Add notes about the restrictions on setting flags and
	types.
	* config/obj-elf.c (obj_elf_change_section): Allow known sections
	to be given processor specific section types.  Allow processor and
	application specific flags of a section to be set after
	definition.
	(obj_elf_parse_section_letters): Handle parsing numeric values.
	(obj_elf_section_type): Handle parsing numeric values.
	(obj_elf_section): Allow numeric type values.
	* config/obj-elf.h (obj_elf_change_section): Update prototype.
	* testsuite/gas/elf/section10.d: New test.
	* testsuite/gas/elf/section10.s: Source file for new test.
	* testsuite/gas/elf/elf.exp: Run the new test.
	* testsuite/gas/i386/ilp32/x86-64-unwind.d: Remove dependency upon
	the description of the flags produced by readelf.
	* testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
	* NEWS: Mention the new feature.

bfd	* elf-bfd.h (struct bfd_elf_special_section): Use unsigned values
	for length and type fields.  Use a signed value for the
	suffix_length field.

binutils* readelf.c (get_section_type_name): Add hex prefix to offsets
	printed for LOPROC and LOOS values.  Ensure that a result is
	always returned for the V850 target, even when an unrecognised
	processor specific value is encountered.
	(process_section_headers): Display key values in the order in
	which they appear to the user.  Add the "C (compressed)" value to
	the list.

ld	* testsuite/ld-i386/pr12718.d: Remove dependency upon the
	description of the flags produced by readelf.
	* testsuite/ld-i386/pr12921.d: Likewise.
	* testsuite/ld-i386/tlsbin-nacl.rd: Likewise.
	* testsuite/ld-i386/tlsbin.rd: Likewise.
	* testsuite/ld-i386/tlsbindesc-nacl.rd: Likewise.
	* testsuite/ld-i386/tlsbindesc.rd: Likewise.
	* testsuite/ld-i386/tlsdesc-nacl.rd: Likewise.
	* testsuite/ld-i386/tlsdesc.rd: Likewise.
	* testsuite/ld-i386/tlsgdesc-nacl.rd: Likewise.
	* testsuite/ld-i386/tlsgdesc.rd: Likewise.
	* testsuite/ld-i386/tlsnopic-nacl.rd: Likewise.
	* testsuite/ld-i386/tlsnopic.rd: Likewise.
	* testsuite/ld-i386/tlspic-nacl.rd: Likewise.
	* testsuite/ld-i386/tlspic.rd: Likewise.
	* testsuite/ld-s390/tlsbin.rd: Likewise.
	* testsuite/ld-s390/tlsbin_64.rd: Likewise.
	* testsuite/ld-s390/tlspic.rd: Likewise.
	* testsuite/ld-s390/tlspic_64.rd: Likewise.
	* testsuite/ld-sh/tlsbin-2.d: Likewise.
	* testsuite/ld-sh/tlspic-2.d: Likewise.
	* testsuite/ld-tic6x/common.d: Likewise.
	* testsuite/ld-tic6x/shlib-1.rd: Likewise.
	* testsuite/ld-tic6x/shlib-1b.rd: Likewise.
	* testsuite/ld-tic6x/shlib-1r.rd: Likewise.
	* testsuite/ld-tic6x/shlib-1rb.rd: Likewise.
	* testsuite/ld-tic6x/shlib-app-1.rd: Likewise.
	* testsuite/ld-tic6x/shlib-app-1b.rd: Likewise.
	* testsuite/ld-tic6x/shlib-app-1r.rd: Likewise.
	* testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise.
	* testsuite/ld-tic6x/shlib-noindex.rd: Likewise.
	* testsuite/ld-tic6x/static-app-1.rd: Likewise.
	* testsuite/ld-tic6x/static-app-1b.rd: Likewise.
	* testsuite/ld-tic6x/static-app-1r.rd: Likewise.
	* testsuite/ld-tic6x/static-app-1rb.rd: Likewise.
	* testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise.
	* testsuite/ld-x86-64/ilp32-4.d: Likewise.
	* testsuite/ld-x86-64/pr12718.d: Likewise.
	* testsuite/ld-x86-64/pr12921.d: Likewise.
	* testsuite/ld-x86-64/split-by-file-nacl.rd: Likewise.
	* testsuite/ld-x86-64/split-by-file.rd: Likewise.
	* testsuite/ld-x86-64/tlsbin-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlsbin.rd: Likewise.
	* testsuite/ld-x86-64/tlsbindesc-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlsbindesc.rd: Likewise.
	* testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlsdesc.rd: Likewise.
	* testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlsgdesc.rd: Likewise.
	* testsuite/ld-x86-64/tlspic-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlspic.rd: Likewise.
	* testsuite/ld-xtensa/tlsbin.rd: Likewise.
	* testsuite/ld-xtensa/tlspic.rd: Likewise.
2016-02-15 11:11:46 +00:00
Nick Clifton
bd5608dcc6 Allow the .cfi_sections directive to be reissued provided that CFI generation has not yet started.
PR gas/19614
	* dw2gencfi.c (cfi_sections_set): Delay setting this variable
	until it is actually used.
	(cfi_set_sections): Set cfi_sections_set to true.
	(dot_cfi_startproc): Likewise.
	(dot_cfi_endproc): Likewise.
	(dot_cfi_fde_data): Likewise.
	(cfi_finish): Likewise.
	(dot_cfi_sections): Do not set cfi_sections_set.
	* doc/as.texinfo (.cfi_sections): Note that targets can provide
	their own cfi section name.  Also note that the directive can be
	reissued provided that CFI generation has not started.
	* testsuite/gas/mips/compact-eh-err2.s: Add .cfi_startproc and
	.cfi_endproc directives so that the redefinition of .cfi_sections
	will trigger the generation of the error message.
	* testsuite/gas/mips/compact-eh-err2.l: Update expected line
	number of error message.
2016-02-11 15:30:55 +00:00
Claudiu Zissulescu
4670103e86 Add support for ARC instruction relaxation in the assembler.
gas/
2016-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot <jvanoirs@synopsys.com>

        * config/tc-arc.h (TC_FRAG_TYPE, TC_PCREL_ADJUST, MAX_INSN_ARGS)
        (MAX_INSN_FLGS, MAX_FLAG_NAME_LENGHT, TC_GENERIC_RELAX_TABLE):
        Define.
        (arc_flags, arc_relax_type): New structure.
        * config/tc-arc.c (FRAG_MAX_GROWTH, RELAX_TABLE_ENTRY)
	(RELAX_TABLE_ENTRY_MAX): New define.
        (relaxation_state, md_relax_table, arc_relaxable_insns)
	(arc_num_relaxable_ins): New variable.
	(rlx_operand_type, arc_rlx_types): New enums.
	(arc_relaxable_ins): New structure.
        (OPTION_RELAX): New option.
        (arc_insn): New relax member.
        (arc_flags): Remove.
        (relax_insn_p): New function.
        (apply_fixups): Likewise.
        (relaxable_operand): Likewise.
        (may_relax_expr): Likewise.
        (relaxable_flag): Likewise.
        (arc_pcrel_adjust): Likewise.
        (md_estimate_size_before_relax): Implement.
        (md_convert_frag): Likewise.
        (md_parse_option): Handle new mrelax option.
        (md_show_usage): Likewise.
        (assemble_insn): Set relax member.
        (emit_insn0): New function.
        (emit_insn1): Likewise.
        (emit_insn): Handle relaxation case.
	* NEWS: Mention the new relaxation option.
	* doc/c-arc.texi (ARC Options): Document new mrelax option.

gas/testsuite
2016-01-26  Claudiu Zissulescu  <claziss@synopsys.com>

        * gas/arc/relax-avoid1.d: New file.
        * gas/arc/relax-avoid1.s: Likewise.
        * gas/arc/relax-avoid2.d: Likewise.
        * gas/arc/relax-avoid2.s: Likewise.
        * gas/arc/relax-avoid3.d: Likewise.
        * gas/arc/relax-avoid3.s: Likewise.
	* gas/arc/relax-b.d: Likewise.
        * gas/arc/relax-b.s: Likewise.

include/opcode/
2016-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

        * arc.h (arc_opcode arc_relax_opcodes, arc_num_relax_opcodes):
        Declare.

opcodes/
2016-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

        * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
        variable.
2016-02-10 12:09:01 +00:00
Nick Clifton
9264d32548 FIx formatting that triggers a new compile time warning message.
* config/tc-ia64.c (dot_prologue): Fix formatting.
2016-02-08 14:51:10 +00:00
Nick Clifton
3930612461 Remove support for creating ARM NOREAD sections.
gas	* config/obj-elf.c (obj_elf_change_section): Remove support for
	ARM NOREAD sections.
	* config/tc-arm.c (arm_elf_section_letter): Delete.
	* config/tc-arm.h (md_elf_section_letter): Delete.
	* doc/c-arm.texi (ARM Section Attribute): Delete section.
	* testsuite/gas/arm/section-execute-only.d: Delete.
	* testsuite/gas/arm/section-execute-only.s: Delete.

ld	* testsuite/ld-arm/arm-elf.exp: Remove ARM NOREAD section tests.
	* testsuite/ld-arm/thumb1-input-section-flag-match.d: Delete.
	* testsuite/ld-arm/thumb1-input-section-flag-match.s: Delete.
	* testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.d: Delete.
	* testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.s: Delete.
	* testsuite/ld-arm/thumb1-noread-present-one-section.d: Delete.
	* testsuite/ld-arm/thumb1-noread-present-one-section.s: Delete.
	* testsuite/ld-arm/thumb1-noread-present-two-section.d: Delete.
	* testsuite/ld-arm/thumb1-noread-present-two-section.s: Delete.
2016-02-04 11:57:57 +00:00
Nick Clifton
c1d9289fef Fix the encoding of the MSP430's RRUX instruction.
PR target/19561
opcdoe	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

include	* opcode/msp430.h (IGNORE_CARRY_BIT): New define.
	(RRUX): Synthesise using case 2 rather than 7.

gas	* config/tc-msp430.c (msp430_operands): Remove case 7.  Use case 2
	to handle encoding of RRUX instruction.
	* testsuite/gas/msp430/msp430x.s: Add more tests of the extended
	shift instructions.
	* testsuite/gas/msp430/msp430x.d: Update expected disassembly.
2016-02-04 09:55:10 +00:00
Max Filippov
ea173078d2 xtensa: fix signedness of gas relocations
Change 1058c7532d "Use signed data type for R_XTENSA_DIFF* relocation
offsets." changed signedness of BFD_RELOC_XTENSA_DIFF* relocations
substituted for BFD_RELOC_*. This made it impossible to encode arbitrary
8-, 16- and 32-bit values, which broke e.g. debug info encoding by .loc
directive. Revert this part and add test.

gas/
2016-02-03  Max Filippov  <jcmvbkbc@gmail.com>
	* config/tc-xtensa.c (md_apply_fix): Mark BFD_RELOC_XTENSA_DIFF*
	substitutions for BFD_RELOC_* as unsigned.
	* gas/testsuite/gas/xtensa/all.exp: Add loc to list of xtensa
	tests.
	* gas/testsuite/gas/xtensa/loc.d: New file: loc test result
	patterns.
	* gas/testsuite/gas/xtensa/loc.s: New file: loc test.
2016-02-03 20:44:57 +03:00
H.J. Lu
0cb4071ef9 Add -mrelax-relocations= to x86 assembler
The x86 relax relocations introduced in binutils 2.26 aren't supported
by linker on Solaris older than Solaris 12.  To use x86 assembler with
older Solaris linker, this patch adds

1. A command line option -mrelax-relocations= to x86 assembler to
control whether to generate relax relocations.
2. A configure option --enable-x86-relax-relocations to decide whether
x86 assembler should generate relax relocations by default.  It is
defaulted to yes, except for x86 Solaris targets older than Solaris 12.

gas/

	PR gas/19520
	* NEWS: Mention new command line option -mrelax-relocations and
	new configure option --enable-x86-relax-relocations for x86
	target.
	* config.in: Regenerated.
	* configure.ac: Add --enable-x86-relax-relocations.
	(ac_default_x86_relax_relocations): New.  Default to 1 except
	for x86 Solaris targets older than Solaris 12.
	(DEFAULT_GENERATE_X86_RELAX_RELOCATIONS): Define.
	* configure: Likewise.
	* config/tc-i386.c (generate_relax_relocations): New.
	(OPTION_MRELAX_RELOCATIONS): Likewise.
	(output_disp): Don't generate relax relocations if
	generate_relax_relocations is 0.
	(md_longopts): Add -mrelax-relocations.
	(md_show_usage): Likewise.
	(md_parse_option): Handle OPTION_MRELAX_RELOCATIONS.
	* doc/c-i386.texi: Document -mrelax-relocations=.
	* testsuite/gas/i386/got-no-relax.d: New file.
	* testsuite/gas/i386/x86-64-gotpcrel-no-relax.d: Likewise.
	* testsuite/gas/i386/got.d: Pass -mrelax-relocations=yes to as.
	* testsuite/gas/i386/localpic.d: Likewise.
	* testsuite/gas/i386/mixed-mode-reloc32.d: Likewise.
	* testsuite/gas/i386/reloc32.d: Likewise.
	* testsuite/gas/i386/x86-64-gotpcrel.d: Likewise.
	* testsuite/gas/i386/x86-64-localpic.d: Likewise.
	* testsuite/gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
	* testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
	* testsuite/gas/i386/i386.exp: Run got-no-relax and
	x86-64-gotpcrel-no-relax.

ld/

	PR gas/19520
	* testsuite/ld-i386/branch1.d: Pass -mrelax-relocations=yes to as.
	* testsuite/ld-i386/call1.d: Likewise.
	* testsuite/ld-i386/call2.d: Likewise.
	* testsuite/ld-i386/call3a.d: Likewise.
	* testsuite/ld-i386/call3b.d: Likewise.
	* testsuite/ld-i386/call3c.d: Likewise.
	* testsuite/ld-i386/call3d.d: Likewise.
	* testsuite/ld-i386/call3e.d: Likewise.
	* testsuite/ld-i386/call3f.d: Likewise.
	* testsuite/ld-i386/call3g.d: Likewise.
	* testsuite/ld-i386/call3h.d: Likewise.
	* testsuite/ld-i386/jmp1.d: Likewise.
	* testsuite/ld-i386/jmp2.d: Likewise.
	* testsuite/ld-i386/lea1c.d: Likewise.
	* testsuite/ld-i386/load1.d: Likewise.
	* testsuite/ld-i386/load2.d: Likewise.
	* testsuite/ld-i386/load3.d: Likewise.
	* testsuite/ld-i386/load4a.d: Likewise.
	* testsuite/ld-i386/load5a.d: Likewise.
	* testsuite/ld-i386/mov2b.d: Likewise.
	* testsuite/ld-i386/mov3.d: Likewise.
	* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-5r-local-x86-64.d: Likewise.
	* testsuite/ld-x86-64/call1a.d: Likewise.
	* testsuite/ld-x86-64/call1b.d: Likewise.
	* testsuite/ld-x86-64/call1c.d: Likewise.
	* testsuite/ld-x86-64/call1d.d: Likewise.
	* testsuite/ld-x86-64/call1e.d: Likewise.
	* testsuite/ld-x86-64/call1f.d: Likewise.
	* testsuite/ld-x86-64/call1h.d: Likewise.
	* testsuite/ld-x86-64/call1i.d: Likewise.
	* testsuite/ld-x86-64/load1a.d: Likewise.
	* testsuite/ld-x86-64/load1b.d: Likewise.
	* testsuite/ld-i386/got1a.S: Load GOT into %ecx and use it.
	* testsuite/ld-i386/got1.dd: Updated.
	* testsuite/ld-i386/got1d.S (1): Removed.
	* testsuite/ld-i386/i386.exp: Add -Wa,-mrelax-relocations=yes.
	* testsuite/ld-x86-64/x86-64.exp: Likewise.
2016-02-03 08:25:15 -08:00
Kevin Buettner
3d8efabf21 msp430: Set DWARF2_ADDR_SIZE to 4.
This change makes gas's notion of the msp430 dwarf2 address size match
that of gcc and gdb.  This is needed so that the format of addresses
generated for DW_LNE_set_address in .debug_line will match the address
size for the compilation unit.

In gcc/config/msp430/msp430.h, it's set to 4:

  #define	DWARF2_ADDR_SIZE			4

Likewise in gdb/msp430-tdep.c:

  set_gdbarch_dwarf2_addr_size (gdbarch, 4);

(As far as I can tell, however, GDB doesn't use this value when decoding
.debug_line.  Instead, GDB uses the Pointer Size from the compilation
unit.)

readelf is able to seamlessly handle mismatches between these various
sizes by using the size of the DW_LNE_set_address instruction to
determine the address size.  Another way to fix this problem is to
make GDB behave in a similar manner.  In my opinion, GDB should detect
and inform the user about these mismatches; it's not clear to me if
it's correct for GDB to go ahead and read the address anyway when a
size mismatch is detected.

Without this change, addresses in .debug_line are encoded in two bytes
for some multilibs.  When GDB reads the address for
DW_LNE_set_address, it uses the pointer size provided by the CU.  When
these values don't match, GDB reads the wrong number of bytes.  In the
cases that I've looked at, GDB is reading 4 bytes from a 2 byte
container, which results in a garbage address.  GDB discards lines
which have a bogus address; the end result is that GDB records no line
number information for CUs which have a mismatch between the address
size (from the CU) and the format of the address used by
DW_LNE_set_address.

gas/ChangeLog:

	* config/tc-msp430.h (DWARF2_ADDR_SIZE): Set to 4.
2016-02-03 09:21:51 -07:00
H.J. Lu
9d3fc4e190 Mention -mfence-as-lock-add=yes for x86 assembler
* NEWS: Mention new command line option -mfence-as-lock-add=yes
	for x86 target.
2016-02-03 06:42:39 -08:00
H.J. Lu
ab71ce8646 Remove duplicated marker for 2.26 in gas/NEWS
* NEWS: Remove duplicated marker for 2.26.
2016-02-03 06:37:21 -08:00