dynamic relocations pointing to local or section symbols, use the
NULL symbol instead. Document the choice to not emit an
additional R_MIPS_64 relocation.
zero index dynamic tls relocs generated for the GOT. Tidy code.
Set "relocation" to 1 on DTPMOD32 relocs. Optimize HA adjustment.
* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
* ld-powerpc/tlsso.r: Adjust for corrected zero symbol index relocs.
* ld-powerpc/tlsso32.r: Likewise.
(ppc_elf_adjust_dynamic_symbol): For weak symbols, copy
ELF_LINK_NON_GOT_REF from weakdef.
* elf64-ppc.c (ELIMINATE_COPY_RELOCS): Define as one.
(ppc64_elf_adjust_dynamic_symbol): For weak symbols, copy
ELF_LINK_NON_GOT_REF from weakdef.
* elf32-i386.c (ELIMINATE_COPY_RELOCS): Define as one. Use throughout.
(elf_i386_adjust_dynamic_symbol): For weak symbols, copy
ELF_LINK_NON_GOT_REF from weakdef.
error messages.
(ELIMINATE_COPY_RELOCS): Define to zero.
(ppc_elf_relocate_section): Don't deref htab->tls_sec when calculating
TLSLD relocs. Report reloc types on a number of errors. Optimize
LOCAL24PC check for non-local syms. Don't capitalize error messages.
* elf64-ppc.c (ELIMINATE_COPY_RELOCS): Define to zero.
(ppc64_elf_relocate_section): Don't deref htab->tls_sec when
calculating TLSLD relocs. Report reloc types on a number of errors.
Don't capitalize error messages.
gcc:
* config/sh/sh.h (EXTRA_SPECS): Add subtarget_asm_relax_spec and
subtarget_asm_isa_spec.
(SUBTARGET_ASM_RELAX_SPEC, SUBTARGET_ASM_ISA_SPEC): Define.
(ASM_SPEC): Define as SH_ASM_SPEC.
(SH_ASM_SPEC): New; take the role of ASM_SPEC, but safe from svr4.h.
Use subtarget_asm_relax_spec and subtarget_asm_isa_spec.
* config/sh/elf.h (ASM_SPEC): Use SH_ASM_SPEC.
(SUBTARGET_ASM_ISA_SPEC): Undef / define.
gcc/testsuite:
gcc.dg/sh-relax.c: New test.
include/elf:
* sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E,
and SH2E & SH4 merge to SH4, not SH2E.
gas:
* config/tc-sh.c (sh_dsp): Replace with preset_target_arch.
(md_begin): Use preset_target_arch.
(md_longopts): Make isa option unconditional.
(md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any
set preset_target_arch.
(md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups
by -S_GET_VALUE (fixP->fx_subsy).
(tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy,
and the addend is 0.
Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4.
* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
bfd:
elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary
relocation (no special function), and make it non-partial_inplace.
(sh_elf_relax_section): When creating a bsr, use a consistent value
no matter if the symbol is extern or not; set addend to -4.
Don't swap load / non-load instructions for SH4.
(sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset
rather than if the symbol is external to determine if adjusting the
offset makes sense. Adjust the addend too if appropriate.
(sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the
relocation.
(elfNN_ia64_check_relocs): Set it.
(allocate_global_data_got): Check it.
(allocate_local_got): Likewise.
(allocate_dynrel_entries): Likewise.
(elfNN_ia64_relax_ldxmov): New.
(elfNN_ia64_relax_section): Handle LTOFF22X, LDXMOV.
(elfNN_ia64_choose_gp): Split out from ...
(elfNN_ia64_final_link): ... here.
section flags before concluding that we've already been called.
Don't use register keyword.
(_bfd_elf_create_dynamic_sections): Don't use register keyword.
(_bfd_elf_create_linker_section): Formatting.
