* mips.igen (check_fmt_p): Provide a separate mips32r2 definition
that unconditionally allows fmt_ps.
(ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
(FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
(PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
filter from 64,f to 32,f.
(PREFX): Change filter from 64 to 32.
(LDXC1, LUXC1): Provide separate mips32r2 implementations
that use do_load_double instead of do_load. Make both LUXC1
versions unpredictable if SizeFGR () != 64.
(SDXC1, SUXC1): Extend to mips32r2, using do_store_double
instead of do_store. Remove unused variable. Make both SUXC1
versions unpredictable if SizeFGR () != 64.
(display_mem_info): New static variable.
(mips_option_handler): Handle OPTION_INFO_MEMORY.
(mips_options): Add info-memory and memory-info.
(sim_open): After processing the command line and board specification, check display_mem_info.
If it is set then call the real handler for the --memory-info command line switch.
(parse_size): Handle a suffix on the size value.
* sim-options.c (standard_options): Mention that the mem-size switch accepts suffixes.
(standard_option_handler): Handle a suffix on the size value.
* configure.ac (sim_mipsisa3264_configs): New variable.
(mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
every configuration support all four targets, using the triplet to
determine the default.
* configure: Regenerate.
* config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2,
ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support.
(macro_build): Add case '2'.
(macro): Expand M_BALIGN to nop, packrl.ph or balign.
(validate_mips_insn): Add support for balign instruction.
(mips_ip): Handle DSP R2 instructions. Support balign instruction.
(OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE,
md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2
command line options.
(s_mipsset): Add support for .set dspr2 and .set nodspr2 directives.
(md_show_usage): Add -mdspr2 and -mno-dspr2 help output.
* doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2,
.set dspr2, .set nodspr2.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for
DSP R2.
* gas/mips/mips.exp: Run new test.
[ include/opcode/Changelog ]
* mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
(INSN_DSPR2): Add flag for DSP R2 instructions.
(M_BALIGN): New macro.
[ opcodes/ChangeLog ]
* mips-dis.c (mips_arch_choices): Add DSP R2 support.
(print_insn_args): Add support for balign instruction.
* mips-opc.c (D33): New shortcut for DSP R2 instructions.
(mips_builtin_opcodes): Add DSP R2 instructions.
[ sim/mips/ChangeLog ]
* Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
Add dsp2 to sim_igen_machine.
* configure: Regenerate.
* dsp.igen (do_ph_op): Add MUL support when op = 2.
(do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
(mulq_rs.ph): Use do_ph_mulq.
(MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
* mips.igen: Add dsp2 model and include dsp2.igen.
(MFHI, MFLO, MTHI, MTLO): Extend these instructions for
for *mips32r2, *mips64r2, *dsp.
(MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
for *mips32r2, *mips64r2, *dsp2.
* dsp2.igen: New file for MIPS DSP REV 2 ASE.
[ sim/testsuite/sim/mips/ChangeLog ]
* basic.exp: Run the dsp2 test.
* utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro.
* mips32-dsp2.s: New test.
uninterpreted formats. If fmt is one of the uninterpreted types
don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
fmt_word, and fmt_uninterpreted_64 like fmt_long.
(store_fpr): When writing an invalid odd register, set the
matching even register to fmt_unknown, not the following register.
* interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
the the memory window at offset 0 set by --memory-size command
line option.
(sim_store_register): Handle storing 4 bytes to an 8 byte floating
point register.
(sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
register.
(sim_monitor): When returning the memory size to the MIPS
application, use the value in STATE_MEM_SIZE, not an arbitrary
hardcoded value.
(cop_lw): Don' mess around with FPR_STATE, just pass
fmt_uninterpreted_32 to StoreFPR.
(cop_sw): Similarly.
(cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
(cop_sd): Similarly.
* mips.igen (not_word_value): Single version for mips32, mips64
and mips16.
