Commit graph

12 commits

Author SHA1 Message Date
Mike Frysinger
2e3d4f4d5d sim: sim_{create_inferior,open,parse_args}: constify argv/env slightly
2016-01-03  Mike Frysinger  <vapier@gentoo.org>

	* sim-options.c (sim_parse_args): Mark argv array const.
	* sim-options.h (sim_parse_args): Likewise.
2016-01-06 21:48:59 -05:00
Mike Frysinger
77cf2ef5dc sim: parse_args: display getopt error ourselves
Fix a long standing todo where we let getopt write directly to stderr
when an invalid option is passed.  Use the sim io funcs instead as they
go through the filtered callbacks that gdb wants.
2016-01-03 22:07:39 -05:00
Joel Brobecker
618f726fcb GDB copyright headers update after running GDB's copyright.py script.
gdb/ChangeLog:

        Update year range in copyright notice of all files.
2016-01-01 08:43:22 +04:00
Mike Frysinger
0e9672991e sim: standardize sim_create_inferior handling of argv a bit more
For targets that process argv in sim_create_inferior, improve the code:
- provide more details in the comment
- make the check for when to re-init more robust
- clean out legacy sim_copy_argv code

This will be cleaned up more in the future when we have a common inferior
creation function, but at least help new ports get it right until then.
2015-12-26 07:19:07 -05:00
Mike Frysinger
6e4f085c7f sim: sim-close: unify sim_close logic
Other than the nice advantage of all sims having to declare one fewer
common function, this also fixes leakage in pretty much every sim.
Many were not freeing any resources, and a few were inconsistent as
to the ones they did.  Now we have a single module that takes care of
all the logic for us.

Most of the non-cgen based ones could be deleted outright.  The cgen
ones required adding a callback to the arch-specific cleanup func.
The few that still have close callbacks are to manage their internal
state.

We do not convert erc32, m32c, ppc, rl78, or rx as they do not use
the common sim core.
2015-11-15 02:30:19 -05:00
James Bowman
395b0d8a3f sim: ft32: correct simulation of MEMCPY and MEMSET
The MEMCPY and MEMSET instructions should only examine the low 15 bits of
their length arguments.
2015-09-29 23:39:24 -04:00
James Bowman
71c34ca7a0 sim: ft32: correctly simulate PM write port
The FT32 simulator was not correctly simulating the behavior of the
program memory (PM) write port.  When it is locked, writes to the
data register do nothing.
2015-09-29 23:36:56 -04:00
James Bowman
bcd68f9e44 sim: ft32: add character input port
The FT32 simulator has character output, of course. This patch
adds character input, which lets the simulator run interactive
FT32 applications, e.g. language interpreters.
2015-09-22 22:43:56 -04:00
Mike Frysinger
034685f9ce sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state.  This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.

It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
2015-04-17 02:44:30 -04:00
Mike Frysinger
65f9096890 sim: ft32: fix ft32_pc_get logic 2015-04-13 01:54:33 -04:00
Mike Frysinger
29f1a5934a sim: ft32: delete sim_read/sim_write funcs
The common sim-hrw.o provides both of these, so simply use them.
2015-04-12 05:13:23 -04:00
James Bowman
f46e4eb78b sim: ft32: new port
FT32 is a new high performance 32-bit RISC core developed by FTDI for
embedded applications.
2015-03-28 02:12:33 -04:00