API to return LONGEST values rather than struct values.
(ada_evaluate_subexp): Change to use new API of discrete_type_low_bound
and discrete_type_high_bound.
(to_fixed_range_type): Create a range type in cases where
argument is base type and its limits are representable as ints.
(ada_is_modular_type): Correct so that base type must be integral.
* ada-lex.l (TRUEKEYWORD,FALSEKEYWORD): Make 'true' and 'false'
keywords when they appear alone, since we are phasing out
direct representation of these identifiers in ebugging data.
* ada-exp.y: Define 'true' and 'false' as primaries.
(type_boolean): New function.
(type_int,type_long,type_long_long,type_floattype_double)
(type_long_double): Remove uses of current_gdbarch for consistency
with type_boolean.
(write_int): Change comment to indicate that it might write boolean
constant as well.
* ada-typeprint.c (ada_print_type): Print '(false, true)' for boolean
type, since will no longer be represented as enumerated type in
debugging data.
* ada-valprint.c (print_optional_low_bound): Handle boolean case
as well.
behind from a previous inferior.
* target.c (pop_all_targets): Rename to ...
(pop_all_targets_above): ... this. Add a target stratum
parameter. Use it instead of hardcoding the dummy_stratum.
(pop_all_targets): New, defer to pop_all_targets_above.
(target_preopen): Use pop_all_targets_above.
* target.h (pop_all_targets_above): Declare.
lr_register.
(rs6000_in_function_epilogue_p): Check for bctr.
(skip_prologue): Initialize lr_register. Set lr_reg to a register
number. Set gpr_mask and used_bl. Continue scanning while some
expected registers are not saved. Set lr_register if LR is not
stored.
(rs6000_frame_cache): Handle gpr_mask and lr_register.
* gdb.arch/powerpc-prologue.exp: Correct saved registers.
(bfd_elf32_arm_allocate_interworking_sections): Move common code
into...
(arm_allocate_glue_section_space): ... New function.
(bfd_elf32_arm_add_glue_sections_to_bfd): Move common code
into...
(arm_make_glue_section): ... New function.
('F' format) for @FIX names generated by the loader, retaining only
the minimal symbols (and no partial symbol tables) for these names.
Fixes warning messages about symbols that are found in partial
symbol tables, but not full symbol tables.
* configure: Regenerate.
config/
* mt-mips16-compat: New file, taken from mt-mips-elfoabi.
* mt-mips-elfoabi: Include mt-mips16-compat.
* mt-mips-gnu: New file.
Include "features/rs6000/powerpc-vsx64.c".
(ppc_supply_vsxregset): New function.
(ppc_collect_vsxregset): New function.
(IS_VSX_PSEUDOREG): New macro.
(IS_EFP_PSEUDOREG): New macro.
(vsx_register_p): New function.
(ppc_vsx_support_p): New function.
(rs6000_builtin_type_vec128): New function.
(rs6000_register_name): Hide upper halves of vs0~vs31. Return
correct names for VSX registers and EFPR registers.
(rs6000_pseudo_register_type): Return correct types for VSX
and EFPR registers.
(rs6000_pseudo_register_reggroup_p): Return correct group for
VSX and EFPR registers.
(ppc_pseudo_register_read): Rename to dfp_pseudo_register_read.
(ppc_pseudo_register_write): Rename to dfp_pseudo_register_write.
(vsx_pseudo_register_read): New function.
(vsx_pseudo_register_write): New function.
(efpr_pseudo_register_read): New function.
(efpr_pseudo_register_write): New function.
(rs6000_pseudo_register_read): Call new VSX and EFPR read functions.
(rs6000_pseudo_register_write): Call new VSX and EFPR write functions.
(rs6000_gdbarch_init): Declare have_vsx.
Initialize new upper half VSX registers.
Initialize VSX-related and EFPR-related pseudo-registers variables.
Adjust the number of pseudo registers accordingly.
* ppc-linux-nat.c: Define PTRACE_GETVSXREGS, PTRACE_SETVSXREGS
and SIZEOF_VSRREGS.
(gdb_vsxregset_t): New type.
(have_ptrace_getsetvsxregs): New variable.
(fetch_vsx_register): New function.
(fetch_register): Handle VSX registers.
(fetch_vsx_registers): New function.
(fetch_ppc_registers): Handle VSX registers.
(store_ppc_registers): Handle VSX registers.
(store_vsx_register): New function.
(store_register): Handle VSX registers.
(store_vsx_registers): New function.
(ppc_linux_read_description): Handle VSX-enabled inferiors.
(gdb_vsxregset_t): New type.
(supply_vsxregset): New function.
(fill_vsxregset): New function.
* ppc-tdep.h (vsx_register_p): New prototype.
(vsx_support_p): New prototype.
(ppc_vsr0_regnum): New variable.
(ppc_vsr0_upper_regnum): Likewise.
(ppc_efpr0_regnum): Likewise.
(ppc_builtin_type_vec128): New type.
(ppc_num_vsrs): New constant.
(ppc_num_vshrs): New constant.
(ppc_num_efprs): Likewise.
Define POWERPC_VEC_VSX PPC_VSR0_UPPER_REGNUM and PPC_VSR31_UPPER_REGNUM.
(ppc_supply_vsxregset): New prototype.
(ppc_collect_vsxregset): New prototype.
* ppc-linux-tdep.c: Include "features/rs6000/powerpc-vsx32l.c"
Include "features/rs6000/powerpc-vsx64l.c".
(_initialize_ppc_linux_tdep): Initialize VSX-enabled targets.
(ppc_linux_regset_sections): Add new ".reg-ppc-vsx" field.
(ppc32_linux_vsxregset): New 32-bit VSX-enabled regset.
(ppc_linux_regset_from_core_section): Handle VSX core section.
(ppc_linux_core_read_description): Support VSX-enabled core files.
* ppc-linux-tdep.h: Declare *tdesc_powerpc_vsx32l
Declare tdesc_powerpc_vsx64l
* corelow.c (get_core_register_section): Support VSX-enabled
core files.
* features/rs6000/power-vsx.xml: New VSX descriptions.
* features/rs6000/powerpc-vsx32.xml: New file.
* features/rs6000/powerpc-vsx32l.xml: New file.
* features/rs6000/powerpc-vsx64.xml: New file.
* features/rs6000/powerpc-vsx64l.xml: New file.
* features/rs6000/powerpc-vsx32.c: New file (generated).
* features/rs6000/powerpc-vsx32l.c: New file (generated).
* features/rs6000/powerpc-vsx64.c: New file (generated).
* features/rs6000/powerpc-vsx64l.c: New file (generated).
* features/Makefile: Updated with new descriptions.
* regformats/rs6000/powerpc-vsx32l.dat: New file (generated).
* regformats/rs6000/powerpc-vsx64l.dat: New file (generated).
* testsuite/gdb.arch/vsx-regs.c: New source file.
* testsuite/gdb.arch/vsx-regs.exp: New testcase.
* testsuite/lib/gdb.exp (skip_vsx_tests): New function.
* x86_64.cc (Target_x86_64::Relocate::relocat_tls):
Use addend for DTPOFF32, DTPOFF64, and TPOFF32 relocs.
* testsuite/tls_test.cc (struct int128): 128-bit struct
for testing TLS relocs with non-zero addend.
(v12): New TLS variable.
(t12): New test.
(t_last): Add check for v12.
* testsuite/tls_test.h (t12): New function.
* testsuite/tls_test_main.cc (thread_routine): Call new test.
