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86054 commits

Author SHA1 Message Date
Kevin Buettner
f56331b468 dwarf2loc.c: Perform a pointer to address conversion for DWARF_VALUE_MEMORY.
This patch fixes the following failures for rl78-elf:

FAIL: gdb.base/vla-datatypes.exp: print int_vla
FAIL: gdb.base/vla-datatypes.exp: print unsigned_int_vla
FAIL: gdb.base/vla-datatypes.exp: print double_vla
FAIL: gdb.base/vla-datatypes.exp: print float_vla
FAIL: gdb.base/vla-datatypes.exp: print long_vla
FAIL: gdb.base/vla-datatypes.exp: print unsigned_long_vla
FAIL: gdb.base/vla-datatypes.exp: print char_vla
FAIL: gdb.base/vla-datatypes.exp: print short_vla
FAIL: gdb.base/vla-datatypes.exp: print unsigned_short_vla
FAIL: gdb.base/vla-datatypes.exp: print unsigned_char_vla
FAIL: gdb.base/vla-datatypes.exp: print foo_vla
FAIL: gdb.base/vla-datatypes.exp: print bar_vla
FAIL: gdb.base/vla-datatypes.exp: print vla_struct_object
FAIL: gdb.base/vla-datatypes.exp: print vla_union_object
FAIL: gdb.base/vla-ptr.exp: print td_vla
FAIL: gdb.mi/mi-vla-c99.exp: evaluate complete vla

The first failure in this bunch occurs due to printing an incorrect
result for a variable length array:

    print int_vla
    $1 = {-1, -1, -1, -1, -1}

The result should actually be this:

    $1 = {0, 2, 4, 6, 8}

When I started examining this bug, I found that printing an
individual array element worked correctly.  E.g. "print int_vla[2]"
resulted in 4 being printed.  I have not looked closely to see why
this is the case.

I found that evaluation of the location expression for int_vla was
causing problems.  This is the relevant DWARF entry for int_vla:

<2><15a>: Abbrev Number: 10 (DW_TAG_variable)
    <15b>   DW_AT_name        : (indirect string, offset: 0xbf): int_vla
    <15f>   DW_AT_decl_file   : 1
    <160>   DW_AT_decl_line   : 35
    <161>   DW_AT_type        : <0x393>
    <165>   DW_AT_location    : 4 byte block: 86 7a 94 2  (DW_OP_breg22 (r22): -6; DW_OP_deref_size: 2)

I found that DW_OP_breg22 was providing a correct result.
DW_OP_deref_size was fetching the correct value from memory.  However,
the value being fetched should be considered a pointer.
DW_OP_deref_size zero extends the fetched value prior to pushing
it onto the evaluation stack.  (The DWARF-4 document specifies this
action; so GDB is faithfully implementing the DWARF-4 specification.)

However, zero extending the pointer is not sufficient for converting
that value to an address for rl78 and (perhaps) other architectures
which define a `pointer_to_address' method.  (I suspect that m32c
would have the same problem.)

Ideally, we would perform the pointer to address conversion in
DW_OP_deref_size.  We don't, however, know the type of the object
that the address refers to in DW_OP_deref_size.  I can't think
of a way to infer the type at that point in the code.

Before proceeding, I should note that there are two other DWARF
operations that could be used in place of DW_OP_deref_size.  One of
these is DW_OP_GNU_deref_type.  Current GDB implements this operation,
but as is obvious from the name, it is non-standard DWARF.  The other
operation is DW_OP_xderef_size.  Even though it's part of DWARF-2
through DWARF-4 specifications, it's not presently implemented in GDB.
Present day GCC does not output dwarf expressions containing this
operation either.  [Of the two, I like DW_OP_GNU_deref_type better.
Using it avoids the need to specify an "address space identifier".
(GCC, GDB, and other non-free tools all need to agree on the meanings
of these identifiers.)]

Back to the bug analysis...

The closest consumer of the DW_OP_deref_size result is the
DWARF_VALUE_MEMORY case in dwarf2_evaluate_loc_desc_full.  At that
location, we do know the object type to which the address is intended
to refer.  I added code to perform a pointer to address conversion at
this location.  (See the patch.)

I do have some misgivings regarding this patch.  As noted earlier, it
would really be better to perform the pointer to address conversion in
DW_OP_deref_size.  I can't, however, think of a way to make this work.
Changing GCC to output one of the other aforementioned operations might
be preferable but, as noted earlier, these solutions have problems as
well.  Long term, I think it'd be good to have something like
DW_OP_GNU_deref_type become part of the standard.  If that can't or
won't happen, we'll need to implement DW_OP_xderef_size.

But until that happens, this patch will work for expressions in which
DW_OP_deref_size occurs last.  It should even work for dereferences
followed by adding an offset.  I don't think it'll work for more than
one dereference in the same expression.

gdb/ChangeLog:

	* dwarf2loc.c (dwarf2_evaluate_loc_desc_full): Perform a pointer
	to address conversion for DWARF_VALUE_MEMORY.
2015-12-09 09:33:21 -07:00
Kevin Buettner
5fc2beac27 gdb.base/async.exp: Handle "asynchronous execution not supported"
This change eliminates some failures on simulator targets and makes
the test run a bit quicker too - without this change, we have to wait
for timeouts.

gdb/testsuite/ChangeLog:

	* gdb.base/async.exp (proc test_background): Add case
	for asynchronous execution not supported.
2015-12-09 09:23:57 -07:00
H.J. Lu
8eab413676 Implement Intel OSPKE instructions
This patch implements Intel OSPKE instructions documented in Intel64
and IA-32 Architectures Software Developer’s Manual Volume 2, September
2015.

gas/testsuite/

	* gas/i386/i386.exp: Run ospke and x86-64-ospke.
	* gas/i386/ospke.d: New file.
	* gas/i386/ospke.s: Likewise.
	* gas/i386/x86-64-ospke.d: Likewise.

opcodes/

	* i386-dis.c (MOD_0F01_REG_5): New.
	(RM_0F01_REG_5): Likewise.
	(reg_table): Use MOD_0F01_REG_5.
	(mod_table): Add MOD_0F01_REG_5.
	(rm_table): Add RM_0F01_REG_5.
	* i386-gen.c (cpu_flag_init): Add CPU_OSPKE_FLAGS.
	(cpu_flags): Add CpuOSPKE.
	* i386-opc.h (CpuOSPKE): New.
	(i386_cpu_flags): Add cpuospke.
	* i386-opc.tbl: Add rdpkru and wrpkru instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2015-12-09 08:01:57 -08:00
Jan Beulich
fa7cc15f24 gas/ELF: slightly relax elf/file*.d expectations
Despite the re-ordering done for the file symbols, some targets manage
to put section symbols ahead of it.
2015-12-09 14:35:07 +01:00
Luis Machado
1c35a88f1d varobj zero-padded hexadecimal format
This set of patches add support for the zero-padded hexadecimal format for
varobj's, defined as "zero-hexadecimal".  We currently only support regular
non-zero-padded hexadecimal.

Talking with IDE developers, they would like to have this option that is
already available to GDB's print/x commands, in the CLI, as 'z'.

gdb/ChangeLog:

2015-12-09  Luis Machado  <lgustavo@codesourcery.com>

	* gdb/mi/mi-cmd-var.c (mi_parse_format): Handle new "zero-hexadecimal"
	format.
	* gdb/varobj.c (varobj_format_string): Add "zero-hexadecimal" entry.
	(format_code): Add 'z' entry.
	(varobj_set_display_format): Handle FORMAT_ZHEXADECIMAL.
	* gdb/varobj.h (varobj_display_formats) <FORMAT_ZHEXADECIMAL>: New enum
	field.
	* NEWS: Add new note to MI changes citing the new zero-hexadecimal
	format for -var-set-format.

gdb/doc/ChangeLog:

2015-12-09  Luis Machado  <lgustavo@codesourcery.com>

	* gdb.texinfo (GDB/MI Variable Objects): Update text to mention
	-var-set-format's new zero-hexadecimal format.

gdb/testsuite/ChangeLog:

2015-12-09  Luis Machado  <lgustavo@codesourcery.com>

	* gdb.mi/mi-var-display.exp: Add new checks for the zero-hexadecimal
	  format and change test names to make them unique.
2015-12-09 11:00:47 -02:00
Jose E. Marchesi
ec892a0718 sparc: support %dN and %qN syntax for FP registers.
The SPARC Refence Manual documents the %dN and %qN syntax to
refer to double and quad-precision floating-point registers,
respectively.  See OSA2015 Appendix C, Assembly Language Syntax,
C1.1 Register Names.

This patch adds support for these names to GAS.  This eases the
porting of software from Solaris to GNU/Linux, as these register
names have been supported by the Solaris linker for a long time
and many assembler require that support.

gas/ChangeLog:

2015-12-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (sparc_ip): Support %dN and %qN notation for
	double and quad-precision floating-point registers.
2015-12-09 07:34:32 -05:00
Ruslan Kabatsayev
b593e3d9b0 Fix wrong output of x87 registers due to truncation to double on amd64
When `info float` is used on an AMD64 system, GDB prints
floating-point values of x87 registers with raw contents like
0x361a867a8e0527397ce0 or 0xc4f988454a1ddd3cfdab wrongly.

This happens due to truncation to double, after which the former
becomes 0.0, and the latter becomes negative infinity.  This is caused
by failed detection of x86-64 host, which results in setting
gdb_host_{float,double,long_double}_format to zeros.

This commit fixes this misdetection, and adds a test to make sure
future commits don't introduce a regression here.

gdb/ChangeLog:
2015-12-09  Ruslan Kabatsayev  <b7.10110111@gmail.com>

	PR gdb/18702
	* configure.host: Fix detection of x86_64 host when setting
	floatformats.

gdb/testsuite/ChangeLog:
2015-12-09  Ruslan Kabatsayev  <b7.10110111@gmail.com>
	    Pedro Alves  <pedro@redhat.com>

	PR gdb/18702
	Add checking of floatformats setup on x86_64 hosts.
	* gdb.arch/i386-float.S (main): Load bigval and smallval.
	(smallval, bigval): New labels/constants.
	* gdb.arch/i386-float.exp: Use with_test_prefix and test "info
	float" after loading bigval and smallval.
2015-12-09 12:17:40 +00:00
Nick Clifton
c192dad243 Fix compile time warning building RX target. 2015-12-09 12:01:19 +00:00
Alan Modra
dcfc7dd477 [GOLD] PowerPC style fix
* powerpc.cc (Target_powerpc::Relocate::relocate): New constant
	d_offset.  Use throughout.
	(Target_powerpc::relocate_relocs): Likewise.
2015-12-09 10:36:44 +10:30
Alan Modra
e3a7574e2e [GOLD] Edit PowerPC64 ELFv2 function entry code
In an fixed position executable, the entry code does not need to be
PIC and can thus lose a dependency on r12.

	* powerpc.cc (Target_powerpc::Relocate::relocate): Edit ELFv2
	entry code.
	(Target_powerpc::relocate_relocs): Edit relocs to suit.
2015-12-09 10:36:43 +10:30
Alan Modra
91a65d2fe8 [GOLD] Relocate::relocate() params
Some linker code editing needs to change multiple insns.  In some
cases multiple relocations are involved and it is not sufficient to
make the changes independently as relocations are processed, because
doing so might lead to a partial edit.  So in order to safely edit we
need all the relocations available in relocate().  Also, to emit
edited relocs corresponding to the edited code sequence we need some
way to pass information from relocate() to relocate_relocs(),
particularly if the edit depends on insns.  We can't modify input
relocs in relocate() as they are mmapped PROT_READ, nor it is
particularly clean to write relocs to the output at that stage.  So
add a Relocatable_relocs* field to relinfo to mark edited relocs.

Given that relocate is passed the raw reloc pointer, it makes sense to
remove the rel/rela parameter and r_type too.  However, that means the
mips relocate() needs to know whether SHT_REL or SHT_RELA relocs are
being processed.  So add a rel_type for mips, which also has the
benefit of removing relocate() overloading there.

This patch adds the infrastructure without making use of it.

Note that relinfo->rr will be NULL if not outputting relocations.

	* object.h (struct Relocate_info): Add "rr".
	* reloc.h (Relocatable_relocs::set_strategy): New accessor.
	* reloc.cc (Sized_relobj_file::do_relocate_sections): Init
	relinfo.rr for relocate_section and relocate_relocs.
	* powerpc.cc (relocate): Add rel_type and preloc parameters.
	Delete rela and r_type params, instead recalculate these from
	preloc.
	(relocate_relocs): Delete Relocatable_relocs* param, instead
	use relinfo->rr.
	* aarch64.cc: Likewise.
	* arm.cc: Likewise.
	* i386.cc: Likewise.
	* mips.cc: Likewise.
	* s390.cc: Likewise.
	* sparc.cc: Likewise.
	* target.h: Likewise.
	* tilegx.cc: Likewise.
	* x86_64.cc: Likewise.
	* testsuite/testfile.cc: Likewise.
	* target-reloc.h (relocate_section): Adjust to suit.
	(apply_relocation, relocate_relocs): Likewise.
2015-12-09 10:36:43 +10:30
GDB Administrator
b7a5f21d4f Automatic date update in version.in 2015-12-09 00:00:08 +00:00
Nick Clifton
7460c0abe8 Fix static analysis warning about undefined bheaviour.
PR binutils/19310
	* dwarf.c (display_debug_frames): Recode range test to avoid
	undefined behaviour.
2015-12-08 09:49:49 +00:00
Jan Beulich
ec9ab52c32 gas: consistently emit diagnostics for non-zero data emission to .bss/.struct 2015-12-08 10:14:49 +01:00
Jan Beulich
35c1a43964 gas: don't get confused by .asci{i,z} after .struct
While not allowed, this certainly shouldn't result in confusing the
programmer (by skipping lines in unexpected ways): Without returning,
demand_empty_rest_of_line() (at the end of the function) will demand
the _next_ line to be empty, and without the conditional we would
ignore the next line.
2015-12-08 10:12:54 +01:00
Jan Beulich
fbdf9406b0 ELF: don't re-order SHF_FILE symbols
.file directives may be used to identify the scope of local symbols,
the purpose of which gets subverted when re-ordering them. Only allow
the first of them to be moved to the first position.
2015-12-08 10:11:58 +01:00
Pierre-Marie de Rodat
3685b09fb8 DOCO: Enhance the menu to select function overloads with signatures
gdb/ChangeLog:

	* NEWS: Announce this enhancement and the corresponding new
	option.

gdb/doc/ChangeLog:

	* gdb.texinfo (Ada Mode Into): Move overloading support
	description to its own node.
	(Overloading support for Ada): New node.
2015-12-08 09:59:44 +01:00
DJ Delorie
e896287c16 rl78: relaxation fixes
Various fixes to linker relaxation.  In general, we need to support
relaxing every branch, even if we don't relax it in the assembler,
so we can optionally defer relaxation to the linker.

* elf32-rl78.c (rl78_offset_for_reloc): Add more relocs.
(rl78_elf_relax_section): Add bc/bz/bnc/bnz/bh/bnh.  Fix reloc
choices.

* config/rl78-parse.y: Make all branches relaxable via
rl78_linkrelax_branch().
* config/tc-rl78.c (rl78_linkrelax_branch): Mark all relaxable
branches with relocs.
(options): Add OPTION_NORELAX.
(md_longopts): Add -mnorelax.
(md_parse_option): Support OPTION_NORELAX.
(op_type_T): Add bh, sk, call, and br.
(rl78_opcode_type): Likewise.
(rl78_relax_frag): Fix not-relaxing logic.  Add sk.
(md_convert_frag): Fix relocation handling.
(tc_gen_reloc): Strip relax relocs when not linker relaxing.
(md_apply_fix): Defer overflow handling for anything that needs a
PLT, to the linker.
* config/tc-rl78.h (TC_FORCE_RELOCATION): Force all relocations to
the linker when linker relaxing.
* doc/c-rl78.texi (norelax): Add.
2015-12-08 01:29:25 -05:00
DJ Delorie
7859afc4fa rx: Fix p_vaddr reconstruction logic.
* elf32-rx.c (rx_elf_object_p): Ignore empty and nobits sections.
2015-12-08 01:15:58 -05:00
DJ Delorie
1eac08cc37 rl78: Enable MULU for all ISAs.
Unlike other mul/div opcodes, MULU is available on all variants
of the RL78.

* rl78-decode.opc: Enable MULU for all ISAs.
* rl78-decode.c: Regenerate.
2015-12-08 00:16:13 -05:00
GDB Administrator
e4e26dfd3f Automatic date update in version.in 2015-12-08 00:00:22 +00:00
Jan Beulich
1e550d79b1 ld: relax alignment requirements of compressed .debug_* section checks
This fixes a failure of the gabinormal linking test on some distros
(where e.g. crt1.o has a .debug_aranges section with larger alignment).
2015-12-07 17:52:25 +01:00
Yao Qi
17b1509aac Support Z0 packet in AArch64 multi-arch debugging
In commit 6085d6f6, Z0 packet is disabled in aarch64 GDBserver if
the inferior is 32-bit or there may be multiple inferiors, because
Z0 packet isn't supported for arm then.  Recently, Z0 packet
is supported in arm target, so we don't have such limitation in
aarch64 GDBserver, that is to say, aarch64 GDBserver can use Z0
packet in multi-arch/multi-inferior debugging when the inferior's
arch is arm.

Part of this patch is to revert 6085d6f6, and the rest of the patch
is to move some breakpoint related arm_* functions into
linux-aarch32-low.c in order to share them between arm and aarch64.

This patch is regression tested on aarch64-linux for debugging both
aarch64 programs and arm programs respectively.

gdb/gdbserver:

2015-12-07  Yao Qi  <yao.qi@linaro.org>

	* configure.srv: Append arm.o to srv_tgtobj for
	aarch64*-*-linux* target.
	* linux-aarch32-low.c (arm_abi_breakpoint): New macro.  Moved
	from linux-arm-low.c.
	(arm_eabi_breakpoint, arm_breakpoint): Likewise.
	(arm_breakpoint_len, thumb_breakpoint): Likewise.
	(thumb_breakpoint_len, thumb2_breakpoint): Likewise.
	(thumb2_breakpoint_len): Likewise.
	(arm_is_thumb_mode, arm_breakpoint_at): Likewise.
	(arm_breakpoint_kinds): Likewise.
	(arm_breakpoint_kind_from_pc): Likewise.
	(arm_sw_breakpoint_from_kind): Likewise.
	(arm_breakpoint_kind_from_current_state): Likewise.
	* linux-aarch32-low.h (arm_breakpoint_kind_from_pc): Declare.
	(arm_sw_breakpoint_from_kind): Declare.
	(arm_breakpoint_kind_from_current_state): Declare.
	(arm_breakpoint_at): Declare.
	* linux-aarch64-low.c (aarch64_sw_breakpoint_from_kind): Call
	arm_sw_breakpoint_from_kind if process is 32-bit.
	(aarch64_breakpoint_kind_from_pc): New function.
	(aarch64_breakpoint_kind_from_current_state): New function.
	(the_low_target): Initialize fields breakpoint_kind_from_pc
	and breakpoint_kind_from_current_state.
	* linux-arm-low.c (arm_breakpoint_kinds): Move to
	linux-aarch32-low.c.
	(arm_abi_breakpoint, arm_eabi_breakpoint): Likewise.
	(arm_breakpoint, arm_breakpoint_len): Likewise.
	(thumb_breakpoint, thumb_breakpoint_len): Likewise.
	(thumb2_breakpoint, thumb2_breakpoint_len): Likewise.
	(arm_is_thumb_mode): Likewise.
	(arm_breakpoint_at): Likewise.
	(arm_breakpoint_kind_from_pc): Likewise.
	(arm_sw_breakpoint_from_kind): Likewise.
	(arm_breakpoint_kind_from_current_state): Likewise.

	Revert:
	2015-08-04  Yao Qi  <yao.qi@linaro.org>

	* linux-aarch64-low.c (aarch64_supports_z_point_type): Return
	0 for Z_PACKET_SW_BP if it may be used in multi-arch debugging.
	* server.c (extended_protocol): Remove "static".
	* server.h (extended_protocol): Declare it.
2015-12-07 15:56:31 +00:00
Nick Clifton
6056244624 oops - accidentally omittde from previous delta. 2015-12-07 14:44:46 +00:00
Nick Clifton
5ee4a06ade Fix relaxation in RX linker when --no-keep-memory is specified.
* elf32-rx.c (elf32_rx_relax_delete_bytes): Add extra parameter -
	the start of the relocs for the section.  Delete code to load in
	the relocs.
	(elf32_rx_relax_section): Do not free the loaded relocs.
2015-12-07 14:43:47 +00:00
Pierre-Marie de Rodat
d72413e64a Enhance the menu to select function overloads with signatures
So far, trying to evaluate an expression involving a function call for
which GDB could find multiple function candidates outputs a menu so that
the user can select the one to run.  For instance, with the two
following functions:

    type New_Integer is new Integer;

    function F (I : Integer) return Boolean;
    function F (I : New_Integer) return Boolean;

Then we get the following GDB session:

    (gdb) print f(1)
    Multiple matches for f
    [0] cancel
    [1] foo.f at foo.adb:23
    [2] foo.f at foo.adb.28
    >

While the source location information is sufficient in order to
determine which one to select, one has to look for them in source files,
which is not convenient.

This commit tunes this menu in order to also include the list of formal
and return types (if any) in each entry.  The above then becomes:

    (gdb) print f(1)
    Multiple matches for f
    [0] cancel
    [1] foo.f (integer) return boolean at foo.adb:23
    [2] foo.f (foo.new_integer) return boolean at foo.adb.28
    >

Since this output is more verbose than previously, this change also
introduces an option (set/show ada print-signatures) to get the original
output.

gdb/ChangeLog:

	* ada-lang.c (print_signatures): New.
	(ada_print_symbol_signature): New.
	(user_select_syms): Add signatures to the output of candidate
	symbols using ada_print_symbol_signature.
	(_initialize_ada_language): Add a "set/show ada
	print-signatures" boolean option.

gdb/testsuite/ChangeLog:

	* gdb.ada/fun_overload_menu.exp: New testcase.
	* gdb.ada/fun_overload_menu/foo.adb: New testcase.

Tested on x86_64-linux, no regression.
2015-12-07 13:32:43 +01:00
Andreas Arnez
1b36b65787 Add myself as a write-after-approval GDB maintainer
gdb/ChangeLog:

	* MAINTAINERS (Write After Approval): Add Andreas Arnez.
2015-12-07 12:59:34 +01:00
Nick Clifton
f7584f0560 Add support for MSP430 F5 hardware multiply.
* msp430-sim.c (sim_open): Check for needed memory at address
	0x500 not 0x200.
	(get_op): Add support for F5 hardware multiply addresses.
	(put_op): Likewise.
2015-12-07 10:19:19 +00:00
Alan Modra
cbf9597294 PowerPC ifunc with local symbols
This fixes some cases where the linker would incorrectly error on plt
relocs to local ifunc symbols.  I've also tidied plt and ifunc
handling for ppc64, where check_relocs was allowing for the
possibility of plt calls via addr14/addr24 relocs but relocate_section
was not.

	* elf32-ppc.c (ppc_elf_check_relocs): Don't error on local ifunc
	plt call.  Wrap long lines.
	(ppc_elf_relocate_section): Wrap long lines.
	* elf64-ppc.c (ppc64_elf_check_relocs): Don't error on local ifunc
	plt calls.  Move __tls_get_addr checks later.  Don't create plt
	for addr14/addr24 relocs.
	(ppc64_elf_gc_sweep_hook): Adjust to suit check_relocs changes.
	(ppc64_elf_relocate_section): Correct local ifunc handling for
	PLT64, PLT32 and PLT16 relocs.
2015-12-07 13:52:01 +10:30
Alan Modra
c20f6f63ed PR19323 memory allocation greater than 4G
On 32-bit targets, memory requested for program/section headers on a
fuzzed binary can wrap to 0.  A bfd_alloc of zero bytes actually
returns a one byte allocation rather than a NULL pointer.  This then
leads to buffer overflows.

Making this check unconditional triggers an extremely annoying gcc-5
warning.

	PR19323
	* elfcode.h (elf_object_p): Check for ridiculous e_shnum and
	e_phnum values.
2015-12-07 13:42:23 +10:30
Alan Modra
549dba7104 [GOLD] R_PPC64_ENTRY support
elfcpp/
	* powerpc.h (R_PPC64_ENTRY): Define.
gold/
	* powerpc.cc (add_2_2_12, ld_2_12, lis_2): Define.
	(Target_powerpc::Scan::local, global): Handle R_PPC64_ENTRY.
	(Target_powerpc::Relocate::relocate): Edit code at R_PPC64_ENTRY.
2015-12-07 13:17:00 +10:30
Alan Modra
006589cfa1 R_PPC64_ENTRY
Add a new relocation that marks large-model entry code, for edit back
to medium-model.

include/elf/
	* ppc64.h (R_PPC64_ENTRY): Define.
bfd/
	* reloc.c (BFD_RELOC_PPC64_ENTRY): New.
	* elf64-ppc.c (reloc_howto_type ppc64_elf_howto_raw): Add
	entry for R_PPC64_ENTRY.
	(LD_R2_0R12, ADD_R2_R2_R12, LIS_R2, ADDIS_R2_R12): Define.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_ENTRY.
	(ppc64_elf_relocate_section): Edit code at R_PPC64_ENTTY.  Use
	new insn defines.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
2015-12-07 13:14:53 +10:30
Alan Modra
487b24d8c2 tc-ppc.c md_apply_fix tidy
* config/tc-ppc.c (md_apply_fix): Localize variables.  Reduce casts.
2015-12-07 13:14:35 +10:30
Alan Modra
dd2887fc3d Reorder some power9 insns
The idea being to put instructions that have the same encoding adjacent
to each other.

	* opcodes/ppc-opc.c (powerpc_opcodes): Sort power9 insns by
	major opcode/xop.
2015-12-07 13:14:05 +10:30
Kaz Kojima
2b213129c5 bfd: Mark sh5*-*-* and sh64*-*-* targets as obsolete. 2015-12-07 10:01:02 +09:00
GDB Administrator
2f672fe62a Automatic date update in version.in 2015-12-07 00:00:08 +00:00
Joel Brobecker
030f17b5eb Replace remaining references to i386-nat with x86-nat instead.
i386-nat.[hc] got renamed to x86-nat.[hc] a while back, but somehow
3 references to the old file name remained past the renaming. This
fixes all of them.

gdb/ChangeLog (with Mike Stump <mikestump@comcast.net>):

        * Makefile.in (TAGS): Replace i386-nat.h by x86-nat.h.
        * x86-nat.c: Replace remaining references to i386-nat
        by reference to x86-nat instead.
2015-12-06 18:44:46 +01:00
GDB Administrator
a4581526de Automatic date update in version.in 2015-12-06 00:00:08 +00:00
Joel Brobecker
a5d43209a5 Document the GDB 7.10.1 release in gdb/ChangeLog
gdb/ChangeLog:

	GDB 7.10.1 released.
2015-12-05 16:29:09 +01:00
Josh Stone
ece66d6510 gdbserver: set ptrace flags after creating inferiors
Rename target_ops.arch_setup to .post_create_inferior.  In the Linux
hook, continue calling the low arch setup, then also set ptrace flags.
This corrects the possibility of running without flags, demonstrated by
a new test that would fail to catch a fork before.

gdb/gdbserver/ChangeLog:

2015-12-04  Josh Stone  <jistone@redhat.com>

	* target.h (struct target_ops) <arch_setup>: Rename to ...
	(struct target_ops) <post_create_inferior>: ... this.
	(target_arch_setup): Rename to ...
	(target_post_create_inferior): ... this, calling post_create_inferior.
	* server.c (start_inferior): Update target_arch_setup calls to
	target_post_create_inferior.
	* linux-low.c (linux_low_ptrace_options): Forward declare.
	(linux_arch_setup): Update its comment for general use.
	(linux_post_create_inferior): New, run arch_setup and setup ptrace.
	(struct linux_target_ops): Use linux_post_create_inferior.
	* lynx-low.c (struct lynx_target_ops): Update arch_setup stub comment
	to post_create_inferior.
	* nto-low.c (struct nto_target_ops): Likewise.
	* spu-low.c (struct spu_target_ops): Likewise.
	* win32-low.c (struct win32_target_ops): Likewise.

gdb/testsuite/ChangeLog:

2015-12-04  Josh Stone  <jistone@redhat.com>

	* gdb.base/catch-fork-static.exp: New.
2015-12-04 18:25:26 -08:00
GDB Administrator
cc51fd4ccf Automatic date update in version.in 2015-12-05 00:00:07 +00:00
H.J. Lu
02e2aef89b Optimize R_386_GOT32/R_386_GOT32X only if addend is 0
Linker can't optimize R_386_GOT32 and R_386_GOT32X relocations if addend
isn't 0.  It isn't valid to convert

movl	foo@GOT+1(%ecx), %eax

to

leal	foo@GOTOFF+1(%ecx), %eax

nor to convert

movq	foo@GOTPCREL+1(%rip), %rax

to

leaq	foo(%rip), %rax

for x86-64.  We should check if addend is 0 before optimizing R_386_GOT32
and R_386_GOT32X relocations.  Testcases are added for i386 and x86-64.

bfd/

	* elf32-i386.c (elf_i386_convert_load): Skip if addend isn't 0.
	(elf_i386_relocate_section): Skip R_386_GOT32X optimization if
	addend isn't 0.

ld/testsuite/

	* ld-i386/i386.exp: Run mov2a, mov2b and mov3.
	* ld-i386/mov2.s: New file.
	* ld-i386/mov2a.d: Likewise.
	* ld-i386/mov2b.d: Likewise.
	* ld-i386/mov3.d: Likewise.
	* ld-i386/mov3.s: Likewise.
	* ld-x86-64/mov2.s: Likewise.
	* ld-x86-64/mov2a.d: Likewise.
	* ld-x86-64/mov2b.d: Likewise.
	* ld-x86-64/mov2c.d: Likewise.
	* ld-x86-64/mov2d.d: Likewise.
	* ld-x86-64/x86-64.exp: Run mov2a, mov2b, mov2c and mov2d.
2015-12-04 09:03:04 -08:00
Nick Clifton
f27c5390b2 Fix GAS testsuite failures for COFF/PE based ARM targets.
PR gas/19276
gas	* config/tc-arm.h (SUB_SEGMENT_ALIGN): Do not define for COFF/PE
	targets.

testsuite	* gas/arm/align64.d: Skip for COFF/PE targets.
	* gas/arm/bundle-lock.d: Adjust for COFF/PE targets.
2015-12-04 15:07:10 +00:00
Tristan Gingold
461c4b2ede Remove useless loop in elf.c 2015-12-04 12:51:03 +01:00
Claudiu Zissulescu
24b368f853 Fix failures in the GAS testsuite for the ARC architecture.
gas	* config/tc-arc.c (arc_option): Sets all internal gas options when
	parsing .cpu directive.
	(declare_register_set): Declare all 64 registers.
	(md_section_align): Refactor.
	(md_pcrel_from_section): Remove assert.
	(pseudo_operand_match): Fix pseudo operand match.
	(find_reloc): Use flags filed, extend matching.
	* config/tc-arc.h (TC_VALIDATE_FIX): Don't fixup any PLT
	relocation.

testsuite	* gas/arc/bic.d: Update test.
	* gas/arc/add_s-err.s: New file.
	* gas/arc/cpu-warn1.s: Likewise.
	* gas/arc/pcl-relocs.d: Likewise.
	* gas/arc/pcl-relocs.s: Likewise.
	* gas/arc/pcrel-relocs.d: Likewise.
	* gas/arc/pcrel-relocs.s: Likewise.
	* gas/arc/pic-relocs.d: Likewise.
	* gas/arc/pic-relocs.s: Likewise.
	* gas/arc/plt-relocs.d: Likewise.
	* gas/arc/plt-relocs.s: Likewise.
	* gas/arc/pseudos.d: Likewise.
	* gas/arc/pseudos.s: Likewise.
	* gas/arc/sda-relocs.d: Likewise.
	* gas/arc/sda-relocs.s: Likewise.
	* gas/arc/sda-relocs2.d: Likewise.
	* gas/arc/sda-relocs2.s: Likewise.
	* gas/arc/tls-relocs.d: Likewise.
	* gas/arc/tls-relocs.s: Likewise.

opcode	* arc.h (arc_reloc_equiv_tab): Replace flagcode with flags[32].

opcodes	* arc-dis.c (special_flag_p): Match full mnemonic.
	* arc-opc.c (print_insn_arc): Check section size to read
	appropriate number of bytes. Fix printing.
	* arc-tbl.h: Fix instruction table. Allow clri/seti instruction without
	arguments.
2015-12-04 10:49:57 +00:00
GDB Administrator
5cc854a862 Automatic date update in version.in 2015-12-04 00:00:12 +00:00
Vladimir Radosavljevic
7ef8ae7c5f Take addend into account when making GOT entries for local symbols.
gold/
	* object.cc (Sized_relobj::do_for_all_local_got_entries): Use
	Local_got_entry_key for searching in local_got_offsets_.
	* object.h (class Local_got_entry_key): New class.
	(Relobj::local_has_got_offset): New overloaded method.
	(Relobj::local_got_offset): Likewise.
	(Relobj::set_local_got_offset): Likewise.
	(Relobj::do_local_has_got_offset): Add addend argument.
	(Relobj::do_local_got_offset): Likewise.
	(Relobj::do_set_local_got_offset): Likewise.
	(Sized_relobj::do_local_has_got_offset): Add addend argument, and use
	Local_got_entry_key for searching through local_got_offsets_.
	(Sized_relobj::do_local_got_offset): Likewise.
	(Sized_relobj::do_set_local_got_offset): Likewise.
	(Sized_relobj::Local_got_offsets): Change type of the key from
	unsigned int to Local_got_entry_key, and add hash and equal_to.
	* output.cc (Got_entry::write): Take addend into account for
	calculating value of the local symbol for GOT.
	(Output_data_got::add_local): New definition of overloaded method.
	(Output_data_got::add_local_with_rel): Likewise.
	(Output_data_got::add_local_pair_with_rel): Likewise.
	* output.h (Output_data_got::add_local): New declaration of overloaded
	method.
2015-12-03 15:29:17 -08:00
Antoine Tremblay
e58c48b4c8 Remove duplicate arch/arm.h include in linux-arm-low.c.
A duplicate include arm/arm.h was introduced, remove it.
Pushed as obvious.

gdb/gdbserver/ChangeLog:

	* linux-arm-low.c: Remove duplicate arch/arm.h include.
2015-12-03 14:00:24 -05:00
Yao Qi
41d0efca57 Run gdb.base/sizeof.exp with board having gdb,noinferiorio
In my remote cross testing (x86_64 host and aarch64 target), the test
gdb.base/sizeof.exp is skipped because gdb,noinferiorio is defined in
my gdbserver board file.  Tests are skipped because the test checks
the expected value from the program's output, but I don't see why must
do it this way.  With my patch applied, we can save the result in variable
in the program, and check the variable then.  Then, the test doesn't rely
on inferiorio.

gdb/testsuite:

2015-12-03  Yao Qi  <yao.qi@linaro.org>

	* gdb.base/sizeof.c: Don't include stdio.h and
	../lib/unbuffer_output.c.
	(main): New variable 'size' and 'value'.  Remove printf and
	gdb_unbuffer_output.  Assign return value to size and value.
	* gdb.base/sizeof.exp: Remove the checking to gdb,noinferiorio
	at the beginning.
	(check_sizeof): Check the result by printing variable 'size'.
	(check_valueof): Check the result by printing variable 'value'.
2015-12-03 17:12:41 +00:00
Tristan Gingold
b4687fcc2b Darwin: add new mach-o header flags.
binutils/
	* od-macho.c (bfd_mach_o_header_flags_name): Add name
	for flags until BFD_MACH_O_MH_APP_EXTENSION_SAFE.

include/mach-o/
	* loader.h (bfd_mach_o_header_flags): Add
	BFD_MACH_O_MH_APP_EXTENSION_SAFE.
2015-12-03 12:00:50 +01:00