* elf32-xtensa.c (elf_xtensa_check_relocs): Remove code to read
literal tables and check for relocs outside of literal pools.
(elf_xtensa_make_sym_local): Don't clear ELF_LINK_NON_GOT_REF flag.
(elf_xtensa_fix_refcounts): Don't check ELF_LINK_NON_GOT_REF or
set DF_TEXTREL.
(elf_xtensa_size_dynamic_sections): Don't add DT_TEXTREL entry.
(elf_xtensa_relocate_section): Read literal tables and check for
dynamic relocations in read-only sections and not in literal pools.
gas/ChangeLog:
* config/tc-xtensa.c (xtensa_post_relax_hook): Create literal
tables even when use_literal_section flag is not set.
--mul-bug-abort and the default behavior.
* config/tc-cris.c (cris_insn_kind): New member CRIS_INSN_MUL.
(err_for_dangerous_mul_placement): New variable.
(STATE_MUL, OPTION_MULBUG_ABORT_ON, OPTION_MULBUG_ABORT_OFF): New
macros.
(md_cris_relax_table): Have placeholder for STATE_MUL.
(md_longopts): New options --mul-bug-abort and --no-mul-bug-abort.
(cris_relax_frag) <case ENCODE_RELAX (STATE_MUL, STATE_BYTE)>: New
case doing nothing.
(md_estimate_size_before_relax) <case ENCODE_RELAX (STATE_MUL,
STATE_BYTE)>: Ditto.
(md_convert_frag) <ENCODE_RELAX (STATE_MUL, STATE_BYTE)>: Check
alignment and position of this frag, emit error message if
suspicious.
(md_assemble): For a multiply insn and when checking it,
transform the current frag into a special frag for that purpose.
(md_parse_option) <case OPTION_MULBUG_ABORT_OFF, case
OPTION_MULBUG_ABORT_ON>: Handle new options.
(xtensa_move_literals): Call mark_literal_frags for all literal
segments, including init and fini literal segments.
(xtensa_post_relax_hook): Swap use of xt_insn_sec and xt_literal_sec.
R_PARISC_PCREL32 and R_PARISC_PCREL64 relocations.
* tc-hppa.c (cons_fix_new_hppa): Check for PC relative base type.
(pa_comm): Set BSF_OBJECT in symbol flags.
(M, Mp): Use OP_M.
(None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
(GRPPADLCK): Define.
(dis386): Use NOP_Fixup on "nop".
(dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
(twobyte_has_modrm): Set for 0xa7.
(padlock_table): Delete. Move to..
(grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
and clflush.
(print_insn): Revert PADLOCK_SPECIAL code.
(OP_E): Delete sfence, lfence, mfence checks.
* gas/i386/katmai.d: Revert last change.
* i386-dis.c (grps): Use clflush by default for 0x0fae/7.
(OP_E): Twiddle clflush to sfence here.
gas/testsuite/
* gas/i386/katmai.d: Adjust for clflush change.
* config/tc-ia64.c (dot_align): New.
(ia64_do_align): Make it static.
(md_pseudo_table): Use "dot_align" for "align".
(ia64_md_do_align): Don't set align_frag here.
(ia64_handle_align): Add a stop bit to the previous bundle if
needed.
* config/tc-ia64.h (ia64_do_align): Removed.
opcodes:
* sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
* sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
accordingly.
bfd:
* archures.c: Add bfd_mach_sh4_nommu_nofpu.
* cpu-sh.c: Ditto.
* elf32-sh.c: Ditto.
* bfd-in2.h: Regenerate.
include/elf:
* sh.h: Add EF_SH4_NOMMU_NOFPU.
gas:
* config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and
-isa=sh4-nommu-nofpu options. Adjust help messages accordingly.
(sh_elf_final_processing): Output BFD type sh4_nofpu if that is
the most general type or the user specifically requested it.
(md_assemble): Add a new error message for when an instruction
is understood, but is not allowed due to an -isa option.
* config/tc-ia64.c (align_frag): New.
(md_assemble): Set the tc_frag_data field in align_frag for
IA64_OPCODE_FIRST instructions.
(ia64_md_do_align): Set align_frag.
(ia64_handle_align): Add a stop bit if needed.
* config/tc-ia64.h (TC_FRAG_TYPE): New.
(TC_FRAG_INIT): New.
gas:
* tc-sh.c (build_Mytes): Add REG_N_D and REG_N_B01
nibble types to assembler.
opcodes:
* sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
ensure that double registers have even numbers.
Add REG_N_B01 for nn01 (binary 01) nibble to ensure
that reserved instruction 0xfffd does not decode the same
as 0xfdfd (ftrv).
* sh-opc.h: Add REG_N_D nibble type and use it whereever
REG_N refers to a double register.
Add REG_N_B01 nibble type and use it instead of REG_NM
in ftrv.
Adjust the bit patterns in a few comments.
