* cgen.sh: New file.
* cgen-scache.h: Deleted.
* cgen-scache.c: Only compile contents if WITH_SCACHE.
(scache_init): Use runtime computed size of SCACHE.
(scache_flush): Likewise.
* cgen-mem.h (GETIMEMU[QHSD]I): Declare.
([GS]ETT{QI,UQI,HI,UHI,SI,USI,DI,UDI}): Declare.
* cgen-sim.h: Scache support moved here.
(PC): Redo definition.
(ARGBUF,SCACHE,PARALLEL_EXEC): Provide forward decls.
(DECODE): Add parallel execution support.
Only include semantic label members if using switch.
(SWITCH,CASE,BREAK,DEFAULT,ENDSWITCH): Portable computed goto support.
(CGEN_CPU): Delete members exec_state, halt_sigrc, halt_jmp_buf.
(IADDR,CIA,SEM_ARG,EX_FN_NAME,SEM_FN_NAME,RECORD_IADDR,SEM_ARGBUF,
SEM_NEXT_PC,SEM_BRANCH_VIA_{CACHE,ADDR},SEM_NEW_PC_ADDR): Moved here
from cgen-types.h.
(engine_{stop,run,resume,halt,signal}): Delete decls.
* cgen-types.h (CGEN_{XCAT3,CAT3}): Delete.
(argbuf,scache): Delete forward decls.
(STATE): Delete decl.
* cgen-utils.c: Don't include decode.h, mem-ops.h, sem-ops.h.
Include cgen-mem.h, cgen-ops.h.
(engine_halt,engine_signal): Delete.
({ex,exc,sem,semc}_illegal): Delete.
(sim_disassemble_insn): Result of extract fn is in bits.
* genmloop.sh: Rewrite.
isn't possible in sim-reason.c and just return the target SIGRC
instead.
For simulators that rely on sim-reason.c, replace SIG* with SIM_SIG*.
Hack nrun.c so that when it is executed (ARGV[0]) as `step' instead
of `run' it single steps the simulator. Allows testing of single step
without full GDB.
built this way.
(sim-config.o): Remove non-existent $(sim-nconfig_h) dependency.
(clean): Don't delete $(BUILT_SRC_FROM_COMMON) if building in
source tree.
* sim-base.h: Add point to breakpoint list to sim_state_base.
* sim-break.c sim-break.h: New modules that implement intrinsic
breakpoint support.
* sim-module.c: Add breakpoint module.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
(sim-{module,options,trace,profile,utils}.o): Clean up dependencies.
(sim-model.o): Add new rule.
(cgen-{scache,trace,utils}.o): Add new rules.
* aclocal.m4 (SIM_AC_OPTION_{SCACHE,DEFAULT_MODEL}): Add.
* cgen-scache.c (scache_print_profile): Change `sd' arg to `cpu'.
Indent output by 2 spaces.
* cgen-scache.h (scache_print_profile): Update.
* cgen-trace.c (trace_insn_fini): Indent output by 2 spaces.
Use trace_printf, not fprintf.
(trace_extract): Use trace_printf, not cgen_trace_printf.
* genmloop.sh (!FAST case): Increment `insn_count'.
* sim-base.h (sim_state_base): Only include scache_size if WITH_SCACHE.
(sim_cpu_base): Rename member `sd' to `state' to be consistent with
access macro's name.
* sim-core.c (sim_core_init): Use EXTERN_SIM_CORE to define it.
Change return type to SIM_RC.
(sim_core_{install,uninstall}): New functions.
* sim-core.h (sim_core_{install,uninstall}): Declare.
(sim_core_init): Use EXTERN_SIM_CORE to define it.
Change return type to SIM_RC.
* sim-model.h (models,machs,model_install): Declare.
* sim-module.c (modules): Add scache_install, model_install.
(sim_post_argv_init): Set cpu->state backlinks.
* sim-options.c (standard_options): Delete --simcache-size,--max-insns.
(standard_option_handler): Likewise.
* sim-profile.c (PROFILE_{HISTOGRAM,LABEL}_WIDTH): Move to
sim-profile.h.
(*): Assume ANSI C.
(profile_options): Delete --profile-simcache.
(profile_option_handler): Likewise.
(profile_print_insn): Change `sd' arg to `cpu'. Indent output 2
spaces.
(profile_print_{memory,model}): Likewise.
(profile_print_simcache): Delete.
(profile_print_speed): New function.
(profile_print): Rewrite.
* sim-profile.h (PROFILE_scache): Renamed from PROFILE_simcache.
(WITH_PROFILE_SCACHE_P): Renamed from WITH_PROFILE_SIMCACHE_P.
(PROFILE_DATA): Delete members simcache_{hits,misses}.
(PROFILE_COUNT_SIMCACHE_{HIT,MISS}): Delete.
(PROFILE_{CALLBACK,CPU_CALLBACK}): New types.
(profile_print): Update prototype.
Makefiles can have their own clean targets.
* sim-load.c (xprintf eprintf): Use ANSI_PROTOTYPES instead of
__STDC__ to control use of stdarg vs. varargs syntax. Some
systems can't use __STDC__, but require stdarg.
(INSTALL_XFORM, INSTALL_XFORM1): Remove.
(install-common): Depend upon installdirs. Use
$(program_transform_name) directly, rather than using
$(INSTALL_XFORM).
(installdirs): New target.
* Makefile.in (INSTALL): Set to @INSTALL@.
(INSTALL_XFORM, INSTALL_XFORM1): Remove.
(install-man): Depend upon installdirs. Use
$(program_transform_name) directly, rather than using
$(INSTALL_XFORM).
(installdirs): New target.
* Make-common.in (CSEARCH): Do not include the gdb directory in
the search path.
* Make-common.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_INLINE,
SIM_WARNING): Drop, requiring the simulator specific Makefile.in
to explicitly incorporate these.
* aclocal.m4 (--enable-sim-alignment); New option. Strongly
specify the alignment restrictions of the target architecture -
without this option all alignment restrictions are accomodated.
(--enable-sim-assert): New option. Conditionally compile in
assertion statements.
(--enable-sim-float): New option. Strongly specify the target's
floating point support.
(--enable-sim-hardware): New option. Specify the hardware devices
included in the simulation.
(--enable-sim-packages): New option. Specify the hardware
packages included in the simulation.
(--enable-sim-regparm): New option. Specify that parameters be
passed in registers instead of on the stack.
(--enable-sim-reserved-bits): New option. Specify that reserved
bits within an instruction are are correctly set.
(--enable-sim-smp): New option. Specify the level of SMP support
to be included in the simulator.
(--enable-sim-stdcall): New option. Specify an alternative
function call convention.
(--enable-sim-xor-endian): New option. Configure xor-endian
support used by some targets to implement bi-endian support.
