* sim/fr30/ldres.cgs: New testcase.
* sim/fr30/stres.cgs: New testcase.
* sim/fr30/copop.cgs: New testcase.
* sim/fr30/copld.cgs: New testcase.
* sim/fr30/copst.cgs: New testcase.
* sim/fr30/copsv.cgs: New testcase.
* sim/fr30/nop.cgs: New testcase.
* sim/fr30/andccr.cgs: New testcase.
* sim/fr30/orccr.cgs: New testcase.
* sim/fr30/addsp.cgs: New testcase.
* sim/fr30/stilm.cgs: New testcase.
* sim/fr30/extsb.cgs: New testcase.
* sim/fr30/extub.cgs: New testcase.
* sim/fr30/extsh.cgs: New testcase.
* sim/fr30/extuh.cgs: New testcase.
* sim/fr30/enter.cgs: New testcase.
* sim/fr30/leave.cgs: New testcase.
* sim/fr30/xchb.cgs: New testcase.
* sim/fr30/dmovb.cgs: New testcase.
* sim/fr30/dmov.cgs: New testcase.
* sim/fr30/dmovh.cgs: New testcase.
* sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
* sim/fr30/ret.cgs: Add tests fir ret:d.
* sim/fr30/inte.cgs: New testcase.
* sim/fr30/reti.cgs: New testcase.
* sim/fr30/bra.cgs: New testcase.
* sim/fr30/bno.cgs: New testcase.
* sim/fr30/beq.cgs: New testcase.
* sim/fr30/bne.cgs: New testcase.
* sim/fr30/bc.cgs: New testcase.
* sim/fr30/bnc.cgs: New testcase.
* sim/fr30/bn.cgs: New testcase.
* sim/fr30/bp.cgs: New testcase.
* sim/fr30/bv.cgs: New testcase.
* sim/fr30/bnv.cgs: New testcase.
* sim/fr30/blt.cgs: New testcase.
* sim/fr30/bge.cgs: New testcase.
* sim/fr30/ble.cgs: New testcase.
* sim/fr30/bgt.cgs: New testcase.
* sim/fr30/bls.cgs: New testcase.
* sim/fr30/bhi.cgs: New testcase.
* sim/fr30/call.cgs: Test ret here as well.
* sim/fr30/ld.cgs: Remove bogus comment.
* sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
* sim/fr30/div.ms: New testcase.
* sim/fr30/st.cgs: New testcase.
* sim/fr30/sth.cgs: New testcase.
* sim/fr30/stb.cgs: New testcase.
* sim/fr30/mov.cgs: New testcase.
* sim/fr30/jmp.cgs: New testcase.
* sim/fr30/ret.cgs: New testcase.
* sim/fr30/int.cgs: New testcase.
Set mips_fpu, and mips_fpu_bitsize.
Set sim_gen, and sim_igen_machine.
* configure: Rebuild.
* mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
* sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
* sim/fr30/div0s.cgs: New testcase.
* sim/fr30/div0u.cgs: New testcase.
* sim/fr30/div1.cgs: New testcase.
* sim/fr30/div2.cgs: New testcase.
* sim/fr30/div3.cgs: New testcase.
* sim/fr30/div4s.cgs: New testcase.
* sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
(tx3904sio_tickle): fflush after a stdout character output.
* sim/fr30/testutils.inc (set_s_user): Correct Mask.
(set_s_system): Correct Mask.
* sim/fr30/ld.cgs (ld): Move previously failing test back
into place.
* sim/fr30/ldm0.cgs: New testcase.
* sim/fr30/ldm1.cgs: New testcase.
* sim/fr30/stm0.cgs: New testcase.
* sim/fr30/stm1.cgs: New testcase.
* configure: Regenerate.
* sim-main.h: Protect against multiple inclusion.
Don't include cgen-scache.h,cgen-cpu.h,cgen-trace.h,cpuall.h.
Done by cgen-sim.h now.
* tconfig.in (SIM_HAVE_MODEL): Delete, moved to cgen-types.h.
* cpuall.h: Regenerate.
* cpu.h,decode.c,sem-switch.c,sem.c: Regenerate.
* mloop.in (extract16): Make static inline again.
Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp.
(extract32): Ditto.
Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp.
(execute): Test ARGBUF_PROFILE_P before profiling.
Update calls to TRACE_INSN_INIT,TRACE_INSN_FINI.
* cpux.h,decodex.c,modelx.c,semx-switch.c: Regenerate.
* mloopx.in: Rewrite.
* cgen-sim.h: Simple header that includes others.
* sim-arange.c: New file.
* sim-arange.h: New file.
* sim-basics.h: Include it.
* Make-common.in (SIM_NEW_COMMON_OBJS): Add sim-arange.o.
(sim-arange.o): Add rule for.
* sim-cpu.h (sim_cpu_msg_prefix): Add prototype.
(sim_io_eprintf_cpu): Add prototype.
* sim-inline.h (HAVE_INLINE): Define if GNUC.
(INLINE2): New macro.
(EXTERN_INLINE): New macro.
* sim-module.c (sim_post_argv_init): Initialize cpu backlink
before calling module init fns.
* sim-profile.h (OPTION_PROFILE_*): Move into enum.
(profile_init): New function.
(profile_options): New option --profile-range.
(profile_option_handler): Handle --profile-range.
(profile_print_insn): Qualify address range specific section titles.
(profile_print_addr_ranges): New function.
(profile_info): Print address ranges if specified.
(profile_install): Set profile_init init fn.
* sim-profile.h (PROFILE_DATA): New member `range'.
* sim-trace.c (trace_init): New function.
(trace_options): New option --trace-range.
(trace_option_handler): Handle --trace-range.
(trace_install): Set trace_init init fn.
* sim-trace.h (TRACE_DATA): New member `range'.
* sim-utils.c (sim_cpu_msg_prefix): New function.
(sim_io_eprintf_cpu): New function.
* cgen-engine.h (PC_IN_TRACE_RANGE_P): New macro.
(PC_IN_PROFILE_RANGE_P): New macro.
* cgen-trace.c (trace_insn_init): Set current_insn to NULL.
(trace_insn_fini): New arg abuf. All callers updated.
Exit early if trace_insn not called. Check ARGBUF_PROFILE_P before
printing cycle counts.
* cgen-trace.h (trace_insn_fini): Update prototype.
(TRACE_RESULT_P): New macro.
(TRACE_INSN_INIT,TRACE_INSN_FINI): New arg abuf. All callers updated.
(TRACE_INSN): Check ARGBUF_TRACE_P.
(TRACE_EXTRACT,TRACE_RESULT): New arg abuf. All callers updated.
* cgen-types.h (SIM_INLINE): Delete.
(SIM_HAVE_MODEL,SIM_HAVE_ADDR_RANGE): Define.
* cgen-utils.c: Don't include cgen-engine.h
* genmloop.sh (@cpu@_fill_argbuf): New function.
(@cpu@_fill_argbuf_tp): New function.
(@cpu@_emit_before,@cpu@_emit_after): New functions.
(@cpu@_pbb_begin): Prefix cti_sc,insn_count with '_'.
(SET_CTI_VPC,SET_INSN_COUNT): Update.
(@cpu@_pbb_before): Check ARGBUF_PROFILE_P before calling
doing profiling. Update call to TRACE_INSN_INIT,TRACE_INSN_FINI.
(@cpu@_pbb_after): Check ARGBUF_PROFILE_P before calling
doing profiling. Update call to TRACE_INSN_FINI.