Commit graph

245 commits

Author SHA1 Message Date
David Edelsohn
27bc3f8ecb New file. 1996-11-20 09:28:40 +00:00
David Edelsohn
cee402dd99 * Makefile.in: Delete all stuff moved to ../common/Make-common.in.
(SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
	* configure.in: Simplify using macros in ../common/aclocal.m4.
	Call AC_CHECK_HEADERS(unistd.h).
	* configure: Regenerated.
	* config.in: New file.
	* interp.c: #include "callback.h".
	* simops.c: #include "config.h".  #include <unistd.h> if present.
1996-11-20 09:27:24 +00:00
Martin Hunt
849c575f97 Fri Nov 8 16:19:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v-sim.h (simops): Add flag is_long.
	(State): Add pc_changed.  Instructions which update the PC should
	use the JMP macro which sets this.
	(JMP): New macro.  Sets the PC and the pc_changed flag.

	* gencode.c (write_opcodes): Add is_long field.

	* interp.c (lookup_hash): If we blindly apply a short opcode's mask
	to a long opcode we could get a false match.  Check the opcode size.
	(hash): Add a size field to the hash table.
	(sim_open): Initialize size field in hash table.
	(sim_resume): Change to logic for setting the PC.  Used to increment the
	PC if it had not been changed.  This didn't allow single-instruction loops.
	Now checks the flag State.pc_changed.  Also now stops when ^C is received.
	(dmem_addr): Fix translation of data segments to unified memory.
	(sim_ctrl_c): New function.  When ^C is received, set stop_simulator flag.

	* simops.c: Changed all branch and jump instructions to use new JMP macro.
	(OP_20000000): Corrected trace information to show this is a ldi.l, not
	a ldi.s instruction.
1996-11-09 00:38:07 +00:00
Martin Hunt
5c839c675a Thu Oct 31 19:13:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* interp.c (sim_fetch_register, sim_store_register): Fix bug where
	updating the accumulators was overwriting other parts of the global
	State variable.
1996-11-01 03:15:44 +00:00
Michael Meissner
b30cdd3565 Fix -t option to work with memory mapping; Print PC in some error messages 1996-10-30 22:43:02 +00:00
Martin Hunt
c422ecc7a4 Tue Oct 29 12:13:52 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* interp.c (sim_size): Now allocates unified memory for imap segments
	0,1,2, and 127. Initializes imap0 and imap1 to 0x1000.  Initializes dmap to 0.
	(sim_write): Just call xfer_mem().
	(sim_read): Just call xfer_mem().
	(xfer_mem): New function. Does appropriate memory mapping and copies bytes.
	(dmem_addr): New function. Reads dmap register and translates data
 	addresses to local addresses.
	(pc_addr): New function. Reads imap register and computes local address
	corresponding to contents of the PC.
	(sim_resume): Change to use pc_addr().
	(sim_create_inferior): Change reinitialization code. Also reinitializes
	imap[01] and dmap.
	(sim_fetch_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
	(sim_store_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.

	* simops.c (MEMPTR): Redefine to use dmem_addr().
	(OP_5F00): Replace references to STate.imem with dmem_addr().

	* d10v-sim.h (State): Remove mem_min and mem_max. Add umem[128].
	(RB,SW,RW,SLW,RLW): Redefine to use dmem_addr().
	(IMAP0,IMAP1,DMAP,SET_IMAP,SET_IMAP1,SET_DMAP): Define.
1996-10-29 20:31:08 +00:00
Michael Meissner
aeb1f26ba8 Provide better statistics, particularly for doing VLIW work; Fix ldb to correctly sign extend 1996-10-22 19:49:37 +00:00
Martin Hunt
eca43eb1f5 Mon Oct 21 16:16:26 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* interp.c (sim_resume): Change the way single-stepping and exceptions
 	are handled so single-stepping works again.
1996-10-21 23:17:43 +00:00
Michael Meissner
55116079e2 Make simulated loads/stores faster on x86, AIX, and big endian hosts 1996-10-17 16:47:51 +00:00
Michael Meissner
d6fe5ca568 Make read/write memory functions inlined 1996-10-16 22:16:21 +00:00
Michael Meissner
5c2556697f Make read/write memory functions inlined 1996-10-16 22:14:23 +00:00
Michael Meissner
11ec4de669 Fix tracing of accumulators 1996-10-16 17:52:31 +00:00
Michael Meissner
57bc1a721a Better error messages when a program stops due to signal; support d10v getpid/kill 1996-10-15 15:44:10 +00:00
Michael Meissner
8918b3a72b Fix ld2w r2,@r2 so that r3 loads the proper value 1996-10-13 02:25:01 +00:00
Michael Meissner
a18cb10038 Fix tracing for st2w 1996-09-25 20:33:21 +00:00
Martin Hunt
c58a1ec2aa Fri Sep 20 15:36:45 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* interp.c (sim_create_inferior): Reinitialize State every time
	sim_create_inferior() is called.
1996-09-20 22:39:45 +00:00
Michael Meissner
c12f5c678e Make sure cmp{,eq,u}i use correct casts 1996-09-20 01:42:15 +00:00
Michael Meissner
addb61a5b2 Fix tracing info 1996-09-19 17:23:21 +00:00
Michael Meissner
f061ddf67d Make sure there is a trailing space after the instruction 1996-09-19 15:06:37 +00:00
Michael Meissner
891513ee79 Provide macros that can be overriden for the width of the PC & line number fields 1996-09-19 15:02:27 +00:00
Michael Meissner
74473ea10c Add dependencies on lib{bfd,iberity}.a 1996-09-19 14:31:01 +00:00
Michael Meissner
0535fa1aa0 Rename sim_bfd -> exec_bfd for gdb compatibility 1996-09-18 13:56:57 +00:00
Michael Meissner
a49a15ade8 Make exit/stop return correct exit value; Add line number tracing. 1996-09-18 13:23:31 +00:00
Michael Meissner
215ac9533c Fix brf0{t,f}.s <label> -> instruction not to execute instruction if branch succeeds 1996-09-15 03:46:52 +00:00
Michael Meissner
19d44375ff For unknown traps, print contents of registers and continue execution 1996-09-14 02:36:40 +00:00
Mark Alexander
65c0d7dee9 * simops.c (OP_5F00): Fix problems with system calls. 1996-09-12 19:52:40 +00:00
Michael Meissner
a57190924d Correct trap tracing information 1996-09-12 16:20:05 +00:00
Michael Meissner
5ceef1b54f fix typo 1996-09-11 22:56:25 +00:00
Michael Meissner
2254cd90a9 Addi needs to set the carry 1996-09-09 21:12:46 +00:00
Michael Meissner
308f64d3ac Fix ld2w tracing 1996-09-09 20:45:33 +00:00
Michael Meissner
60fc5b7270 Correct tracing of cpfg 1996-09-09 20:10:31 +00:00
Michael Meissner
293c76a376 Make ex{f,t}* tests agree with book 1996-09-09 18:24:18 +00:00
Michael Meissner
069398aaff Fix accumulator shifts 1996-09-09 17:30:36 +00:00
Martin Hunt
ea2155e858 Fri Sep 6 17:56:17 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* simops.c (OP_2600, OP_2601): Changed min and max comparisons
	to use signed register values.
1996-09-07 00:58:25 +00:00
Michael Meissner
9b86c7e2e2 Second pass at canadian cross 1996-09-04 19:11:53 +00:00
Michael Meissner
1eaaf3050e First cut at dealing with canadian crosses; make -t in debugger set d10v_debug if DEBUG 1996-09-04 18:50:13 +00:00
Michael Meissner
7eebfc6296 More debug support; Enable -t/-v to work correctly; Add --enable-sim-cflags configure switch 1996-09-04 17:42:51 +00:00
Michael Meissner
87178dbdf7 Enhance debug support 1996-09-04 15:41:43 +00:00
Mark Alexander
8719be26c4 * simops.c: Include correct syscall.h for d10v, not host's.
Fix #ifdef SYS_stat.
1996-09-04 11:51:06 +00:00
Michael Meissner
63a91cfb9d Portability fixes; re-add printf/putchar traps 1996-09-03 18:01:03 +00:00
Martin Hunt
d70b4d426b Wed Aug 28 17:33:19 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* Makefile.in, d10v_sim.h, interp.c: Fix byte-order problems.
1996-08-29 00:35:11 +00:00
Martin Hunt
166acb9f8f New file. 1996-08-28 18:09:06 +00:00
Martin Hunt
4f425a3203 Mon Aug 26 18:30:28 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v_sim.h (SEXT32): Added.
	* interp.c: Commented out printfs.
	* simops.c:  Fixed error in sb and st2w.
1996-08-27 01:32:48 +00:00
Martin Hunt
4c38885c86 Fri Aug 2 17:44:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v_sim.h, simops.c: Snapshot
1996-08-03 00:45:58 +00:00
Martin Hunt
2934d1c925 Thu Aug 1 17:05:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* ChangeLog, Makefile.in, configure, configure.in, d10v_sim.h,
	gencode.c, interp.c, simops.c: Created.
1996-08-02 00:23:31 +00:00