This patch fixes all occurences of left-shifting negative constants in C cod
which is undefined by the C standard.
gdb/testsuite/ChangeLog:
* lib/dwarf.exp (_note): Fix left shift of negative value.
* gdb.trace/trace-condition.exp: Likewise.
This patch fixes all occurences of left-shifting negative constants in C cod
which is undefined by the C standard.
gdb/ChangeLog:
* hppa-tdep.c (hppa_sign_extend, hppa_low_hppa_sign_extend)
(prologue_inst_adjust_sp, hppa_frame_cache): Fix left shift of negative
value.
* dwarf2read.c (read_subrange_type): Likewise.
This code tries to shift an integer 31 bits which triggers a werror:
gas/config/tc-microblaze.c:742:21: error: integer overflow in expression [-Werror=overflow]
e->X_add_number |= -(1 << 31);
Cast the 1 to offsetT to match X_add_number to fix things.
Hi,
I build GDB with -fsanitize=address, and run testsuite. In
gdb.base/callfuncs.exp, I see the following error,
p/c fun1()
=================================================================^M
==9601==ERROR: AddressSanitizer: stack-buffer-overflow on address 0x7fffee858530 at pc 0x6df079 bp 0x7fffee8583a0 sp 0x7fffee858398
WRITE of size 16 at 0x7fffee858530 thread T0
#0 0x6df078 in regcache_raw_read /home/yao/SourceCode/gnu/gdb/git/gdb/regcache.c:673
#1 0x6dfe1e in regcache_cooked_read /home/yao/SourceCode/gnu/gdb/git/gdb/regcache.c:751
#2 0x4696a3 in aarch64_extract_return_value /home/yao/SourceCode/gnu/gdb/git/gdb/aarch64-tdep.c:1708
#3 0x46ae57 in aarch64_return_value /home/yao/SourceCode/gnu/gdb/git/gdb/aarch64-tdep.c:1918
We are extracting return value from V registers (128 bit), but only
allocate X_REGISTER_SIZE-byte array, which isn't sufficient. This
patch changes the array to V_REGISTER_SIZE.
gdb:
2015-11-16 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_extract_return_value): Change array
buf's length to V_REGISTER_SIZE.
This patch changes the last argument of functions pass_in_x_or_stack,
pass_in_v_or_stack, pass_on_stack, and pass_in_x to type value *.
gdb:
2015-11-16 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (pass_in_x_or_stack): Change argument type
from bfd_byte * to value *. Caller updated.
(pass_in_x): Likewise.
(pass_in_v_or_stack): Likewise.
(pass_on_stack): Likewise.
Both aarch64_push_dummy_call and bfin_push_dummy_call only use args[i]
contents but then never write to them, so that we can use
value_contents instead.
gdb:
2015-11-16 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_push_dummy_call): Call value_contents instead
of value_contents_writeable.
* bfin-tdep.c (bfin_push_dummy_call): Likewise.
When I build GDB with -fsanitize=address, and run testsuite,
some gdb.base/*.exp test triggers the ERROR below,
=================================================================
==7646==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x603000242810 at pc 0x487844 bp 0x7fffe32e84e0 sp 0x7fffe32e84d8
READ of size 4 at 0x603000242810 thread T0
#0 0x487843 in push_stack_item /home/yao/SourceCode/gnu/gdb/git/gdb/arm-tdep.c:3405
#1 0x48998a in arm_push_dummy_call /home/yao/SourceCode/gnu/gdb/git/gdb/arm-tdep.c:3960
In that path, GDB passes value on stack, in an INT_REGISTER_SIZE slot,
but the value contents' length can be less than INT_REGISTER_SIZE, so
the contents will be accessed out of the bound. This patch adds an
array buf[INT_REGISTER_SIZE], and copy val to buf before writing them
to stack.
gdb:
2015-11-16 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_push_dummy_call): New array buf. Store regval
to buf. Pass buf instead of val to push_stack_item.
Now that all arches (for the most part) have moved over, move sim-stop.o,
sim-reason.o, and sim-reg.o to the common object list and out of all the
arch ports.
Now that we have access to the sim state everywhere, we can convert to
the common engine logic for overall processing. This frees us up from
tracking exception state ourselves.
The cr16 port has a lot of translation/offset logic baked into it, but
it all looks like copy & paste from the d10v port rather than something
the cr16 port wants.
By itself, this commit doesn't really change anything. It lays the
groundwork for using the cpu state in follow up commits, both for
engine state and for cpu state. Splitting things up this way so it
is easier to see how things have changed.
Now that we have access to the sim state everywhere, we can convert to
the common engine logic for overall processing. This frees us up from
tracking exception state ourselves.
By itself, this commit doesn't really change anything. It lays the
groundwork for using the cpu state in follow up commits, both for
engine state and for cpu state. Splitting things up this way so it
is easier to see how things have changed.
This avoids using global variables to hold the cpu state so we can
better integrate with the sim common code.
There's also a minor fix here where we move the pc register back into
the state that is accessible by the asints array. When it was pulled
out previously, the reg store/fetch functions broke, but no one really
noticed as the mcore gdb port was dropped a while back.
This is not entirely useful as mcore doesn't (yet) store its register
state in the cpu state, but it does allow for switching to the common
code for these functions.
Other than the nice advantage of all sims having to declare one fewer
common function, this also fixes leakage in pretty much every sim.
Many were not freeing any resources, and a few were inconsistent as
to the ones they did. Now we have a single module that takes care of
all the logic for us.
Most of the non-cgen based ones could be deleted outright. The cgen
ones required adding a callback to the arch-specific cleanup func.
The few that still have close callbacks are to manage their internal
state.
We do not convert erc32, m32c, ppc, rl78, or rx as they do not use
the common sim core.
Sometimes in tests, we need supplemental files like linker scripts or
board helper files. There's no way to set those flags in the tests
currently and relative paths don't work (breaks out of tree builds).
Update the main option parser to replace some strings on the fly. Now
tests can do things like:
Long term we'll want to switch the framework to use the dejagnu helpers
like dg-xxx that gcc & gdb utilize. But that'll require more rework.
This patch teaches GDB to support gnu vector in inferior calls. As a
result, fails in gdb.base/gnu_vector.exp are fixed. The calling
convention of gnu vector isn't documented in the AAPCS, because it
is the GCC extension. I checked the gcc/config/arm/arm.c, understand
how GCC pass arguments and return values, and do the same in GDB side.
The patch is tested with both hard float and soft float on arm-linux.
gdb:
2015-11-13 Yao Qi <yao.qi@linaro.org>
PR tdep/19051
* arm-tdep.c (arm_type_align): Return the right alignment
value for vector.
(arm_vfp_cprc_sub_candidate): Return true for 64-bit and
128-bit vector types.
(arm_return_in_memory): Handel vector type.
Current arm_return_in_memory isn't friendly to adding new things in it.
Moreover, a lot of stuff are about APCS, which is not used nowadays (AAPCS
is being used). This patch is to refactor arm_return_in_memory, so that
some code can be shared for both APCS and AAPCS at the beginning of
arm_return_in_memory, and then each ABI (APCS and AAPCS) are processed
separately.
gdb:
2015-11-13 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_return_in_memory): Rewrite it.
(arm_return_value): Call arm_return_in_memory for
TYPE_CODE_COMPLEX.
This patch removes the leftover of the d10v stuff in the testsuite
directory. The d10v port was removed in GDB 6.7, but I happen to see
that there are still some leftovers about d10v in testsuite.
gdb/testsuite:
2015-11-13 Yao Qi <yao.qi@linaro.org>
* gdb.base/call-sc.exp (test_scalar_returns): Remove the
comments about d10v.
(test_scalar_returns): Likewise.
* gdb.base/d10v.ld: Remove.
* gdb.base/overlays.exp: Remove the target triplet checking for
d10v-*-*.
* gdb.base/structs.exp (test_struct_returns): Remove the
comments about d10v.
(test_struct_calls): Likewise.
gdb.base/gnu_vector.c printf the vector and gdb.base/gnu_vector.exp
expects the output by gdb_test_multiple. Nowadays, the test doesn't
expect the output from inferior_spawn_id, which is wrong. Even we
change the test to expect from inferior_spawn_id for the inferior
output, it is still possible the inferior exit before tcl/expect gets
the inferior output. We see this fail on both s390x-linux and
ppc-linux on buildbot,
FAIL: gdb.base/gnu_vector.exp: verify vector return value (the program exited)
https://sourceware.org/ml/gdb-testers/2015-q4/msg04922.htmlhttps://sourceware.org/ml/gdb-testers/2015-q4/msg04952.html
In order to address these two shortcomings above in gnu_vector.exp,
this patch rewrites the test a little bit. Get rid of checking the
inferior output, and instead checking them by printing them. In this
way, the test can also be run on the target without inferior io
(gdb,noinferiorio is set in the board file).
gdb/testsuite:
2015-11-13 Yao Qi <yao.qi@linaro.org>
* gdb.base/gnu_vector.exp: Check the return value by "p res".
* gdb.base/gnu_vector.c: Don't include stdio.h.
(main): Don't print res and call add_some_intvecs.
This patch adds support to the AArch64 back-end for the Cortex-A35
processor, as recently announced by ARM. The ARM Cortex-A35 provides
full support for the ARMv8-A architecture, including the CRC extension,
with optional Advanced-SIMD and Floating-Point support. We therefore set
feature flags for this CPU to AARCH64_ARCH_V8 and AARCH64_FEATURE_CRC, in
the same fashion as Cortex-A53 and Cortex-A57.
Tested in a cross environment for AArch64 with no issues.
2015-11-11 Matthew Wahab <matthew.wahab@arm.com>
PR gas/19217
* config/tc-arm.c (move_or_literal_pool): Remove redundant feature
check. Fix some code formatting. Drop use of MOVT. Add some
comments.
2015-11-11 Matthew Wahab <matthew.wahab@arm.com>
PR gas/19217
* gas/arm/thumb2_ldr_immediate_armv6t2.d: Update expected output.
