Commit graph

7 commits

Author SHA1 Message Date
Nick Clifton
cd123cb70c Switch sources over to use the GPL version 3 2007-07-03 14:26:43 +00:00
Alan Modra
3db64b0092 bfd/
Many files: Include sysdep.h before bfd.h.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
binutils/
	* bucumm.h: Split off host dependencies to..
	* sysdep.h: ..here.
	Many files: Include sysdep.h.  Remove duplicate headers and reorder.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
ld/
	Many files: Include sysdep.h first.  Remove duplicate headers.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
opcodes/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* ns32k-dis.c: Include sysdep.h first.
2007-04-26 14:47:00 +00:00
Nick Clifton
3e11053365 Update the address and phone number of the FSF organization in the GPL notices 2005-05-04 15:53:43 +00:00
Nick Clifton
53e09e0aaf Update the FSF address in the copyright/GPL notice 2005-05-04 07:19:45 +00:00
Alan Modra
b34976b65a s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. Simplify
comparisons of bfd_boolean vars with TRUE/FALSE.  Formatting.
2002-11-30 08:39:46 +00:00
Jason Eckhardt
9d75133528 2000-07-22 Jason Eckhardt <jle@cygnus.com>
* include/opcode/i860.h (btne, bte, bla): Changed these opcodes
	to use sbroff ('r') instead of split16 ('s').
	(J, K, L, M): New operand types for 16-bit aligned fields.
	(ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
	use I, J, K, L, M instead of just I.
	(T, U): New operand types for split 16-bit aligned fields.
	(st.x): Changed these opcodes to use S, T, U instead of just S.
	(andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
	exist on the i860.
	(pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
	(pfeq.ss, pfeq.dd): New opcodes.
	(st.s): Fixed incorrect mask bits.
	(fmlow): Fixed incorrect mask bits.
	(fzchkl, pfzchkl): Fixed incorrect mask bits.
	(faddz, pfaddz): Fixed incorrect mask bits.
	(form, pform): Fixed incorrect mask bits.
	(pfld.l): Fixed incorrect mask bits.
	(fst.q): Fixed incorrect mask bits.
	(all floating point opcodes): Fixed incorrect mask bits for
	handling of dual bit.

	* include/elf/i860.h: New file.
	(elf_i860_reloc_type): Defined ELF32 i860 relocations.

	* bfd/cpu-i860.c: Added comments.

	* bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to
	bfd_elf32_i860_little_vec.
	(TARGET_LITTLE_NAME): Defined to "elf32-i860-little".
	(ELF_MAXPAGESIZE): Changed to 4096.

	* bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of
	new target.
	(bfd_target_vector): Added bfd_elf32_i860_little_vec.

	* bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added
	config for little endian elf32 i860.
	(targ_defvec): Define for the new config above
	as "bfd_elf32_i860_little_vec".
	(targ_selvecs): Define for the new config above
	as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec"

	* bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition
	of new target vec.

	* bfd/configure: Regenerated.

	* opcodes/i860-dis.c: New file.
	(print_insn_i860): New function.
	(print_br_address): New function.
	(sign_extend): New function.
	(BITWISE_OP): New macro.
	(I860_REG_PREFIX): New macro.
	(grnames, frnames, crnames): New structures.

	* opcodes/disassemble.c (ARCH_i860): Define.
	(disassembler): Add check for bfd_arch_i860 to set disassemble
	function to print_insn_i860.

	* include/dis-asm.h (print_insn_i860): Add prototype.

	* opcodes/Makefile.in (CFILES): Added i860-dis.c.
	(ALL_MACHINES): Added i860-dis.lo.
	(i860-dis.lo): New dependences.

	* opcodes/configure.in: New bits for bfd_i860_arch.

	* opcodes/configure: Regenerated.
2000-07-28 21:10:20 +00:00
Richard Henderson
252b5132c7 19990502 sourceware import 1999-05-03 07:29:11 +00:00