Fix occurrences of left-shifting negative constants in C code.
sim/arm/ChangeLog:
* thumbemu.c (handle_T2_insn): Fix left shift of negative value.
* armemu.c (handle_v6_insn): Likewise.
sim/avr/ChangeLog:
* interp.c (sign_ext): Fix left shift of negative value.
sim/mips/ChangeLog:
* micromips.igen (process_isa_mode): Fix left shift of negative
value.
sim/msp430/ChangeLog:
* msp430-sim.c (get_op, put_op): Fix left shift of negative value.
sim/v850/ChangeLog:
* simops.c (v850_bins): Fix left shift of negative value.
* msp430-sim.c (sim_open): Check for needed memory at address
0x500 not 0x200.
(get_op): Add support for F5 hardware multiply addresses.
(put_op): Likewise.
Now that all arches (for the most part) have moved over, move sim-stop.o,
sim-reason.o, and sim-reg.o to the common object list and out of all the
arch ports.
Other than the nice advantage of all sims having to declare one fewer
common function, this also fixes leakage in pretty much every sim.
Many were not freeing any resources, and a few were inconsistent as
to the ones they did. Now we have a single module that takes care of
all the logic for us.
Most of the non-cgen based ones could be deleted outright. The cgen
ones required adding a callback to the arch-specific cleanup func.
The few that still have close callbacks are to manage their internal
state.
We do not convert erc32, m32c, ppc, rl78, or rx as they do not use
the common sim core.
The bfin/msp430 ports already had trace logic set up for reading/writing
cpu registers, albeit using different unrelated levels (core & vpu). Add
a proper register class for these and for other ports.
Many ports have the same sim syscall logic, so add some helpers to handle
all the common details. The arches still have to deal with the unpacking
and packing of the syscall arguments, but the rest of the sim<->callback
glue is now shared.
Since every target typedefs this the same way, move it to the common code.
We have to leave Blackfin behind here for now because of inter-dependencies
on types and headers: sim-base.h includes sim-model.h which needs types in
machs.h which needs types in bfim-sim.h which needs SIM_CPU.
Almost every target defines sim_cia the same way -- either using the
address_word type directly, or a type of equivalent size. The only
odd one out is sh64 (who has 32bit address_word and 64bit cia), and
even that case doesn't seem to make sense. We'll put off clean up
though of sh64 and at least set up a sensible default for everyone.
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state. This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.
It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
Now that all the targets are utilizing CPU_PC_{FETCH,STORE}, and the
cpu state is multicore, and the STATE_CPU defines match, we can move
it all to the common code.
Rather than manually include tconfig.h when we think we'll need it (which
is error prone as it can define symbols we expect from config.h), have it
be included directly by config.h. Since we know we have to include that
header everywhere already, this will make sure tconfig.h isn't missed.
It should also be fine as tconfig.h is supposed to be simple and only set
up a few core defines for the target.
This allows us to stop symlinking it in place all the time and just use
it straight out of the respective source directory.
We want people to stop using the run.c frontend, but it's hard to notice
when it's still set as the default. Lets flip things so nrun.c is the
default, and users of run.c will get an error by default. We turn that
error into a warning for existing sims so we don't break them -- this is
mostly meant for people starting new ports.
* msp430-sim.c (sim_open): Allocate memory regions matching those
declared in the libgloss/msp430 linker scripts.
Allow sim_load_file to fail.
(get_op): Test the correct address bit when checking for out of
range addresses.
Include the address in the error message when an illegal access to
the hardware multiplier is detected.
(put_op): Test the correct address bit when checking for out of
range addresses.
Directories that don't use libtool need to add -ldl (on most *nix
hosts) to provide dlopen for libbfd.
config/
* plugins.m4 (AC_PLUGINS): If plugins are enabled, add -ldl to
LIBS via AC_SEARCH_LIBS.
gdb/
* acinclude.m4 (GDB_AC_CHECK_BFD): Don't add -ldl.
* config.in: Regenerate.
sim/ppc/
* configure.ac: Invoke AC_PLUGINS.
* config.in: Regenerate.
and regen lots of configure files.
* msp430-sim.c: Move static hardware multiply support variables
from here...
* msp430-sim.h (msp430_cpu_state): ... into here ...
* msp430-sim.c (get_op, put_op): ... and update references to use
the msp430_cpu_state structure.
* msp430-sim.c (get_op): Handle reads of low result register when
in MAC mode.
(put_op): Copy MAC result into result words.
Handle writes to the low result register.
* msp430-sim.c (sim_open): Do not allocate memory over the
hardware multiply registers.
(get_op): Add support for reads from the hardware multiply
registers.
(put_op): Add support for writes to the hardware multiply
registers.
(msp430_step_once): Add support for the RETI instruction used by
the CPUX architecture.
This fix is simple:
msp430-sim.c: In function 'maybe_perform_syscall':
msp430-sim.c:898:10: warning: format '%d' expects argument of type 'int',
but argument 5 has type 'long int' [-Wformat]
This one we change to use casts like everyone else does in the code base:
msp430-sim.c: In function 'msp430_step_once':
msp430-sim.c:985:7: warning: passing argument 3 of 'init_disassemble_info'
from incompatible pointer type [enabled by default]
include/dis-asm.h:368:13: note: expected 'fprintf_ftype' but argument is
of type 'int (*)(struct FILE * __restrict__, const char * __restrict__)'
