(CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
(CGEN_INSN_BYTES): Renamed from cgen_insn_t.
(CGEN_INSN_BYTES_PTR): New typedef.
(CGEN_EXTRACT_INFO): New typedef.
(cgen_insert_fn,cgen_extract_fn): Update.
(cgen_opcode_table): New member `insn_endian'.
(assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
(insert_operand,extract_operand): Update.
(cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
opcode table as something that is "opened/closed".
* cgen.h (CGEN_OPCODE_DESC): New type.
(all fns): New first arg of opcode table descriptor.
(cgen_set_parse_operand_fn): Add prototype.
(cgen_current_machine,cgen_current_endian): Delete.
(CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
parse_operand_fn,asm_hash_table,asm_hash_table_entries,
dis_hash_table,dis_hash_table_entries.
(opcode_open,opcode_close): Add prototypes.
* cgen.h (cgen_insn): New element `cdx'.
* i386.h (i386_optab): Add general form of aad and aam. Add ud2a
and ud2b.
(i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
those that happen to be implemented on pentiums.
* i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
with Size16|IgnoreSize or Size32|IgnoreSize.
* i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
(REPE): Rename to REPE_PREFIX_OPCODE.
(i386_regtab_end): Remove.
(i386_prefixtab, i386_prefixtab_end): Remove.
(i386_optab): Use NULL as sentinel rather than "" to suit rewrite
of md_begin.
(MAX_OPCODE_SIZE): Define.
(i386_optab_end): Remove.
(sl_Suf): Define.
(sl_FP): Use sl_Suf.
* i386.h (i386_optab): Allow 16 bit displacement for `mov
mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
data32, dword, and adword prefixes.
(i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
regs.
* i386.h (i386_regtab): Remove BaseIndex modifier from esp.
* i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
register operands, because this is a common idiom. Flag them with
a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
fdivrp because gcc erroneously generates them. Also flag with a
warning.
* i386.h: Add suffix modifiers to most insns, and tighter operand
checks in some cases. Fix a number of UnixWare compatibility
issues with float insns. Merge some floating point opcodes, using
new FloatMF modifier.
(WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
consistency.
* i386.h: Change occurence of ShortformW to W|ShortForm. Add
IgnoreDataSize where appropriate.
(cgen_asm_finish_insn): Update prototype.
(cgen_insn): New members num, data.
(CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
dis_hash, dis_hash_table_size moved to ...
(CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
All uses updated. New members asm_hash_p, dis_hash_p.
(CGEN_MINSN_EXPANSION): New struct.
(cgen_expand_macro_insn): Declare.
(cgen_macro_insn_count): Declare.
(get_insn_operands): Update prototype.
(lookup_get_insn_operands): Declare.
* i386.h: Remove NoModrm flag from all insns: it's never checked.
Add IsString flag to string instructions.
(IS_STRING): Don't define.
(LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
(ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
(SS_PREFIX_OPCODE): Define.
* i386.h (i386_optab): Change second operand constraint of `mov
sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
allow legal instructions such as `movl %gs,%esi'
(CGEN_HW_ENTRY): New member `type'.
(hw_list): Delete decl.
(enum cgen_mode): Declare.
(CGEN_OPERAND): New member `hw'.
(enum cgen_operand_instance_type): Declare.
(CGEN_OPERAND_INSTANCE): New type.
(CGEN_INSN): New member `operands'.
(CGEN_OPCODE_DATA): Make hw_list const.
(get_insn_operands,lookup_insn): Add prototypes for.
