branch with an instruction that uses $at, in case the branch is
later expanded.
(macro): If EMBEDDED_PIC, case M_JAL_A may use $at.
(md_pcrel_from): If not OBJ_AOUT, return 4 for an undefined symbol
to make it pcrel_offset.
(tc_gen_reloc): If not OBJ_AOUT, set the reloc addend to
reloc->address; another gruesome hack to get gas reloc handling to
do the right thing.
use a five instruction sequence for funtion calls which are out of
range of the bal instruction.
* libecoff.h (struct ecoff_section_tdata): Define.
(ecoff_section_data): Define.
(ecoff_bfd_relax_section): Don't define.
* ecoff.c (ecoff_final_link_debug_accumulate): Don't read or free
the debugging information if it has already been read.
(ecoff_indirect_link_order): Handle _cooked_size being different
from _raw_size. Don't reread the contents or the relocs if they
have already been read in.
* coff-mips.c (mips_howto_table): Change bitsize of PCREL16 from
18 to 16.
(PCREL16_EXPANSION_ADJUSTMENT): Define.
(mips_relocate_refhi): Take adjust argument.
(mips_relocate_section): Handle reloc offsets stored in section
used_by_bfd field. Call mips_relax_pcrel16 to handle details of
expanding an out of range PCREL16. Keep trace of adjustments
required by expansions. Set s and unset h when converting a reloc
from undefined to section. Change handling of PC relative relocs:
if against a section, they are correct in the object file, if
against an external symbol they are pcrel_offset.
(mips_relax_section): New function.
(mips_relax_pcrel16): New function.
(ecoff_bfd_relax_section): Define.
* coff-alpha.c (ecoff_bfd_relax_section): Define.
* ecofflink.c (bfd_ecoff_debug_accumulate): Handle adjustments
built by mips_relax_section when writing out addresses.
* elf32-mips.c (mips_elf_read_ecoff_info): Clear adjust field.
(REGISTER_NAMES): Add entries for "right-half" of FP registers.
(REGISTER_RAW_SIZE, MAX_REGISTER_RAW_SIZE): Do not treat FP regs
differently. All registers are four bytes.
(REGISTER_BYTES, REGISTER_BYTE): Simplify now that all registers are
the same size.
(REGISTER_VIRTUAL_TYPE): Use builtin_type_float for all FP regs.
* hppa-tdep.c (pa_print_fp_reg): Update to print even numbered FP
registers as both single and double values (fetching 2nd 32bit half
as necessary). Annotate each register printed with its precision.
(T12): New macro.
(emit_insn): New function.
(md_assemble): Call it.
(alpha_force_relocation): Handle BFD_RELOC_26, for call_pal instructions.
(lituse_pending): New variable. Set by anything that generates a LITERAL
reloc, cleared by anything that generates a LITUSE reloc, tested by code that
might want to emit a LITUSE reloc.
(emit_unaligned_io): New function. Currently calls md_assemble, but it should
eventually be converted to generate the insn itself and call emit_insn directly.
(emit_load_unal, emit_store_unal, emit_byte_manip_r, emit_extract_r,
emit_insert_r, emit_mask_r, emit_sign_extend, emit_bis_r): Likewise.
(alpha_ip, case 'I'): Handle with BFD_RELOC_23.
(alpha_ip, label get_macro): Don't emit the final instruction if the opcode is
zero.
(alpha_ip, case 'B', subcase 'd'): New case, for subword and unaligned memory
access macros.
(md_apply_fix): Handle BFD_RELOC_26. Generate an error message if the value
can't be resolved.
real to true for lang_input_file_is_marker_enum. Clear the_bfd.
(lang_add_input_file): Pass true to new_afile for add_to_list.
(lookup_name): Remove force_load argument. Changed all callers.
Pass false to new_afile for add_to_list. Split loading of symbols
out into separate function.
(load_symbols): New function split out of lookup_name. Don't load
the symbols if they are already loaded.
(open_input_bfds): For lang_input_statement_enum call load_symbols
rather than lookup_name.
(lang_process): Pass abs_output_section rather than NULL to
lang_size_sections.
(lang_startup): Set real field of first_file to true.
<jrs@world.std.com>.
(symbol_completion_function): Don't declare rl_point and
rl_line_buffer; they are now declared in readline.h.
(show_commands): Don't declare history_base; it is declared in
history.h.
* command.c (lookup_cmd): Don't delete trailing whitespace.
* mpw-config.in: New file, MPW configuration fragment.
* mpw-make.in: New file, MPW makefile fragment.
* config/m68k/xm-mpw.h: New file, MPW host definitions.
* ser-mac.c: New file, Mac serial interface.
* targets.c (_bfd_relax_section): Take boolean *again argument
rather than asymbol list.
* bfd.c (bfd_relax_section): Change name of fourth argument from
symbols to again.
* reloc.c (bfd_generic_relax_section): Take boolean *again
argument rather than asymbol list. Always return true.
* bout.c: Include genlink.h.
(aligncode, perform_slip): Declare.
(perform_slip): Take BFD argument rather than asymbol list.
Changed all callers. Get the symbols from the BFD. Change the
hash table entry value as well as the symbol value.
(abs32code): Take BFD argument rather than asymbol list. Changed
all callers.
(aligncode): Likewise.
(b_out_relax_section): Take boolean *again argument rather than
asymbol list. Only return false if an error occurred. Set *again
to false. Get symbols from BFD.
* reloc16.c: Include genlink.h.
(bfd_perform_slip): Take BFD argument rather than asymbol list.
Get the symbols from the BFD. Change the hash table entry value
as well as the symbol value.
(bfd_coff_reloc16_relax_section): Take boolean *again argument
rather than asymbol list. Only return false if an error occurred.
Set *again to false. Get symbols from BFD.
* coffcode.h (bfd_coff_backend_data): Change
_bfd_coff_reloc16_estimate to take BFD argument rather than
asymbol list.
(bfd_coff_reloc16_estimate): Corresponding change.
(dummy_reloc16_estimate): Corresponding change.
* libcoff-in.h (bfd_coff_reloc16_relax_section): Change
declaration to take boolean * rather than asymbol list.
(bfd_perform_slip): Change declaration to take BFD rather than
asymbol list.
* coff-h8300.c (h300_reloc16_estimate): Take BFD argument rather
than asymbol list. Changed calls to bfd_perform_slip.
* bfd-in2.h: Rebuilt.
* libbfd.h: Rebuilt.
* libcoff.h: Rebuilt.
* Makefile.in: Rebuilt dependencies.
for the structure's type. All callers changed.
* valops.c (call_function_by_hand): Check REG_STRUCT_HAS_ADDR
for each structure argument rather than assuming it's either
true or false for all structure arguments.
* config/pa/tm-hppa.h (REG_STRUCT_HAS_ADDR): Depend only
on the length structure passed, not the compiler used.
* config/sparc/tm-sparc.h (REG_STRUCT_HAS_ADDR): Accept additional
argument for the structure's type.
(mips_pic): Change from int to enum mips_pic_level. Change all
uses (0 becomes NO_PIC, 2 becomes SVR4_PIC).
(load_address): Handle EMBEDDED_PIC.
(macro): Handle EMBEDDED_PIC in all PIC cases.
(md_parse_option): Accept -membedded-pic to use EMBEDDED_PIC. If
OBJ_ELF, accept -KPIC and -call_shared to use SVR4_PIC and accept
-non_shared to use NO_PIC (this is how the Irix 5 assembler
works). Do not permit -G with SVR4_PIC.
(s_abicalls): Warn if -G was used, and force -G 0.
(tc_gen_reloc): Set reloc->addend to 0 for a PC relative reloc for
anything but a.out, not just for ELF. For ECOFF, don't generate a
BFD_RELOC_16_PCREL_S2 reloc unless using EMBEDDED_PIC.
