Commit graph

310 commits

Author SHA1 Message Date
Nick Clifton
202e23565d * configure.ac (ia64*-*-*vms*): Add support for ld.
* configure: Regenerate.

	* scripttempl/ia64vms.sc: New file.
	* emultempl/vms.em (_before_parse): Support for ia64.
	(elf64-ia64-vms): New fragment for ia64.
	* emulparams/elf64_ia64_vms.sh: New file.
	* configure.tgt (ia64-*-*vms*): Add.
	* Makefile.am (ALL_64_EMULATION_SOURCES): Add eelf64_ia64_vms.c
	(eelf64_ia64_vms.c): New rule.
	* Makefile.in: Regenerate.

	* elflink.c (elf_link_output_extsym): Add a guard.
	(bfd_elf_final_link): Remove assertion.
	(bfd_elf_final_link): Add a guard.
	* elfnn-ia64.c (INCLUDE_IA64_VMS): Removed.
	(elfNN_vms_section_from_shdr, elfNN_vms_object_p)
	(elfNN_vms_post_process_headers, elfNN_vms_section_processing)
	(elfNN_vms_final_write_processing, elfNN_vms_close_and_cleanup):
	Remove.
	(elfNN-ia64-vms target): Move to ...
	* elf64-ia64-vms.c: New file.
	* configure.in (bfd_elf64_ia64_vms_vec): Add elf64-ia64-vms.lo
	* Makefile.am (BFD64_BACKENDS): Add elf64-ia64-vms.lo.
	(BFD64_BACKENDS_CFILES): Ad elf64-ia64-vms.c.
	* configure: Regenerate.
	* Makefile.in: Regenerate.
2012-04-12 07:35:07 +00:00
Roland McGrath
5a68afcf73 bfd/
2012-04-03  Roland McGrath  <mcgrathr@google.com>

	* elf-nacl.c: New file.
	* elf-nacl.h: New file.
	* elf32-i386.c (elf_backend_modify_segment_map): Define for
	bfd_elf32_i386_nacl_vec.
	(elf_backend_modify_program_headers): Likewise.
	* elf64-x86-64.c (elf_backend_modify_segment_map): Define for
	bfd_elf64_x86_64_nacl_vec and bfd_elf32_x86_64_nacl_vec.
	(elf_backend_modify_program_headers): Likewise.
	* Makefile.am (BFD32_BACKENDS, BFD64_BACKENDS): Add elf-nacl.lo here.
	(BFD32_BACKENDS_CFILES, BFD64_BACKENDS_CFILES): Add elf-nacl.c here.
	* Makefile.in: Regenerated.
	* configure.in (bfd_elf64_x86_64_nacl_vec): Add elf-nacl.o to tb here.
	(bfd_elf32_x86_64_nacl_vec): Likewise.
	(bfd_elf64_x86_64_vec, bfd_elf32_x86_64_vec): Likewise.
	(bfd_elf64_x86_64_freebsd_vec, bfd_elf64_x86_64_sol2_vec): Likewise.
	(bfd_elf64_l1om_vec, bfd_elf64_l1om_freebsd_vec): Likewise.
	(bfd_elf64_k1om_vec, bfd_elf64_k1om_freebsd_vec): Likewise.
	(bfd_elf32_i386_nacl_vec): Likewise.
	(bfd_elf32_i386_sol2_vec, bfd_elf32_i386_freebsd_vec): Likewise.
	(bfd_elf32_i386_vxworks_vec, bfd_elf32_i386_vec): Likewise.
	* configure: Regenerated.

binutils/testsuite/
2012-04-03  Roland McGrath  <mcgrathr@google.com>

	* lib/binutils-common.exp (is_elf_format): Consider *-*-nacl* to
	be ELF too.

	* binutils-all/elfedit-4.d: Add "#as: --64" option.

	* binutils-all/i386/i386.exp: Accept nacl targets too.
	* binutils-all/x86-64/x86-64.exp: Likewise.

gas/testsuite/
2012-04-03  Roland McGrath  <mcgrathr@google.com>

	* gas/i386/k1om.d: Add not-target match for *-*-nacl*.
	* gas/i386/l1om.d: Likewise.

ld/
2012-04-03  Roland McGrath  <mcgrathr@google.com>

	* configure.tgt (i[3-7]86-*-nacl*, x86_64-*-nacl*): Handle them.
	* emulparams/elf_nacl.sh: New file.
	* emulparams/elf_i386_nacl.sh: New file.
	* emulparams/elf32_x86_64_nacl.sh: New file.
	* emulparams/elf_x86_64_nacl.sh: New file.
	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf_i386_nacl.c here.
	(ALL_64_EMULATION_SOURCES): Add eelf32_x86_64_nacl.c and
	eelf_x86_64_nacl.c here.
	(eelf_i386_nacl.c, eelf32_x86_64_nacl.c, eelf_x86_64_nacl.c):
	New targets.
	* Makefile.in: Regenerated.

	* scripttempl/elf.sc: Handle SEPARATE_CODE cases.

ld/testsuite/
2012-04-03  Roland McGrath  <mcgrathr@google.com>

	* ld-x86-64/ilp32-4-nacl.d: New file.
	* ld-x86-64/x86-64.exp: Run it.

	* ld-discard/discard.exp: Accept nacl targets too.
	* ld-elf/binutils.exp: Likewise.
	* ld-elf/comm-data.exp: Likewise.
	* ld-elf/elf.exp: Likewise.
	* ld-elf/tls_common.exp: Likewise.
	* ld-elfvers/vers.exp: Likewise.
	* ld-elfvsb/elfvsb.exp: Likewise.
	* ld-elfweak/elfweak.exp: Likewise.
	* ld-gc/gc.exp: Likewise.
	* ld-ifunc/binutils.exp: Likewise.
	* ld-ifunc/ifunc.exp: Likewise.
	* ld-linkonce/linkonce.exp:Likewise.
	* ld-pie/pie.exp: Likewise.
	* ld-shared/shared.exp: Likewise.
	* ld-undefined/weak-undef.exp: Likewise.
	* ld-unique/unique.exp: Likewise.
	* ld-x86-64/dwarfreloc.exp: Likewise.
	* ld-x86-64/line.exp: Likewise.

	* lib/ld-lib.exp (slurp_options): Support global array
	options_regsub to apply substitutions to the contents
	of options lines read from the file.
	* ld-i386/emit-relocs.d: Renamed to ...
	* ld-i386/emit-relocs.rd: ... this.
	* ld-i386/i386.exp: Accept nacl targets too.
	For them, use options_regsub to replace elf_i386 with
	elf_i386_nacl in run_dump_test cases; apply the same
	substitution in $i386tests; replace foo.rd expectations
	files with foo-nacl.rd in $i386tests.
	(i386tests): Change emit-relocs.d to emit-relocs.rd here.
	* ld-i386/emit-relocs-nacl.rd: New file.
	* ld-i386/plt-nacl.pd: New file.
	* ld-i386/plt-pic-nacl.pd: New file.
	* ld-i386/tlsbin-nacl.rd: New file.
	* ld-i386/tlsbindesc-nacl.rd: New file.
	* ld-i386/tlsdesc-nacl.rd: New file.
	* ld-i386/tlsgdesc-nacl.rd: New file.
	* ld-i386/tlsnopic-nacl.rd: New file.
	* ld-i386/tlspic-nacl.rd: New file.
	* ld-x86-64/x86-64.exp: Accept nacl targets too.
	For them, use options_regsub to replace elf_x86_64 with
	elf_x86_64_nacl in run_dump_test cases; apply the same
	substitution in $x86_64tests; replace foo.rd expectations
	files with foo-nacl.rd in $x86_64tests.
	Add explicit -melf_x86_64 to ld options in tests that need it,
	in case the default emulation is x32 (as it is for x86_64-nacl).
	* ld/testsuite/ld-x86-64/plt-nacl.pd: New file.
	* ld/testsuite/ld-x86-64/split-by-file-nacl.rd: New file.
	* ld/testsuite/ld-x86-64/tlsbin-nacl.rd: New file.
	* ld/testsuite/ld-x86-64/tlsbindesc-nacl.rd: New file.
	* ld/testsuite/ld-x86-64/tlsdesc-nacl.pd: New file.
	* ld/testsuite/ld-x86-64/tlsdesc-nacl.rd: New file.
	* ld/testsuite/ld-x86-64/tlsgdesc-nacl.rd: New file.
	* ld/testsuite/ld-x86-64/tlspic-nacl.rd: New file.

	* ld-i386/hidden2.d: Loosen regexps to match any file format variant,
	and not to depend on exact addresses, displacements, etc. where
	they are irrelevant.
	* ld-i386/pcrel16.d: Likewise.
	* ld-i386/pcrel16abs.d: Likewise.
	* ld-i386/pr12718.d: Likewise.
	* ld-i386/pr12921.d: Likewise.
	* ld-i386/reloc.d: Likewise.
	* ld-i386/tlsbin.dd: Likewise.
	* ld-i386/tlsbin.sd: Likewise.
	* ld-i386/tlsbin.td: Likewise.
	* ld-i386/tlsbindesc.dd: Likewise.
	* ld-i386/tlsbindesc.sd: Likewise.
	* ld-i386/tlsbindesc.td: Likewise.
	* ld-i386/tlsdesc.dd: Likewise.
	* ld-i386/tlsdesc.sd: Likewise.
	* ld-i386/tlsdesc.td: Likewise.
	* ld-i386/tlsg.sd: Likewise.
	* ld-i386/tlsgdesc.dd: Likewise.
	* ld-i386/tlsindntpoff.dd: Likewise.
	* ld-i386/tlsnopic.dd: Likewise.
	* ld-i386/tlsnopic.sd: Likewise.
	* ld-i386/tlspic.dd: Likewise.
	* ld-i386/tlspic.sd: Likewise.
	* ld-i386/tlspic.td: Likewise.
	* ld-i386/tlspie2.d: Likewise.
	* ld-x86-64/hidden2.d: Likewise.
	* ld-x86-64/pcrel16.d: Likewise.
	* ld-x86-64/pr12718.d: Likewise.
	* ld-x86-64/pr12921.d: Likewise.
	* ld-x86-64/protected3.d: Likewise.
	* ld-x86-64/tlsbin.dd: Likewise.
	* ld-x86-64/tlsbin.sd: Likewise.
	* ld-x86-64/tlsbin.td: Likewise.
	* ld-x86-64/tlsbindesc.dd: Likewise.
	* ld-x86-64/tlsbindesc.sd: Likewise.
	* ld-x86-64/tlsbindesc.td: Likewise.
	* ld-x86-64/tlsdesc.dd: Likewise.
	* ld-x86-64/tlsdesc.sd: Likewise.
	* ld-x86-64/tlsdesc.td: Likewise.
	* ld-x86-64/tlsg.sd: Likewise.
	* ld-x86-64/tlsgd5.dd: Likewise.
	* ld-x86-64/tlsgd6.dd: Likewise.
	* ld-x86-64/tlsgdesc.dd: Likewise.
	* ld-x86-64/tlspic.dd: Likewise.
	* ld-x86-64/tlspic.sd: Likewise.
	* ld-x86-64/tlspic.td: Likewise.

	* ld-x86-64/ilp32-8.d: Match any file format variant.
	Use a -Ttext and adjust expected results, to handle variant layouts.
	* ld-x86-64/ilp32-9.d: Likewise.

	* ld-i386/alloc.t: Remove superfluous OUTPUT_FORMAT statement.
	* ld-i386/pr12627.t: Likewise.

	* ld-x86-64/abs-l1om.d: Add target: constraint.
	* ld-x86-64/protected2-l1om.d: Likewise.
	* ld-x86-64/protected3-l1om.d: Likewise.
	* ld-x86-64/ilp32-4.d: Likewise.

	* ld-x86-64/plt.s: New file.
	* ld-x86-64/pltlib.s: New file.
	* ld-x86-64/plt.pd: New file.
	* ld-x86-64/x86-64.exp (x86_64tests): Add them.

	* ld-i386/plt.s: New file.
	* ld-i386/pltlib.s: New file.
	* ld-i386/plt.pd: New file.
	* ld-i386/plt-pic.s: New file.
	* ld-i386/plt-pic.pd: New file.
	* ld-i386/i386.exp (i386tests): Add them.
2012-04-03 16:01:38 +00:00
Hans-Peter Nilsson
cae4ddc69f * configure.tgt (mips64*el-*-freebsd*, mips64*-*-freebsd*)
(mips*el-*-freebsd*, mips*-*-freebsd*): Correct triplets by
	replacing trailing "-*" with "*".
2012-03-05 04:02:20 +00:00
Walter Lee
fb6ceddedd Add big-endian support for tilegx.
bfd/
	* config.bfd (tilegx-*-*): rename little endian vector; add big
	endian vector.
	(tilegxbe-*-*): New case.
	* configure.in (bfd_elf32_tilegx_vec): Rename...
	(bfd_elf32_tilegx_le_vec): ... to this.
	(bfd_elf32_tilegx_be_vec): New vector.
	(bfd_elf64_tilegx_vec): Rename...
	(bfd_elf64_tilegx_le_vec): ... to this.
	(bfd_elf64_tilegx_be_vec): New vector.
	* configure: Regenerate.
	* elf32-tilegx.c (TARGET_LITTLE_SYM): Rename.
	(TARGET_LITTLE_NAME): Ditto.
	(TARGET_BIG_SYM): Define.
	(TARGET_BIG_NAME): Define.
	* elf64-tilegx.c (TARGET_LITTLE_SYM): Rename.
	(TARGET_LITTLE_NAME): Ditto.
	(TARGET_BIG_SYM): Define.
	(TARGET_BIG_NAME): Define.
	* targets.c (bfd_elf32_tilegx_vec): Rename...
	(bfd_elf32_tilegx_le_vec): ... to this.
	(bfd_elf32_tilegx_be_vec): Declare.
	(bfd_elf64_tilegx_vec): Rename...
	(bfd_elf64_tilegx_le_vec): ... to this.
	(bfd_elf64_tilegx_be_vec): Declare.
	(_bfd_target_vector): Add / rename above vectors.

binutils/testsuite/
	* binutils-all/objdump.exp (cpus_expected): Add tilegx.

gas/
	* tc-tilegx.c (tilegx_target_format): Handle big endian.
	(OPTION_EB): Define.
	(OPTION_EL): Define.
	(md_longopts): Add entries for "EB" and "EL".
	(md_parse_option): Handle OPTION_EB and OPTION_EL.
	(md_show_usage): Add -EB and -EL.
	(md_number_to_chars): New.
	* tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with
	ifndef.
	(md_number_to_chars): Delete.
	* configure.tgt (tilegx*be): Handle.
	* doc/as.texinfo [TILE-Gx]: Document -EB and -EL.
	* doc/c-tilegx.texi: Ditto.

ld/
	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx_be.c.
	(ALL_64_EMULATION_SOURCES): Add eelf64tilegx_be.c.
	(eelf32tilegx_be.c): Add rule to build this file.
	(eelf64tilegx_be.c): Ditto.
	* Makefile.in: Regenerate.
	* configure.tgt (tilegx-*-*): Support big endian.
	(tilegxbe-*-*): New.
	* emulparams/elf32tilegx.sh (OUTPUT_FORMAT): Rename.
	(BIG_OUTPUT_FORMAT): Define.
	(LITTLE_OUTPUT_FORMAT): Define.
	* emulparams/elf32tilegx_be.sh: New.
	* emulparams/elf64tilegx.sh (OUTPUT_FORMAT): Rename.
	(BIG_OUTPUT_FORMAT): Define.
	(LITTLE_OUTPUT_FORMAT): Define.
	* emulparams/elf64tilegx_be.sh: New.

ld/testsuite/
	* ld-tilegx/reloc-be.d: New.
	* ld-tilegx/reloc-le.d: New.
	* ld-tilegx/reloc.d: Delete.
	* ld-tilegx/tilegx.exp: Test big and little endian.
2012-02-25 19:51:34 +00:00
Alan Modra
bd59d91639 * Makefile.am (ALL_64_EMULATION_SOURCES): Add powerpc64-*-freebsd
source.
	(eelf64ppc_fbsd.c): Add rules to build this file.
	* Makefile.in: Regenerate.
	* configure.tgt: Add target definition for powerpc64-*-freebsd*.
	Adjust powerpc-*-freebsd*.
	* emultempl/ppc64elf.em: Add a mechanism to override the default
	value of 0 for plt_static_chain.
	* emulparams/elf32ppc_fbsd.sh (OUTPUT_FORMAT): Override the default.
	* emulparams/elf64ppc_fbsd.sh (OUTPUT_FORMAT): Likewise.
	(DEFAULT_PLT_STATIC_CHAIN): Define to 1.
2011-11-21 13:22:46 +00:00
Rainer Orth
e0d08d4b30 ld:
* configure.tgt (x86_64-*-solaris2*): Use $targ_extra_emuls for
	targ_extra_libpath.
2011-11-02 15:28:17 +00:00
DJ Delorie
99c513f6ac [.]
* configure.ac (rl78-*-*) New case.
	* configure: Regenerate.

[bfd]
	* Makefile.am (ALL_MACHINES): Add cpu-rl78.lo.
	(ALL_MACHINES_CFILES): Add cpu-rl78.c.
	(BFD32_BACKENDS): Add elf32-rl78.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-rl78.c.
	(Makefile.in): Regenerate.
	* archures.c (bfd_architecture): Define bfd_arch_rl78.
	(bfd_archures_list): Add bfd_rl78_arch.
	* config.bfd: Add rl78-*-elf.
	* configure.in: Add bfd_elf32_rl78_vec.
	* reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations.
	* targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.
	* cpu-rl78.c: New file.
	* elf32-rl78.c: New file.

[binutils]
	* readelf.c: Include elf/rl78.h
	(guess_is_rela): Handle EM_RL78.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(is_32bit_abs_reloc): Likewise.
	* NEWS: Mention addition of RL78 support.
	* MAINTAINERS: Add myself as RL78 port maintainer.

[gas]
	* Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.
	(TARGET_CPU_HFILES): Add rc-rl78.h.
	(EXTRA_DIST): Add rl78-parse.c and rl78-parse.y.
	(rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules.
	* Makefile.in: Regenerate.
	* configure.in: Add rl78 case.
	* configure: Regenerate.
	* configure.tgt: Add rl78 case.
	* config/rl78-defs.h: New file.
	* config/rl78-parse.y: New file.
	* config/tc-rl78.c: New file.
	* config/tc-rl78.h: New file.
	* NEWS: Add Renesas RL78.

	* doc/Makefile.am (c-rl78.texi): New.
	* doc/Makefile.in: Likewise.
	* doc/all.texi: Enable it.
	* doc/as.texi: Add it.

[include]
	* dis-asm.h (print_insn_rl78): Declare.

[include/elf]
	* common.h (EM_RL78, EM_78K0R): New.
	* rl78.h: New.

[include/opcode]
	* rl78.h: New file.

[ld]
	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c.
	(+eelf32rl78.c): New rule.
	* Makefile.in: Regenerate.
	* configure.tgt: Add rl78-*-* case.
	* emulparams/elf32rl78.sh: New file.
	* NEWS: Mention addition of Renesas RL78 support.

[opcodes]
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and
	rl78-dis.c.
	(MAINTAINERCLEANFILES): Add rl78-decode.c.
	(rl78-decode.c): New rule, built from rl78-decode.opc and opc2c.
	* Makefile.in: Regenerate.
	* configure.in: Add bfd_rl78_arch case.
	* configure: Regenerate.
	* disassemble.c: Define ARCH_rl78.
	(disassembler): Add ARCH_rl78 case.
	* rl78-decode.c: New file.
	* rl78-decode.opc: New file.
	* rl78-dis.c: New file.
2011-11-02 03:09:11 +00:00
Nick Clifton
cfb8c0921c bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
	(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
	(BFD32_BACKENDS): Add elf32-epiphany.lo .
	(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
	* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
	* archures.c (bfd_arch_epiphany): Add.
	(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
	(bfd_epiphany_arch): Declare.
	(bfd_archures_list): Add &bfd_epiphany_arch.
	* config.bfd (epiphany-*-elf): New target case.
	* configure.in (bfd_elf32_epiphany_vec): New target vector case.
	* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
	(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
	(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
	(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
	* targets.c (bfd_elf32_epiphany_vec): Declare.
	(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
	* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
	* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
	* readelf.c (include "elf/epiphany.h")
	(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
	(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
	(is_16bit_abs_reloc, is_none_reloc): Likewise.
	* po/binutils.pot: Regenerate.
cpu:
	* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
	* NEWS: Mention addition of Adapteva Epiphany support.
	* config/tc-epiphany.c, config/tc-epiphany.h: New files.
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
	(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
	* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
	* configure.in: Also set using_cgen for epiphany.
	* configure.tgt: Handle epiphany.
	* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
	* doc/all.texi: Set EPIPHANY.
	* doc/as.texinfo: Add EPIPHANY-specific text.
	* doc/c-epiphany.texi: New file.
	* po/gas.pot: Regenerate.
gas/testsuite:
	* gas/epiphany: New directory.
include:
	* dis-asm.h (print_insn_epiphany): Declare.
	* elf/epiphany.h: New file.
	* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
	* NEWS: Mention addition of Adapteva Epiphany support.
	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
	(eelf32epiphany.c): New rule.
	* Makefile.in: Regenerate.
	* configure.tgt: Handle epiphany-*-elf.
	* po/ld.pot: Regenerate.
	* testsuite/ld-srec/srec.exp: xfail epiphany.
	* emulparams/elf32epiphany.sh: New file.
opcodes:
	* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
	(TARGET_LIBOPCODES_CFILES): Add  epiphany-asm.c, epiphany-desc.c,
	epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
	(CLEANFILES): Add stamp-epiphany.
	(EPIPHANY_DEPS): Set.  Make CGEN-generated Epiphany files depend on it.
	(stamp-epiphany): New rule.
	* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
	* configure.in: Handle bfd_epiphany_arch.
	* disassemble.c (ARCH_epiphany): Define.
	(disassembler): Handle bfd_arch_epiphany.
	* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
	* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
	* epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
H.J. Lu
7a9068fe16 Add initial Intel K1OM support.
bfd/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ALL_MACHINES): Add cpu-k1om.lo.
	(ALL_MACHINES_CFILES): Add cpu-k1om.c.
	* Makefile.in: Regenerated.

	* archures.c (bfd_architecture): Add bfd_arch_k1om.
	(bfd_k1om_arch): New.
	(bfd_archures_list): Add &bfd_k1om_arch.
	* bfd-in2.h: Regenerated.

	* config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if
	bfd_elf64_x86_64_vec is supported.  Add bfd_elf64_k1om_freebsd_vec
	if bfd_elf64_x86_64_freebsd_vec is supported.
	(targ_selvecs): Likewise.

	* configure.in: Support bfd_elf64_k1om_vec and
	bfd_elf64_k1om_freebsd_vec.
	* configure: Regenerated.

	* cpu-k1om.c: New.

	* elf64-x86-64.c (elf64_k1om_elf_object_p): New.
	(bfd_elf64_k1om_vec): Likewise.
	(bfd_elf64_k1om_freebsd_vec): Likewise.

	* targets.c (bfd_elf64_k1om_vec): New.
	(bfd_elf64_k1om_freebsd_vec): Likewise.
	(_bfd_target_vector): Add bfd_elf64_k1om_vec and
	bfd_elf64_k1om_freebsd_vec.

binutils/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c (init_dwarf_regnames): Handle EM_K1OM.

	* elfedit.c (elf_machine): Support EM_K1OM.
	(elf_class): Likewise.

	* readelf.c (guess_is_rela): Handle EM_K1OM.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(get_section_type_name): Likewise.
	(get_elf_section_flags): Likewise.
	(process_section_headers): Likewise.
	(get_symbol_index_type): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_32bit_pcrel_reloc): Likewise.
	(is_64bit_abs_reloc): Likewise.
	(is_64bit_pcrel_reloc): Likewise.
	(is_none_reloc): Likewise.

	* doc/binutils.texi: Mention K1OM for elfedit.

binutils/testsuite/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* binutils-all/elfedit.exp: Run elfedit-4.

	* binutils-all/elfedit-4.d: New.

gas/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add k1om.
	(i386_align_code): Handle PROCESSOR_K1OM.
	(check_cpu_arch_compatible): Check EM_K1OM.
	(i386_arch): Handle Intel K1OM.
	(i386_mach): Return bfd_mach_k1om for Intel K1OM.
	(i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel
	K1OM.

	* config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New.
	(processor_type): Add PROCESSOR_K1OM.

	* doc/c-i386.texi: Document k1om.

gas/testsuite/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/k1om.d: New.
	* gas/i386/k1om-inval.l: Likewise.
	* gas/i386/k1om-inval.s: Likewise.

	* gas/i386/i386.exp: Run k1om-inval and k1om.

include/elf/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* common.h (EM_K1OM): New.

ld/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and
	eelf_k1om_fbsd.o
	(eelf_k1om.c): New.
	(eelf_k1om_fbsd.c): Likewise.
	* Makefile.in: Regenerated.

	* configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64
	is supported.  Add elf_k1om_fbsd if elf_x86_64_fbsd is supported.
	(targ_extra_emuls): Likewise.

	* emulparams/elf_k1om.sh: New.
	* emulparams/elf_k1om_fbsd.sh: Likewise.

ld/testsuite/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/abs-k1om.d: New.
	* ld-x86-64/protected2-k1om.d: Likewise.
	* ld-x86-64/protected3-k1om.d: Likewise.

	* ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and
	protected3-k1om.

opcodes/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in: Handle bfd_k1om_arch.
	* configure: Regenerated.

	* disassemble.c (disassembler): Handle bfd_k1om_arch.

	* i386-dis.c (print_insn): Handle bfd_mach_k1om and
	bfd_mach_k1om_intel_syntax.

	* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to
	~(CpuL1OM|CpuK1OM).  Add CPU_K1OM_FLAGS.
	(cpu_flags): Add CpuK1OM.

	* i386-opc.h (CpuK1OM): New.
	(i386_cpu_flags): Add cpuk1om.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
H.J. Lu
ade78dba78 Revert x86_64-x32-* change.
gas/

2011-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt: Revert x32 change.

ld/

2011-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt: Revert x32 change.

ld/testsuite/

2011-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-elf/eh1.d: Revert x32 change.
	* ld-elf/eh2.d: Likewise.
	* ld-elf/eh3.d: Likewise.
	* ld-elf/eh4.d: Likewise.
2011-06-20 13:23:22 +00:00
H.J. Lu
8b7789423c Fix misc x32 bugs.
bfd/

2011-06-19  H.J. Lu  <hongjiu.lu@intel.com>

	* elf64-x86-64.c (elf_backend_post_process_headers): Defined
	for x32.

binutils/testsuite/

2011-06-19  H.J. Lu  <hongjiu.lu@intel.com>

	* binutils-all/elfedit-1.d: Updated for x32.

gas/

2011-06-19  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt: Support x32.

ld/

2011-06-19  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt: Support x32.

ld/testsuite/

2011-06-19  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-elf/eh1.d: Skip x32.
	* ld-elf/eh2.d: Likewise.
	* ld-elf/eh3.d: Likewise.
	* ld-elf/eh4.d: Likewise.

	* ld-elfvsb/elfvsb.exp: Only xfail 64bit x86_64-*-linux*.
	* ld-shared/shared.exp: Likewise.

	* ld-ifunc/ifunc-1-local-x86.d: Support x32.
	* ld-ifunc/ifunc-1-x86.d: Likewise.
	* ld-ifunc/ifunc-3a-x86.d: Likewise.
	* ld-x86-64/pcrel16.d: Likewise.

	* ld-x86-64/x86-64.exp (x86_64tests): Add missing -melf_x86_64.
2011-06-19 21:22:16 +00:00
Nick Clifton
aa137e4d51 * Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
    (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
    and elfxx-tilegx.lo.
    (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
    elfxx-tilegx.c.
    (BFD64_BACKENDS): Add elf64-tilegx.lo.
    (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
    * Makefile.in: Regenerate.
    * arctures.c (bfd_architecture): Define bfd_arch_tilepro,
    bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
    (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
    (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
    bfd-in2.h: Regenerate.
    * config.bfd: Handle tilegx-*-* and tilepro-*-*.
    * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * configure: Regenerate.
    * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
    TILEPRO_ELF_DATA.
    * libbfd.h: Regenerate.
    * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
    RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
    IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
    IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
    IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
    IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
    IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
    IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
    IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
    IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
    MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
    IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
    IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
    IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
    IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
    IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
    IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
    HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
    JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
    DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
    SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
    IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
    IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
    IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
    IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
    IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
    IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
    IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
    IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
    IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
    IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
    IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
    IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
    IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
    IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
    IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
    IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
    IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
    IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
    IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
    IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
    IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
    IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
    IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
    IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
    IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
    IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
    IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
    TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    * targets.c (bfd_elf32_tilegx_vec): Declare.
    (bfd_elf32_tilepro_vec): Declare.
    (bfd_elf64_tilegx_vec): Declare.
    (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * cpu-tilegx.c: New file.
    * cpu-tilepro.c: New file.
    * elf32-tilepro.h: New file.
    * elf32-tilepro.c: New file.
    * elf32-tilegx.c: New file.
    * elf32-tilegx.h: New file.
    * elf64-tilegx.c: New file.
    * elf64-tilegx.h: New file.
    * elfxx-tilegx.c: New file.
    * elfxx-tilegx.h: New file.

	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
	config/tc-tilepro.c.
	(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
	config/tc-tilepro.h.
	* Makefile.in: Regenerate.
	* configure.tgt (tilepro-*-*): New.
	(tilegx-*-*): Likewise.
	* config/tc-tilegx.c: New file.
	* config/tc-tilegx.h: Likewise.
	* config/tc-tilepro.h: Likewise.
	* config/tc-tilepro.c: Likewise.
	* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
	c-tilepro.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TILEGX): Define.
	(TILEPRO): Define.
	* doc/as.texinfo: Add Tile-Gx and TILEPro documentation.  Include
	c-tilegx.texi and c-tilepro.texi.
	* doc/c-tilegx.texi: New.
	* doc/c-tilepro.texi: New.

        * gas/tilepro/t_constants.s: New file.
	* gas/tilepro/t_constants.d: Likewise.
	* gas/tilepro/t_insns.s: Likewise.
	* gas/tilepro/tilepro.exp: Likewise.
	* gas/tilepro/t_insns.d: Likewise.
	* gas/tilegx/tilegx.exp: Likewise.
	* gas/tilegx/t_insns.d: Likewise.
	* gas/tilegx/t_insns.s: Likewise.

	* dis-asm.h (print_insn_tilegx): Declare.
	(print_insn_tilepro): Likewise.

	* tilegx.h: New file.
	* tilepro.h: New file.

	* common.h: Add EM_TILEGX.
	* tilegx.h: New file.
	* tilepro.h: New file.

	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
	eelf32tilepro.c.
	(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
	(eelf32tilegx.c): New target.
	(eelf32tilepro.c): Likewise.
	(eelf64tilegx.c): Likewise.
	* Makefile.in: Regenerate.
	* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
	* emulparams/elf32tilegx.sh: New file.
	* emulparams/elf64tilegx.sh: New file.
	* emulparams/elf32tilepro.sh: New file.

	* ld-elf/eh5.d: Don't run on tile*.
	* ld-srec/srec.exp: xfail on tile*.
	* ld-tilegx/external.s: New file.
	* ld-tilegx/reloc.d: New file.
	* ld-tilegx/reloc.s: New file.
	* ld-tilegx/tilegx.exp: New file.
	* ld-tilepro/external.s: New file.
	* ld-tilepro/reloc.d: New file.
	* ld-tilepro/reloc.s: New file.
	* ld-tilepro/tilepro.exp: New file.

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
	tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
	* Makefile.in: Regenerate.
	* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
	* po/POTFILES.in: Regenerate.
	* tilegx-dis.c: New file.
	* tilegx-opc.c: New file.
	* tilepro-dis.c: New file.
	* tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
Nick Clifton
ab3719da06 configure.tgt: Accept any V850 architecture. 2011-06-08 07:43:18 +00:00
Bernd Schmidt
2a6163793f ld/
(eelf32_tic6x_linux_be.c, eelf32_tic6x_linux_le.c,
	eelf32_tic6x_elf_be.c, eelf32_tic6x_elf_le.c): New rules.
	* Makefile.am (ALL_EMULATIONS): Add these files.
	(eelf32_tic6x_be.c, eelf32_tic6x_le.c): Depend on tic6xdsbt.em.
	* Makefile.in: Regenerated.
	* emultempl/tic6xdsbt.em (is_tic6x_target): Allow more tic6x target
	vectors.
	* emulparams/elf32_tic6x_elf_be.sh: New file.
	* emulparams/elf32_tic6x_elf_le.sh: New file.
	* emulparams/elf32_tic6x_linux_be.sh: New file.
	* emulparams/elf32_tic6x_linux_le.sh: New file.
	* configure.tgt (tic6x-*-elf, tic6x-*-uclinux): New.
	(tic6x-*-*): Replaced by these.

	ld/testsuite/
	* ld-tic6x/dsbt.ld (OUTPUT_FORMAT): Add.
	* ld-tic6x/tic6x.exp: Add OSABI tests.

	bfd/
	* config.bfd (tic6x-*-elf, tic6x-*-uclinux): New.
	(tic6x-*-*): Replaced by these.
	* elf32-tic6x.c (elf32_tic6x_set_osabi): New static function.
	(elf32_tic6x_check_relocs): Create dynamic sections if -shared.
	(elf_backend_relocs_compatible, elf_backend_post_process_headers):
	Define.
	(elf32_bed, TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, TARGET_BIG_SYM,
	TARGET_BIG_NAME, ELF_OSABI): Redefine twice, and include
	"elf32-target.h" two more times.
	* configure.in: Handle bfd_elf32_tic6x_linux_be_vec,
	bfd_elf32_tic6x_linux_le_vec, bfd_elf32_tic6x_elf_be_vec and
	bfd_elf32_tic6x_elf_le_vec.
	* configure: Regenerate.
2011-05-13 18:15:33 +00:00
Jan Beulich
3ac5406bdb bfd/
2011-05-13  Jan Beulich  <jbeulich@novell.com>

	* config.bfd: Add targets x86_64-*-pe and x86_64-*-pep.

ld/
2011-05-13  Jan Beulich  <jbeulich@novell.com>

	* configure.tgt: Add targets x86_64-*-pe and x86_64-*-pep.
2011-05-13 06:43:13 +00:00
Nick Clifton
0e9dfb4626 PR ld/12643
* configure.tgt: Add support for arm-*-gnueabihf targets.
2011-04-08 16:05:12 +00:00
Joseph Myers
91db4c57cf * configure.tgt: Remove stray ;;. 2011-04-07 01:19:22 +00:00
Joseph Myers
8c5fc80011 bfd:
* config.bfd (thumb-*-oabi): Don't handle in list of obsolete
	targets.
	(strongarm*, thumb*, xscale*): Remove architectures.
	(strongarm-*-kaos*, thumb-*-coff, thumb-*-elf, thumb-epoc-pe*,
	thumb-*-pe*, strongarm-*-elf, strongarm-*-coff, xscale-*-elf,
	xscale-*-coff): Remove targets.

binutils:
	* configure.in (thumb-*-pe*): Remove.
	* configure: Regenerate.

binutils/testsuite:
	* binutils-all/objcopy.exp (*arm*-*-coff): Change to arm*-*-coff.
	(xscale-*-coff, thumb*-*-coff, thumb*-*-pe): Don't handle.

gas:
	* configure.tgt (strongarm*be, strongarm*b, strongarm*,
	xscale*be|xscale*b, xscale*): Remove architectures.
	(thumb-*-coff, thumb-*-rtems*, thumb-*-elf, thumb-epoc-pe,
	thumb-*-pe, xscale-*-coff, xscale-*-elf): Remove targets.

gas/testsuite:
	* gas/all/gas.exp (*arm*-*-coff): Change to arm*-*-coff.
	(thumb*-*-coff, thumb*-*-pe*): Don;t handle.
	* gas/arm/arm.exp (*arm*-*-*): Change to arm*-*-*.
	(*xscale*-*-*): Don't handle.
	* gas/cfi/cfi.exp (xscale*-*): Don't handle.
	* gas/elf/elf.exp (*arm*-*-*): Change to arm*-*-*.
	(xscale*-*-*): Don't handle.

ld:
	* configure.tgt (thumb-*-linux-* | thumb-*-uclinux*,
	strongarm-*-coff, strongarm-*-elf, strongarm-*-kaos*,
	thumb-*-coff, thumb-*-elf, thumb-epoc-pe, thumb-*-pe,
	xscale-*-coff, xscale-*-elf): Remove targets.

ld/testsuite:
	* ld-selective/selective.exp (xscale-*-*): Don't handle.
	* ld-srec/srec.exp (strongarm*-*-*, xscale*-*-*, thumb-*-*): Don't
	handle.
	(*arm*-*-*): Change to arm*-*-*.
	(strongarm*-*-coff, xscale*-*-coff, thumb-*-coff*, thumb-*-pe*,
	thumb-*-elf*, strongarm*-*-*, thumb-*-*): Remove xfails.
	* ld-undefined/undefined.exp (thumb*-*-pe*, thumb*-*-pe*): Remove
	commented-out xfails.
	(thumb-elf): Remove reference in comment.
	* lib/ld-lib.exp (strongarm*-*-*, xscale*-*-*, thumb-*-*): Don't
	handle.
2011-04-06 17:09:56 +00:00
H.J. Lu
d02c4aae3d Fix elf_l1om linker scripts.
2011-03-31  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt: Add elf_l1om to targ_extra_libpath for
	 x86_64-*-linux-*.

	* emulparams/elf_l1om.sh: Remove duplicates.
2011-03-31 22:23:09 +00:00
Nick Clifton
5b806d2793 Add support for DragonFlyBSD target. 2011-03-28 11:18:27 +00:00
Eric B. Weddington
8cc66334fa /bfd:
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* archures.c: Add AVR XMEGA architecture information.
	* cpu-avr.c (arch_info_struct): Likewise.
	* elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise.
	(elf32_avr_object_p): Likewise.

/gas:
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
	(AVR_INSN): Change definition to match.
	(avr_opcodes): Likewise, change to match.
	(mcu_types): Add XMEGA architecture names and new XMEGA device names.
	(md_show_usage): Add XMEGA architecture names.
	(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
	Add support for SPM Z+ instruction.
	* doc/c-avr.texi: Add documentation for XMEGA architectures and
	devices.

/include/opcode:
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
	New instruction set flags.
	(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.

/ld:
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures.
	(eavrxmega?.c): Likewise.
	* configure.tgt (targ_extra_emuls): Likewise.
	* emulparams/avrxmega1.sh: New file.
	* emulparams/avrxmega2.sh: Likewise.
	* emulparams/avrxmega3.sh: Likewise.
	* emulparams/avrxmega4.sh: Likewise.
	* emulparams/avrxmega5.sh: Likewise.
	* emulparams/avrxmega6.sh: Likewise.
	* emulparams/avrxmega7.sh: Likewise.
	* emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation):
	Add avrxmega6, avrxmega7 to list of architectures for no stubs.

/opcodes:
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
	post-increment to support LPM Z+ instruction. Add support for 'E'
	constraint for DES instruction.
	(print_insn_avr): Adjust calls to avr_operand. Rename variable.
2011-03-22 18:10:48 +00:00
Richard Sandiford
aeffff6722 bfd/
2010-12-23  Robert Millan  <rmh@gnu.org>

	* config.bfd: Recognize mips-freebsd and mips-kfreebsd-gnu.
	* configure.host: Likewise.
	* configure.in: Support for `bfd_elf32_ntradbigmips_freebsd_vec',
	`bfd_elf32_ntradlittlemips_freebsd_vec',
	`bfd_elf32_tradbigmips_freebsd_vec',
	`bfd_elf32_tradlittlemips_freebsd_vec',
	`bfd_elf64_tradbigmips_freebsd_vec' and
	`bfd_elf64_tradlittlemips_freebsd_vec'.
	* configure: Regenerate.
	* elf32-mips.c: New target for FreeBSD support
	(same as traditional MIPS but overrides ELF_OSABI
	with ELFOSABI_FREEBSD).
	* elf64-mips.c: Likewise.
	* elfn32-mips.c: Likewise.
	* targets.c (_bfd_target_vector): Add
	`bfd_elf32_ntradbigmips_freebsd_vec',
	`bfd_elf32_ntradlittlemips_freebsd_vec',
	`bfd_elf32_tradbigmips_freebsd_vec',
	`bfd_elf32_tradlittlemips_freebsd_vec',
	`bfd_elf64_tradbigmips_freebsd_vec' and
	`bfd_elf64_tradlittlemips_freebsd_vec'.

ld/
2010-12-14  Robert Millan  <rmh@gnu.org>

	* configure.tgt: Recognize mips-freebsd and mips-kfreebsd-gnu.

	* emulparams/elf32btsmip_fbsd.sh: New file.
	* emulparams/elf32btsmipn32_fbsd.sh: Likewise.
	* emulparams/elf32ltsmip_fbsd.sh: Likewise.
	* emulparams/elf32ltsmipn32_fbsd.sh: Likewise.
	* emulparams/elf64btsmip_fbsd.sh: Likewise.
	* emulparams/elf64ltsmip_fbsd.sh: Likewise.

	* Makefile.am: Add build rules for `eelf32btsmip_fbsd.c',
	`eelf32btsmipn32_fbsd.c', `eelf32ltsmip_fbsd.c',
	`eelf32ltsmipn32_fbsd.c', `eelf64btsmip_fbsd.c' and
	`eelf64ltsmip_fbsd.c'.
	* Makefile.in: Regenerate.

gas/
2010-12-19  Robert Millan  <rmh@gnu.org>
	    Richard Sandiford  <rdsandiford@googlemail.com>

	* config/tc-mips.c (ELF_TARGET): New macro.  Generates target
	names accordingly to whether TE_FreeBSD and whether TE_TMIPS
	are defined.
	(mips_target_format): Refactor code using ELF_TARGET().
	(support_64bit_objects): Likewise.

	* configure.in: Recognize mips-freebsd and mips-kfreebsd-gnu.
	* configure.tgt: Likewise.
	* configure: Regenerate.

binutils/testsuite/
	* binutils-all/readelf.exp: Handle MIPS FreeBSD targets.

gas/testsuite/
	* gas/mips/e32el-rel2.d: Accept any file format.
	* gas/mips/elf-rel.d: Likewise.
	* gas/mips/elf-rel2.d: Likewise.
	* gas/mips/elf-rel3.d: Likewise.
	* gas/mips/elfel-rel.d: Likewise.
	* gas/mips/elfel-rel2.d: Likewise.
	* gas/mips/elfel-rel3.d: Likewise.
	* gas/mips/ldstla-32-mips3-shared.d: Likewise.
	* gas/mips/ldstla-32-mips3.d: Likewise.
	* gas/mips/ldstla-32-shared.d: Likewise.
	* gas/mips/ldstla-32.d: Likewise.
	* gas/mips/ldstla-n64-shared.d: Likewise.
	* gas/mips/ldstla-n64.d: Likewise.
	* gas/mips/noat-1.d: Likewise.
	* gas/mips/set-arch.d: Likewise.
	* gas/mips/tls-o32.d: Likewise.

ld/testsuite/
	* ld-mips-elf/mips-elf-flags.exp: Handle FreeBSD targets.
	* ld-mips-elf/mips-elf.exp: Likewise.
	* ld-mips-elf/mips16-call-global.d: Accept any file format.
	* ld-mips-elf/mips16-intermix.d: Likewise.
2010-12-31 11:01:00 +00:00
H.J. Lu
351f65ca26 Add x86-64 ILP32 support.
bfd/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* archures.c (bfd_mach_x64_32): New.
	(bfd_mach_x64_32_intel_syntax): Likewise.
	* bfd-in2.h: Regenerated.

	* config.bfd (targ64_selvecs): Add bfd_elf32_x86_64_vec for
	i[3-7]86-*-linux-*.
	(targ_selvecs): Add bfd_elf32_x86_64_vec for x86_64-*-linux-*.

	* configure.in: Support bfd_elf32_x86_64_vec.
	* configure: Regenerated.

	* cpu-i386.c (bfd_x64_32_arch_intel_syntax): New.
	(bfd_x64_32_arch): Likewise.

	* elf-bfd.h (elf_append_rela): New prototype.
	(elf_append_rel): Likewise.
	(elf64_r_info): Likewise.
	(elf32_r_info): Likewise.
	(elf64_r_sym): Likewise.
	(elf32_r_sym): Likewise.

	* elf64-x86-64.c (ABI_64_P): New.
	(elf_x86_64_info_to_howto): Replace ELF64_R_TYPE with
	ELF32_R_TYPE.  Replace ELF64_ST_TYPE with ELF_ST_TYPE.
	(elf_x86_64_check_tls_transition):Likewise.
	(elf_x86_64_check_relocs): Likewise.
	(elf_x86_64_gc_mark_hook):Likewise.
	(elf_x86_64_gc_sweep_hook): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_reloc_type_class): Likewise.
	(ELF_DYNAMIC_INTERPRETER): Renamed to ...
	(ELF64_DYNAMIC_INTERPRETER): This.
	(ELF32_DYNAMIC_INTERPRETER): New.
	(elf_x86_64_link_hash_table): Add r_info, r_sym, swap_reloca_out,
	dynamic_interpreter and dynamic_interpreter_size.
	(elf_x86_64_get_local_sym_hash): Replace ELF64_R_SYM with
	htab->r_sym.  Replace ELF64_R_INFO with htab->r_info.
	(elf_x86_64_get_local_sym_hash): Likewise.
	(elf_x86_64_check_tls_transition):Likewise.
	(elf_x86_64_check_relocs): Likewise.
	(elf_x86_64_gc_mark_hook):Likewise.
	(elf_x86_64_gc_sweep_hook): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_finish_dynamic_symbol): Likewise.
	(elf_x86_64_finish_local_dynamic_symbol): Likewise.
	(elf_x86_64_link_hash_table_create): Initialize r_info, r_sym,
	swap_reloca_out, dynamic_interpreter and dynamic_interpreter_size.
	(elf_x86_64_check_relocs): Check ABI_64_P when requesting for
	PIC.
	(elf_x86_64_relocate_section): Likewise.
	(elf64_x86_64_adjust_dynamic_symbol): Replace sizeof
	(Elf64_External_Rela) with bed->s->sizeof_rela.
	(elf64_x86_64_allocate_dynrelocs): Likewise.
	(elf64_x86_64_size_dynamic_sections): Likewise.
	(elf64_x86_64_finish_dynamic_symbol): Likewise.
	(elf64_x86_64_append_rela): Removed.
	(elf32_x86_64_elf_object_p): New.
	Add bfd_elf32_x86_64_vec.

	* elf64-x86-64.c (elf64_x86_64_xxx): Renamed to ...
	(elf_x86_64_xxx): This.

	* elflink.c (bfd_elf_final_link): Check ELF file class on error.
	(elf_append_rela): New.
	(elf_append_rel): Likewise.
	(elf64_r_info): Likewise.
	(elf32_r_info): Likewise.
	(elf64_r_sym): Likewise.
	(elf32_r_sym): Likewise.

	* targets.c (bfd_elf32_x86_64_vec): New.
	(_bfd_target_vector): Add bfd_elf32_x86_64_vec.

gas/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (x86_elf_abi): New.
	(i386_mach): Return bfd_mach_x64_32 for ILP32.
	(OPTION_N32): Likewise.
	(md_longopts): Add "n32" for ELF.
	(md_parse_option): Handle OPTION_N32.
	(md_show_usage): Add --n32.
	(i386_target_format): Update and check x86_elf_abi.

	* config/tc-i386.h (ELF_TARGET_FORMAT32): New.

	* doc/as.texinfo: Document --n32.
	* doc/c-i386.texi: Likewise.

gas/testsuite/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/lns/ilp32.exp: New.
	* gas/i386/ilp32/lns/lns-common-1.d: Likewise.
	* gas/i386/ilp32/lns/lns-duplicate.d: Likewise.

	* gas/i386/ilp32/cfi/cfi-common-1.d: New.
	* gas/i386/ilp32/cfi/cfi-common-2.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-3.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-4.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-5.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-6.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-7.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-x86_64.d: Likewise.
	* gas/i386/ilp32/cfi/ilp32.exp: Likewise.
	* gas/i386/ilp32/elf/ehopt0.d: Likewise.
	* gas/i386/ilp32/elf/equ-reloc.d: Likewise.
	* gas/i386/ilp32/elf/file.d: Likewise.
	* gas/i386/ilp32/elf/group0a.d: Likewise.
	* gas/i386/ilp32/elf/group0b.d: Likewise.
	* gas/i386/ilp32/elf/group1a.d: Likewise.
	* gas/i386/ilp32/elf/group1b.d: Likewise.
	* gas/i386/ilp32/elf/ifunc-1.d: Likewise.
	* gas/i386/ilp32/elf/ilp32.exp: Likewise.
	* gas/i386/ilp32/elf/redef.d: Likewise.
	* gas/i386/ilp32/elf/section0.d: Likewise.
	* gas/i386/ilp32/elf/section1.d: Likewise.
	* gas/i386/ilp32/elf/section3.d: Likewise.
	* gas/i386/ilp32/elf/section4.d: Likewise.
	* gas/i386/ilp32/elf/section6.d: Likewise.
	* gas/i386/ilp32/elf/section7.d: Likewise.
	* gas/i386/ilp32/elf/struct.d: Likewise.
	* gas/i386/ilp32/elf/symtab.d: Likewise.
	* gas/i386/ilp32/elf/symver.d: Likewise.

	* gas/i386/ilp32/ilp32.exp: New.
	* gas/i386/ilp32/immed64.d: Likewise.
	* gas/i386/ilp32/mixed-mode-reloc64.d: Likewise.
	* gas/i386/ilp32/reloc64.d: Likewise.
	* gas/i386/ilp32/rex.d: Likewise.
	* gas/i386/ilp32/rexw.d: Likewise.
	* gas/i386/ilp32/svme64.d: Likewise.
	* gas/i386/ilp32/x86-64-addr32.d: Likewise.
	* gas/i386/ilp32/x86-64-addr32-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-aes.d: Likewise.
	* gas/i386/ilp32/x86-64-aes-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-amdfam10.d: Likewise.
	* gas/i386/ilp32/x86-64-arch-1.d: Likewise.
	* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
	* gas/i386/ilp32/x86-64-avx.d: Likewise.
	* gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-avx-swap.d: Likewise.
	* gas/i386/ilp32/x86-64-avx-swap-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-branch.d: Likewise.
	* gas/i386/ilp32/x86-64-cbw.d: Likewise.
	* gas/i386/ilp32/x86-64-cbw-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-clmul.d: Likewise.
	* gas/i386/ilp32/x86-64-clmul-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-crc32.d: Likewise.
	* gas/i386/ilp32/x86-64-crc32-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-crx.d: Likewise.
	* gas/i386/ilp32/x86-64-crx-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64.d: Likewise.
	* gas/i386/ilp32/x86-64-disp.d: Likewise.
	* gas/i386/ilp32/x86-64-disp-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-drx.d: Likewise.
	* gas/i386/ilp32/x86-64-drx-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-ept.d: Likewise.
	* gas/i386/ilp32/x86-64-ept-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-fma4.d: Likewise.
	* gas/i386/ilp32/x86-64-fma.d: Likewise.
	* gas/i386/ilp32/x86-64-fma-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-gidt.d: Likewise.
	* gas/i386/ilp32/x86-64-ifunc.d: Likewise.
	* gas/i386/ilp32/x86-64-intel64.d: Likewise.
	* gas/i386/ilp32/x86-64-io.d: Likewise.
	* gas/i386/ilp32/x86-64-io-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-io-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-localpic.d: Likewise.
	* gas/i386/ilp32/x86-64-mem.d: Likewise.
	* gas/i386/ilp32/x86-64-mem-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-movbe.d: Likewise.
	* gas/i386/ilp32/x86-64-movbe-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-pentium.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-3.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-5.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops.d: Likewise.
	* gas/i386/ilp32/x86-64-opcode.d: Likewise.
	* gas/i386/ilp32/x86-64-opcode-inval.d: Likewise.
	* gas/i386/ilp32/x86-64-opcode-inval-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-opts.d: Likewise.
	* gas/i386/ilp32/x86-64-opts-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-pcrel.d: Likewise.
	* gas/i386/ilp32/x86-64-reg.d: Likewise.
	* gas/i386/ilp32/x86-64-reg-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-rep.d: Likewise.
	* gas/i386/ilp32/x86-64-rep-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-rip.d: Likewise.
	* gas/i386/ilp32/x86-64-rip-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-sib.d: Likewise.
	* gas/i386/ilp32/x86-64-sib-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-simd.d: Likewise.
	* gas/i386/ilp32/x86-64-simd-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-simd-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-sse2avx.d: Likewise.
	* gas/i386/ilp32/x86-64-sse2avx-opts.d: Likewise.
	* gas/i386/ilp32/x86-64-sse2avx-opts-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-sse3.d: Likewise.
	* gas/i386/ilp32/x86-64-sse4_1.d: Likewise.
	* gas/i386/ilp32/x86-64-sse4_1-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-sse4_2.d: Likewise.
	* gas/i386/ilp32/x86-64-sse4_2-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-sse-check.d: Likewise.
	* gas/i386/ilp32/x86-64-sse-check-none.d: Likewise.
	* gas/i386/ilp32/x86-64-sse-check-warn.d: Likewise.
	* gas/i386/ilp32/x86-64-sse-noavx.d: Likewise.
	* gas/i386/ilp32/x86-64-ssse3.d: Likewise.
	* gas/i386/ilp32/x86-64-stack.d: Likewise.
	* gas/i386/ilp32/x86-64-stack-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-stack-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-unwind.d: Likewise.
	* gas/i386/ilp32/x86-64-vmx.d: Likewise.
	* gas/i386/ilp32/x86-64-xsave.d: Likewise.
	* gas/i386/ilp32/x86-64-xsave-intel.d: Likewise.

ld/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* emulparams/elf32_x86_64.sh: New.

	* configure.tgt (targ64_extra_emuls): Add elf32_x86_64 for
	i[3-7]86-*-linux-*.
	(targ_extra_libpath): Likewise.
	(targ_extra_emuls): Add elf32_x86_64 for x86_64-*-linux-*.
	(targ_extra_libpath): Likewise.

	* Makefile.am (ALL_64_EMULATION_SOURCES): Add eelf32_x86_64.c.
	(eelf32_x86_64.c): New.
	* Makefile.in: Regenerated.

opcodes/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Support bfd_mach_x64_32 and
	bfd_mach_x64_32_intel_syntax.
2010-12-31 00:33:36 +00:00
Alan Modra
9203b09a4b Add sparc64-rtems. 2010-11-30 01:14:08 +00:00
Richard Henderson
c518ddd883 Select 32-bit pei for 64-bit pei configurations. 2010-09-02 22:54:44 +00:00
Alan Modra
360cfc9c8b remove maxq-coff port 2010-06-29 04:17:34 +00:00
Nick Clifton
8e45593ff3 2010-05-21 Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers  <joseph@codesourcery.com>
            Andrew Stubbs  <ams@codesourcery.com>

        bfd/
        * config.bfd (sh-*-uclinux* | sh[12]-*-uclinux*): Add
        bfd_elf32_shl_vec, and FDPIC vectors to targ_selvecs.
        * configure.in: Handle FDPIC vectors.
        * elf32-sh-relocs.h: Add FDPIC and movi20 relocations.
        * elf32-sh.c (DEFAULT_STACK_SIZE): Define.
        (SYMBOL_FUNCDESC_LOCAL): Define.  Use it instead of
        SYMBOL_REFERENCES_LOCAL for function descriptors.
        (fdpic_object_p): New.
        (sh_reloc_map): Add FDPIC and movi20 relocations.
        (sh_elf_info_to_howto, sh_elf_relocate_section): Handle new invalid
        range.
        (struct elf_sh_plt_info): Add got20 and short_plt.  Update all
        definitions.
        (FDPIC_PLT_ENTRY_SIZE, FDPIC_PLT_LAZY_OFFSET): Define.
        (fdpic_sh_plt_entry_be, fdpic_sh_plt_entry_le, fdpic_sh_plts): New.
        (FDPIC_SH2A_PLT_ENTRY_SIZE, FDPIC_SH2A_PLT_LAZY_OFFSET): Define.
        (fdpic_sh2a_plt_entry_be, fdpic_sh2a_plt_entry_le)
        (fdpic_sh2a_short_plt_be, fdpic_sh2a_short_plt_le, fdpic_sh2a_plts):
        New.
        (get_plt_info): Handle FDPIC.
        (MAX_SHORT_PLT): Define.
        (get_plt_index, get_plt_offset): Handle short_plt.
        (union gotref): New.
        (struct elf_sh_link_hash_entry): Add funcdesc, rename tls_type to
        got_type and adjust all uses.  Add GOT_FUNCDESC.
        (struct sh_elf_obj_tdata): Add local_funcdesc.  Rename
        local_got_tls_type to local_got_type.
        (sh_elf_local_got_type): Renamed from sh_elf_local_got_tls_type.  All
        users changed.
        (sh_elf_local_funcdesc): Define.
        (struct elf_sh_link_hash_table): Add sfuncdesc, srelfuncdesc, fdpic_p,
        and srofixup.
        (sh_elf_link_hash_newfunc): Initialize new fields.
        (sh_elf_link_hash_table_create): Set fdpic_p.
        (sh_elf_omit_section_dynsym): New.
        (create_got_section): Create .got.funcdesc, .rela.got.funcdesc
        and .rofixup.
        (allocate_dynrelocs): Allocate local function descriptors and space
        for R_SH_FUNCDESC-related relocations, and for rofixups.
        Handle GOT_FUNCDESC.  Create fixups.  Handle GOT entries which
        require function descriptors.
        (sh_elf_always_size_sections): Handle PT_GNU_STACK and __stacksize.
        (sh_elf_modify_program_headers): New.
        (sh_elf_size_dynamic_sections): Allocate function descriptors for
        local symbols.  Allocate .got.funcdesc contents.  Allocate rofixups.
        Handle local GOT entries of type GOT_FUNCDESC.  Create fixups for
        local GOT entries.  Ensure that FDPIC libraries always have a PLTGOT
        entry in the .dynamic section.
        (sh_elf_add_dyn_reloc, sh_elf_got_offset, sh_elf_initialize_funcdesc)
        (sh_elf_add_rofixup, sh_elf_osec_to_segment)
        (sh_elf_osec_readonly_p, install_movi20_field): New functions.
        (sh_elf_relocate_section): Handle new relocations, R_SH_FUNCDESC,
        R_SH_GOTFUNCDESC and R_SH_GOTOFFFUNCDESC.  Use sh_elf_got_offset
        and .got.plt throughout to find _GLOBAL_OFFSET_TABLE_.  Add rofixup
        read-only section warnings.  Handle undefined weak symbols.  Generate
        fixups for R_SH_DIR32 and GOT entries.  Check for cross-segment
        relocations and clear EF_SH_PIC.  Handle 20-bit relocations.
        Always generate R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
        (sh_elf_gc_sweep_hook): Handle R_SH_FUNCDESC, R_SH_GOTOFF20,
        R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20, and R_SH_GOTOFFFUNCDESC.
        Handle 20-bit relocations.
        (sh_elf_copy_indirect_symbol): Copy function descriptor reference
        counts.
        (sh_elf_check_relocs): Handle new relocations.  Make symbols
        dynamic for FDPIC relocs.  Account for rofixups.  Error for FDPIC
        symbol mismatches.  Allocate a GOT for R_SH_DIR32. Allocate fixups
        for R_SH_DIR32.
        (sh_elf_copy_private_data): Copy PT_GNU_STACK size.
        (sh_elf_merge_private_data): Copy initial flags.  Do not clobber
        non-mach flags.  Set EF_SH_PIC for FDPIC.  Reject FDPIC mismatches.
        (sh_elf_finish_dynamic_symbol): Do not handle got_funcdesc entries
        here.  Rename sgot to sgotplt and srel to srelplt.  Handle short_plt,
        FDPIC descriptors, and got20.  Create R_SH_FUNCDESC_VALUE for FDPIC.
        Use install_movi20_field.  Rename srel to srelgot.  Always generate
        R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
        (sh_elf_finish_dynamic_sections): Fill in the GOT pointer in rofixup.
        Do not fill in reserved GOT entries for FDPIC.  Correct DT_PLTGOT.
        Rename sgot to sgotplt.  Assert that the right number of rofixups
        and dynamic relocations were allocated.
        (sh_elf_use_relative_eh_frame, sh_elf_encode_eh_address): New.
        (elf_backend_omit_section_dynsym): Use sh_elf_omit_section_dynsym.
        (elf_backend_can_make_relative_eh_frame)
        (elf_backend_can_make_lsda_relative_eh_frame)
        (elf_backend_encode_eh_address): Define.
        (TARGET_BIG_SYM, TARGET_BIG_NAME, TARGET_LITTLE_SYM)
        (TARGET_LITTLE_NAME, elf_backend_modify_program_headers, elf32_bed):
        Redefine for FDPIC vector.
        * reloc.c: Add SH FDPIC and movi20 relocations.
        * targets.c (_bfd_target_vector): Add FDPIC vectors.
        * configure, bfd-in2.h, libbfd.h: Regenerated.

        binutils/
        * readelf.c (get_machine_flags): Handle EF_SH_PIC and EF_SH_FDPIC.

        gas/
        * config/tc-sh.c (sh_fdpic): New.
        (sh_check_fixup): Handle relocations on movi20.
        (parse_exp): Do not reject PIC operators here.
        (build_Mytes): Check for unhandled PIC operators here.  Use
        sh_check_fixup for movi20.
        (enum options): Add OPTION_FDPIC.
        (md_longopts, md_parse_option, md_show_usage): Add --fdpic.
        (sh_fix_adjustable, md_apply_fix): Handle FDPIC and movi20 relocations.
        (sh_elf_final_processing): Handle --fdpic.
        (sh_uclinux_target_format): New.
        (sh_parse_name): Handle FDPIC relocation operators.
        * config/tc-sh.h (TARGET_FORMAT): Define specially for TE_UCLINUX.
        (sh_uclinux_target_format): Declare for TE_UCLINUX.
        * configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): Set
        em=uclinux.
        * doc/c-sh.texi (SH Options): Document --fdpic.

        gas/testsuite/
        * gas/sh/basic.exp: Run new tests.  Handle uClinux like Linux.
        * gas/sh/fdpic.d: New file.
        * gas/sh/fdpic.s: New file.
        * gas/sh/reg-prefix.d: Force big-endian.
        * gas/sh/sh2a-pic.d: New file.
        * gas/sh/sh2a-pic.s: New file.
        * lib/gas-defs.exp (is_elf_format): Include sh*-*-uclinux*.

        include/elf/
        * sh.h (EF_SH_PIC, EF_SH_FDPIC): Define.
        (R_SH_FIRST_INVALID_RELOC_6, R_SH_LAST_INVALID_RELOC_6): New.  Adjust
        other invalid ranges.
        (R_SH_GOT20, R_SH_GOTOFF20, R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20)
        (R_SH_GOTOFFFUNCDESC, R_SH_GOTOFFFUNCDESC20, R_SH_FUNCDESC)
        (R_SH_FUNCDESC_VALUE): New.

        ld/
        * Makefile.am (ALL_EMULATIONS): Add eshelf_fd.o and eshlelf_fd.o.
        (eshelf_fd.c, eshlelf_fd.c): New rules.
        * Makefile.in: Regenerate.
        * configure.tgt (sh-*-uclinux*): Add shelf_fd and shlelf_fd
        emulations.
        * emulparams/shelf_fd.sh: New file.
        * emulparams/shlelf_fd.sh: New file.
        * emulparams/shlelf_linux.sh: Update comment.

        ld/testsuite/
        * ld-sh/sh.exp: Handle uClinux like Linux.
        * lib/ld-lib.exp (is_elf_format): Include sh*-*-uclinux*.
        * ld-sh/fdpic-funcdesc-shared.d: New file.
        * ld-sh/fdpic-funcdesc-shared.s: New file.
        * ld-sh/fdpic-funcdesc-static.d: New file.
        * ld-sh/fdpic-funcdesc-static.s: New file.
        * ld-sh/fdpic-gotfuncdesc-shared.d: New file.
        * ld-sh/fdpic-gotfuncdesc-shared.s: New file.
        * ld-sh/fdpic-gotfuncdesc-static.d: New file.
        * ld-sh/fdpic-gotfuncdesc-static.s: New file.
        * ld-sh/fdpic-gotfuncdesci20-shared.d: New file.
        * ld-sh/fdpic-gotfuncdesci20-shared.s: New file.
        * ld-sh/fdpic-gotfuncdesci20-static.d: New file.
        * ld-sh/fdpic-gotfuncdesci20-static.s: New file.
        * ld-sh/fdpic-goti20-shared.d: New file.
        * ld-sh/fdpic-goti20-shared.s: New file.
        * ld-sh/fdpic-goti20-static.d: New file.
        * ld-sh/fdpic-goti20-static.s: New file.
        * ld-sh/fdpic-gotofffuncdesc-shared.d: New file.
        * ld-sh/fdpic-gotofffuncdesc-shared.s: New file.
        * ld-sh/fdpic-gotofffuncdesc-static.d: New file.
        * ld-sh/fdpic-gotofffuncdesc-static.s: New file.
        * ld-sh/fdpic-gotofffuncdesci20-shared.d: New file.
        * ld-sh/fdpic-gotofffuncdesci20-shared.s: New file.
        * ld-sh/fdpic-gotofffuncdesci20-static.d: New file.
        * ld-sh/fdpic-gotofffuncdesci20-static.s: New file.
        * ld-sh/fdpic-gotoffi20-shared.d: New file.
        * ld-sh/fdpic-gotoffi20-shared.s: New file.
        * ld-sh/fdpic-gotoffi20-static.d: New file.
        * ld-sh/fdpic-gotoffi20-static.s: New file.
        * ld-sh/fdpic-plt-be.d: New file.
        * ld-sh/fdpic-plt-le.d: New file.
        * ld-sh/fdpic-plt.s: New file.
        * ld-sh/fdpic-plti20-be.d: New file.
        * ld-sh/fdpic-plti20-le.d: New file.
        * ld-sh/fdpic-stack-default.d: New file.
        * ld-sh/fdpic-stack-size.d: New file.
        * ld-sh/fdpic-stack.s: New file.
2010-05-25 14:12:43 +00:00
Tristan Gingold
8b351884bb 2010-04-14 Tristan Gingold <gingold@adacore.com>
* emulparams/alphavms.sh: New file.
	* emultempl/vms.em: New file.
	* scripttempl/alphavms.sc: New file.
	* configure.tgt (alpha*-*-*vms*): Added.
	* Makefile.am (ALL_EMULATIONS): Add ealphavms.o
	(ealphavms.c): New target.
	* Makefile.in: Regenerate.
2010-04-14 09:27:27 +00:00
Joseph Myers
40b365969f bfd:
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
	(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
	(BFD32_BACKENDS): Add elf32-tic6x.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
	* Makefile.in: Regenerate.
	* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
	(bfd_archures_list): Update.
	* config.bfd (tic6x-*-elf): New.
	* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
	New.
	* configure: Regenerate.
	* cpu-tic6x.c, elf32-tic6x.c: New.
	* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
	BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
	BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
	BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
	BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
	BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
	BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
	BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
	BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
	BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
	BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
	BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
	BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
	* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
	(_bfd_target_vector): Update.
	* bfd-in2.h, libbfd.h: Regenerate.

binutils:
	* MAINTAINERS: Add self as TI C6X maintainer.
	* NEWS: Add news entry for TI C6X support.
	* readelf.c: Include elf/tic6x.h.
	(guess_is_rela): Handle EM_TI_C6000.
	(dump_relocations): Likewise.
	(get_tic6x_dynamic_type): New.
	(get_dynamic_type): Call it.
	(get_machine_flags): Handle EF_C6000_REL.
	(get_osabi_name): Handle machine-specific values only for relevant
	machines.  Handle C6X values.
	(get_tic6x_segment_type): New.
	(get_segment_type): Call it.
	(get_tic6x_section_type_name): New.
	(get_section_type_name): Call it.
	(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
	EM_TI_C6000.

gas:
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
	(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
	* Makefile.in: Regenerate.
	* NEWS: Add news entry for TI C6X support.
	* app.c (do_scrub_chars): Handle "||^" for TI C6X.  Handle
	TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR.  Keep spaces in
	operands if TC_KEEP_OPERAND_SPACES.
	* configure.tgt (tic6x-*-*): New.
	* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
	TC_PREDICATE_END_CHAR): Define.
	* config/tc-tic6x.c, config/tc-tic6x.h: New.
	* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TIC6X): Define.
	* doc/as.texinfo: Add TI C6X documentation.  Include c-tic6x.texi.
	* doc/c-tic6x.texi: New.

gas/testsuite:
	* gas/tic6x: New directory and testcases.

include:
	* dis-asm.h (print_insn_tic6x): Declare.

include/elf:
	* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
	* tic6x.h: New.

include/opcode:
	* tic6x-control-registers.h, tic6x-insn-formats.h,
	tic6x-opcode-table.h, tic6x.h: New.

ld:
	* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
	eelf32_tic6x_le.o.
	(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
	* NEWS: Add news entry for TI C6X support.
	* configure.tgt (tic6x-*-*): New.
	* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.

ld/testsuite:
	* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
	* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
	* ld-tic6x: New directory and testcases.

opcodes:
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	* Makefile.in: Regenerate.
	* configure.in (bfd_tic6x_arch): New.
	* configure: Regenerate.
	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	(disassembler): Handle TI C6X.
	* tic6x-dis.c: New.
2010-03-25 21:12:36 +00:00
Rainer Orth
a6cc6b3bc4 ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_sparc_sol2.o,
	eelf_i386_sol2.o.
	(ALL_64_EMULATIONS): Add eelf_x86_64_sol2.o, eelf64_sparc_sol2.o.
	(eelf32_sparc_sol2.c): New rule.
	(eelf64_sparc_sol2.c): Likewise.
	(eelf_x86_64_sol2.c): Likewise.
	(eelf_i386_sol2.c): Likewise.
	* Makefile.in: Regenerate.
	* configure.tgt (i[3-7]86-*-solaris2*): Change targ_emul to
	elf_i386_sol2.
	Add elf_i386_ldso, elf_x86_64_sol2 to targ_extra_emuls.
	(x86_64-*-solaris2*): Change targ_emul to elf_x86_64_sol2.
	Add elf_x86_64, elf_i386_sol2, elf_i386 to targ_extra_emuls.
	(sparc-*-solaris2.[0-6]*): Change targ_emul to elf32_sparc_sol2.
	Add target_extra_emuls.
	(sparc-*-solaris2*): Change targ_emul to elf32_sparc_sol2.
	Add elf32_sparc, elf64_sparc_sol2 to targ_extra_emuls.
	(sparcv9-*-solaris2*): Change targ_emul to elf64_sparc_sol2.
	Add elf64_sparc, elf32_sparc_sol2 to target_extra_emuls.
	* emulparams/elf32_sparc_sol2.sh: New file.
	* emulparams/elf64_sparc_sol2.sh: New file.
	* emulparams/elf_i386_sol2.sh: New file.
	* emulparams/elf_x86_64_sol2.sh: New file.
	* emultempl/solaris2.em: New file.

	bfd:
	* elflink.c (bfd_elf_size_dynamic_sections): Don't emit base
	version twice.
	Skip it when constructing def.vd_next.

	* elf32-i386.c (TARGET_LITTLE_SYM): Redefine to
	bfd_elf32_i386_sol2_vec.
	(TARGET_LITTLE_NAME): Redefine to elf32-i386-sol2.
	(elf32_bed): Redefine to elf32_i386_sol2_bed.
	(elf_backend_want_plt_sym): Redefine to 1.

	* elf64-x86-64.c (TARGET_LITTLE_SYM): Redefine to
	bfd_elf64_x86_64_sol2_vec.
	(TARGET_LITTLE_NAME): Redefine to elf64-x86-64-sol2.
	(elf64_bed): Redefine to elf64_x86_64_sol2_bed.
	(elf_backend_want_plt_sym): Redefine to 1.

	* config.bfd (i[3-7]86-*-solaris2*): Set targ_defvec to
	bfd_elf32_i386_sol2_vec.
	Replace bfd_elf64_x86_64_vec by bfd_elf64_x86_64_sol2_vec in
	targ64_selvecs.
	(x86_64-*-solaris2*): Set targ_defvec to bfd_elf32_i386_sol2_vec.
	Replace bfd_elf64_x86_64_vec by bfd_elf64_x86_64_sol2_vec in
	targ_selvecs.

	* configure.in: Handle bfd_elf32_i386_sol2_vec,
	bfd_elf64_x86_64_sol2_vec.
	* configure: Regenerate.

	* targets.c (bfd_elf32_i386_sol2_vec): Declare.
	(bfd_elf64_x86_64_sol2_vec): Declare.
	(_bfd_target_vector): Add bfd_elf32_i386_sol2_vec,
	bfd_elf64_x86_64_sol2_vec.
2010-03-05 19:49:00 +00:00
Nick Clifton
c7927a3c0e bfd
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
        (ALL_MACHINES_CFILES): Add cpu-rx.c.
        (BFD32_BACKENDS): Add elf32-rx.lo.
        (BFD32_BACKENDS_CFILES): Add elf32-rx.c.
        * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
        Export bfd_rx_arch.
        (bfd_archures_list): Add bfd_rx_arch.
        * config.bfd: Add entry for rx-*-elf.
        * configure.in: Add entries for bfd_elf32_rx_le_vec and
        bfd_elf32_rx_be_vec.
        * reloc.c: Add RX relocations.
        * targets.c: Add RX target vectors.
        * Makefile.in: Regenerate.
        * bfd-in2.h: Regenerate.
        * configure: Regenerate.
        * libbfd.h: Regenerate.
        * cpu-rx.c: New file.
        * elf32-rx.c: New file.

binutils
        * readelf.c: Add support for RX target.
        * MAINTAINERS: Add DJ and NickC as maintainers for RX.

gas
        * Makefile.am: Add RX target.
        * configure.in: Likewise.
        * configure.tgt: Likewise.
        * read.c (do_repeat_with_expander): New function.
        * read.h: Provide a prototype for do_repeat_with_expander.
        * doc/Makefile.am: Add RX target documentation.
        * doc/all.texi: Likewise.
        * doc/as.texinfo: Likewise.
        * Makefile.in: Regenerate.
        * NEWS: Mention support for RX architecture.
        * configure: Regenerate.
        * doc/Makefile.in: Regenerate.
        * config/rx-defs.h: New file.
        * config/rx-parse.y: New file.
        * config/tc-rx.h: New file.
        * config/tc-rx.c: New file.
        * doc/c-rx.texi: New file.

gas/testsuite
        * gas/rx: New directory.
        * gas/rx/*: New set of test cases.
        * gas/elf/section2.e-rx: New expected output file.
        * gas/all/gas.exp: Add support for RX target.
        * gas/elf/elf.exp: Likewise.
        * gas/lns/lns.exp: Likewise.
        * gas/macros/macros.exp: Likewise.

include
        * dis-asm.h: Add prototype for print_insn_rx.

include/elf
        * rx.h: New file.

include/opcode
        * rx.h: New file.

ld
        * Makefile.am: Add rules to build RX emulation.
        * configure.tgt: Likewise.
        * NEWS: Mention support for RX architecture.
        * Makefile.in: Regenerate.
        * emulparams/elf32rx.sh: New file.
        * emultempl/rxelf.em: New file.

opcodes
        * Makefile.am: Add RX files.
        * configure.in: Add support for RX target.
        * disassemble.c: Likewise.
        * Makefile.in: Regenerate.
        * configure: Regenerate.
        * opc2c.c: New file.
        * rx-decode.c: New file.
        * rx-decode.opc: New file.
        * rx-dis.c: New file.
2009-09-29 14:17:19 +00:00
Nick Clifton
7ba29e2a41 Add support for Xilinx MicroBlaze processor.
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
        * bfd/Makefile.in: Same.
        * bfd/archures.c: Add bfd_arch_microblaze.
        * bfd/bfd-in2.h: Regenerate.
        * bfd/config.bfd: Add microblaze target.
        * bfd/configure: Add bfd_elf32_microblaze_vec target.
        * bfd/configure.in: Same.
        * bfd/cpu-microblaze.c: New.
        * bfd/elf32-microblaze.c: New.
        * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
        * bfd/libbfd.h: Regenerate.
        * bfd/reloc.c: Add MICROBLAZE relocations.
        * bfd/section.c: Add struct relax_table and relax_count to section.
        * bfd/targets.c: Add bfd_elf32_microblaze_vec.
        * binutils/MAINTAINERS: Add self as maintainer.
        * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
        EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
        get_machine_name().
        * config.sub: Add microblaze target.
        * configure: Same.
        * configure.ac: Same.
        * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
        TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
        DEP_microblaze_elf target.
        * gas/Makefile.in: Same.
        * gas/config/tc-microblaze.c: Add MicroBlaze assembler.
        * gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
        * gas/configure: Add microblaze target.
        * gas/configure.in: Same.
        * gas/configure.tgt: Same.
        * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
        * gas/doc/Makefile.in: Same.
        * gas/doc/all.texi: Set MICROBLAZE.
        * gas/doc/as.texinfo: Add MicroBlaze doc links.
        * gas/doc/c-microblaze.texi: New MicroBlaze docs.
        * include/dis-asm.h: Decl print_insn_microblaze().
        * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
        * include/elf/microblaze.h: New reloc definitions.
        * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
        ALL_EMULATIONS, targets.
        * ld/Makefile.in: Same.
        * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
        * ld/emulparams/elf32mb_linux.sh: New.
        * ld/emulparams/elf32microblaze.sh. New.
        * ld/scripttempl/elfmicroblaze.sc: New.
        * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
        CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
        * opcodes/Makefile.in: Same.
        * opcodes/configure: Add bfd_microblaze_arch target.
        * opcodes/configure.in: Same.
        * opcodes/disassemble.c: Define ARCH_microblaze, return
        print_insn_microblaze().
        * opcodes/microblaze-dis.c: New MicroBlaze disassembler.
        * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
        * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
H.J. Lu
8a9036a406 bfd/
2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* archures.c (bfd_architecture): Add bfd_arch_l1om.
	(bfd_l1om_arch): New.
	(bfd_archures_list): Add &bfd_l1om_arch.
	* bfd-in2.h: Regenerated.

	* config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if
	bfd_elf64_x86_64_vec is supported.  Add bfd_elf64_l1om_freebsd_vec
	if bfd_elf64_x86_64_freebsd_vec is supported.
	(targ_selvecs): Likewise.

	* configure.in: Support bfd_elf64_l1om_vec and
	bfd_elf64_l1om_freebsd_vec.
	* configure: Regenerated.

	* cpu-l1om.c: New.

	* elf64-x86-64.c (elf64_l1om_elf_object_p): New.
	(bfd_elf64_l1om_vec): Likewise.
	(bfd_elf64_l1om_freebsd_vec): Likewise.

	* Makefile.am (ALL_MACHINES): Add cpu-l1om.lo.
	(ALL_MACHINES_CFILES): Add cpu-l1om.c.
	* Makefile.in: Regenerated.

	* targets.c (bfd_elf64_l1om_vec): New.
	(bfd_elf64_l1om_freebsd_vec): Likewise.
	(_bfd_target_vector): Add bfd_elf64_l1om_vec and
	bfd_elf64_l1om_freebsd_vec.

binutils/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* readelf.c (guess_is_rela): Handle EM_L1OM.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(get_section_type_name): Likewise.
	(get_elf_section_flags): Likewise.
	(get_symbol_index_type): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_32bit_pcrel_reloc): Likewise.
	(is_64bit_abs_reloc): Likewise.
	(is_64bit_pcrel_reloc): Likewise.
	(is_none_reloc): Likewise.

gas/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add l1om.
	(check_cpu_arch_compatible): New.
	(set_cpu_arch): Use it.
	(i386_arch): New.
	(i386_mach): Return bfd_mach_l1om for Intel L1OM.
	(md_show_usage): Display l1om.
	(i386_target_format): Return ELF_TARGET_L1OM_FORMAT if
	cpu_arch_isa_flags.bitfield.cpul1om is set.

	* config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()).
	(i386_arch): New.
	(ELF_TARGET_L1OM_FORMAT): Likewise.

	* doc/c-i386.texi: Document l1om.

gas/testsuite/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/l1om.d: New.
	* gas/i386/l1om-inval.l: Likewise.
	* gas/i386/l1om-inval.s: Likewise.

	* gas/i386/i386.exp: Run l1om-inval and l1om.

include/elf/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* common.h (EM_L1OM): New.

ld/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64
	is supported.  Add elf_l1om_fbsd if elf_x86_64_fbsd is supported.
	(targ_extra_emuls): Likewise.

	* Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and
	eelf_l1om_fbsd.o
	(eelf_l1om.c): New.
	(eelf_l1om_fbsd.c): Likewise.
	* Makefile.in: Regenerated.

	* emulparams/elf_l1om.sh: New.
	* emulparams/elf_l1om_fbsd.sh: Likewise.

ld/testsuite/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/abs-l1om.d: New.
	* ld-x86-64/protected2-l1om.d: Likewise.
	* ld-x86-64/protected3-l1om.d: Likewise.

	* ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and
	protected3-l1om.

opcodes/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in: Handle bfd_l1om_arch.
	* disassemble.c (disassembler): Likewise.

	* configure: Regenerated.

	* i386-dis.c (print_insn): Handle bfd_mach_l1om and
	bfd_mach_l1om_intel_syntax.  Use 8 bytes per line for Intel L1OM.

	* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
	Add CPU_L1OM_FLAGS.
	(cpu_flags): Add CpuL1OM.
	(set_bitfield): Take an argument to set the value field.
	(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
	(process_i386_opcode_modifier): Updated.
	(process_i386_operand_type): Likewise.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

	* i386-opc.h (CpuL1OM): New.
	(CpuXsave): Updated.
	(i386_cpu_flags): Add cpul1om.
2009-07-25 14:58:58 +00:00
Dave Korn
361dff7384 2009-06-18 Dave Korn <dave.korn.cygwin@gmail.com>
Merge cegcc and mingw32ce target name changes from CeGCC project,
replacing "arm-*-" by "arm*-*-" where needed.

  2008-09-24  Pedro Alves  <pedroalves@users.sourceforge.net>

	ld/
	* configure.tgt (arm*-*-cegcc*): Set LIB_PATH to
	${tooldir}/lib/w32api.

  2007-12-25  Pedro Alves  <pedro_alves@portugalmail.pt>

	bfd/
	* config.bfd: Add arm*-*-cegcc* target.

  2007-12-25  Pedro Alves  <pedro_alves@portugalmail.pt>

	binutils/
	* configure.in: Add arm*-*-cegcc* and arm*-*-mingw32ce* targets.
	* configure: Regenerate.

  2007-12-25  Pedro Alves  <pedro_alves@portugalmail.pt>

	gas/
	* configure.tgt: Add arm*-*-cegcc* target.

  2007-12-25  Pedro Alves  <pedro_alves@portugalmail.pt>

	ld/
	* configure.tgt: Add arm*-*-cegcc* target.

  2007-12-17  Pedro Alves  <pedro_alves@portugalmail.pt>

	bfd/
	* config.bfd: Add arm-*-mingw32ce* target.

  2007-12-17  Pedro Alves  <pedro_alves@portugalmail.pt>

	gas/
	* configure.tgt: Add arm-*-mingw32ce* target.

  2007-12-17  Pedro Alves  <pedro_alves@portugalmail.pt>

	ld/
	* configure.tgt: Add arm-*-mingw32ce* target.
2009-06-18 02:11:03 +00:00
Nick Clifton
20135e4cea Add new binutils target: moxie 2009-04-16 15:39:48 +00:00
Richard Sandiford
e52315924b bfd/
* config.bfd: Treat AIX 6+ in the same way as AIX 5.
	* configure.in: Likewise.
	* configure: Regenerate.

binutils/
	* configure.tgt: Extend AIX 5 behavior to AIX 6 and above.
	* configure.in: Likewise.
	* configure: Regenerate.

gas/
	* configure.tgt: Extend AIX 5 behavior to AIX 6 and above.
	* configure.in: Likewise.
	* configure: Regenerate.

ld/
	* configure.tgt: Extend AIX 5 behavior to AIX 6 and above.
2009-03-14 09:11:38 +00:00
Nick Clifton
c3b7224ae4 Add support for Score7 architecture. 2009-03-02 10:33:08 +00:00
Dave Anglin
d1bbb13a63 * configure.tgt: Only use elf64hppa target emulation for hpux.
* emulparams/elf64hppa.sh: Don't include hppa64linux.sh.
	(SCRIPT_NAME): Use new script elf64hppa.
	(SCRIPT_NAME, ELFSIZE, NO_REL_RELOCS, ARCH, MACHINE, ENTRY,
	TEMPLATE_NAME, GENERATE_SHLIB_SCRIPT, OTHER_READONLY_SECTIONS,
	OTHER_READWRITE_SECTIONS, OTHER_BSS_SECTIONS, OTHER_GOT_RELOC_SECTIONS,
	DATA_START_SYMBOLS, OTHER_SYMBOLS, DATA_PLT, PLT_BEFORE_GOT,
	TEXT_DYNAMIC): Define.
	* emulparams/hppa64linux.sh: Adjust comments.
	* scripttempl/elf64hppa.sc: New file.
2009-03-01 22:10:36 +00:00
Nick Clifton
84e94c9023 Add LM32 port. 2008-12-23 19:10:25 +00:00
Ulrich Weigand
d7b99e76e2 * configure.tgt [spu-*-elf*]: Set NATIVE_LIB_DIRS to '/lib'. 2008-11-17 20:11:48 +00:00
Nick Clifton
8a2a2dbb65 Add m32c-*-rtems* and m32r-*-rtems* configuration targets. 2008-11-06 15:36:38 +00:00
Eric B. Weddington
7b21ac3f45 Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
	* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
	bfd_mach_avr51): New.
	* bfd-in2.h: Regenerate.
	* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
	architectures. Change comments to match architecture comments in GCC.
	(compatible): Add test for new AVR architectures.
	* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
	bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
	(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.

gas/
	* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
	architectures. Reorganize list to put mcu types in correct architectures
	and to order list same as in GCC. Use new ISA definitions in
	include/opcode/avr.h.
	* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
	descriptions. Reorganize descriptions to put mcu types in correct
	architectures and to order lists same as in GCC.

include/
	* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
	(EF_AVR_MACH): Redefine to 0x7F.
	* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
	(AVR_ISA_AVR3): Redefine.
	(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
	AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
	AVR_ISA_AVR6): Define.

ld/
	* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
	and eavr51.o.
	Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
	* Makefile.in: Regenerate.
	* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
	and avr51.
	* emulparams/avr25.sh: New file.
	* emulparams/avr31.sh: New file.
	* emulparams/avr35.sh: New file.
	* emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
Mike Frysinger
bec9537ec1 2008-04-25 Michael Frysinger <vapier@gentoo.org>
* configure.tgt (bfin-*-linux-uclibc*): Set targ_emul to elf32bfinfd
	and targ_extra_emuls to elf32bfin.
2008-04-26 01:10:55 +00:00
Bob Wilson
f8a52b5923 2008-01-31 Marc Gauthier <marc@tensilica.com>
bfd/
	* config.bfd (xtensa*-*-*): Recognize processor variants.
gas/
	* configure.tgt (xtensa*-*-*): Recognize processor variants.
gas/testsuite/
	* gas/all/gas.exp: Recognize Xtensa processor variants.
	* gas/elf/elf.exp: Likewise.
	* gas/lns/lns.exp: Likewise.
ld/
	* configure.tgt (xtensa*-*-*): Recognize processor variants.
ld/testsuite/
	* ld-elf/merge.d: Recognize Xtensa processor variants.
	* ld-xtensa/coalesce.exp: Likewise.
	* ld-xtensa/lcall.exp: Likewise.
2008-02-01 17:58:48 +00:00
Nick Clifton
00b2bfc124 * config.bfd (x86_64-*-solaris2): Add support for this target.
* configure.tgt (x86_64-*-solaris2): Add support for this target.
2008-01-28 16:57:22 +00:00
Nick Clifton
bfff164249 Add MN10300 linker relaxation support for symbol differences 2007-10-19 17:31:31 +00:00
Nick Clifton
0b3e17e93d Add support for i386-dragonfly target. 2007-08-28 11:02:55 +00:00
Nick Clifton
c2c09cab6c * configure.tgt: Add bfin-*rtems*. 2007-08-07 09:32:06 +00:00
Nick Clifton
3d3d428f04 New port: National Semiconductor's CR16 2007-06-29 14:09:34 +00:00
Paul Brook
9fcfe2ed35 2007-04-04 Paul Brook <paul@codesourcery.com>
ld/
	* configure.tgt: Loosen checks for arm uclinux eabi targets.
	gas/
	* configure.tgt: Loosen checks for arm uclinux eabi targets.
2007-04-04 18:02:39 +00:00
Bernd Schmidt
3f2dad243c * configure.tgt (bfin-*-elf, bfin-*-uclinux*): Add targ_extra_libpath.
(bfin-*-linux-uclibc*): New target.
2007-03-19 17:31:31 +00:00
Nathan Sidwell
ed6ba29825 bfd/
* config.bfd (sh-*-uclinux, sh[12]-*-uclinux): New stanza.

	gas/
	* configure.tgt (sh-*-uclinux, sh[12]-*-uclinux): Specify as elf.

	ld/
	* Makefile.am (ALL_EMULATIONS): Add eshelf_uclinux.o
	(eshelf_uclinux.c): New target.
	* Makefile.in: Rebuilt.
	* configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): New stanza.
	* emulparams/shelf_uclinux.sh: New.
2007-02-28 10:53:19 +00:00
Alan Modra
46c3c2015b * configure.tgt: Fix type last change. 2007-02-28 01:39:59 +00:00
Alan Modra
37dc280a2e * configure.tgt (spu-*-elf*): Delete targ_extra_ofiles. 2007-02-28 01:29:58 +00:00
Joseph Myers
919e35ed89 * configure.tgt (mips64*el-*-linux-*, mips64*-*-linux-*,
mips*el-*-linux-*, mips*-*-linux-*): Set
	targ_extra_libpath=$targ_extra_emuls.
2007-02-22 15:05:42 +00:00
H.J. Lu
534d31192c 2007-02-09 H.J. Lu <hongjiu.lu@intel.com>
* configure.in (targ_extra_emuls): Add $targ64_extra_emuls if
	want64 is true.
	(targ_extra_libpath): Add $targ64_extra_libpath if want64 is
	true
	* configure: Regenerated.

	* configure.tgt (targ_extra_libpath): Initialize.
	(targ64_extra_emuls): New. Document. Initialize.
	(targ64_extra_libpath): Likewise.
	(i[3-7]86-*-linux-*): Set targ64_extra_emuls and
	targ64_extra_libpath.
	(powerpc*-*-linux*): Likewise.
	(s390-*-linux*): Likewise.
2007-02-09 18:20:24 +00:00
Paul Brook
7bd1c9613d 2007-02-07 Paul Brook <paul@codesourcery.com>
ld/
	* configure.tgt: Add arm*-*-uclinux-*eabi.
	gas/
	* configure.tgt: Ditto.
2007-02-07 17:06:20 +00:00
Dave Brolley
19d9b7d3f8 Support for Toshiba MeP. 2007-02-05 20:16:32 +00:00
Nick Clifton
42037fe5bb Renamed target x86_64-*-mingw64 to x86_64-*-mingw*. 2007-01-08 17:21:50 +00:00
Nick Clifton
916c46cb42 PR ld/3843
* configure.tgt (x86_64_[k]freebsd*): Add targ_extra_libpath and tdir_elf_i386_fbsd.
2007-01-08 15:38:59 +00:00
Kazu Hirata
ebff6cd5e5 bfd/
* config.bfd: Recognize fido.

gas/
	* configure.tgt: Recognize fido.

ld/
	* configure.tgt: Recognize fido.
2006-12-24 02:48:59 +00:00
Ben Elliston
a6c73b34d0 * configure.tgt (NATIVE_LIB_DIRS): Specify for spu-*-elf*. 2006-12-15 05:49:28 +00:00
Joseph Myers
fffbd2ef6b 2006-10-26 Joseph S. Myers <joseph@codesourcery.com>
Mark Mitchell  <mark@codesourcery.com>

	* configure.tgt (arm*linux*): Support both big- and little-endian.
2006-10-26 12:52:39 +00:00
Alan Modra
e9f5312993 New Cell SPU port. 2006-10-25 06:49:21 +00:00
Joseph Myers
e4818e07f3 * configure.tgt (i[3-7]86-*-linux-*): Also define
targ_extra_libpath in want64 case.
	* emulparams/elf_x86_64.sh: Handle i[3-7]86-*-linux-* the same as
	x86_64*-linux*.
2006-10-18 16:24:01 +00:00
Nick Clifton
99ad839030 Add x86_64-mingw64 target 2006-09-20 11:35:11 +00:00
Thiemo Seufer
6f69307352 * configure.tgt: Add mips*el-sde-elf* and mips*-sde-elf*
configurations.
2006-09-18 13:18:44 +00:00
Nick Clifton
1c0d3aa6ae Add support for Score target. 2006-09-16 23:51:50 +00:00
Nick Clifton
57da97f58c * configure.tgt: Set targ_emul to arm_wince_pe for ARM Windows CE targets. 2006-08-22 11:50:33 +00:00
Richard Sandiford
55e6e39790 bfd/
2006-08-02  Richard Sandiford  <richard@codesourcery.com>
	    Kazu Hirata  <kazu@codesourcery.com>
	    Phil Edwards  <phil@codesourcery.com>
	    Nathan Sidwell  <nathan@codesourcery.com>

	* config.bfd (sh-*-vxworks): Use bfd_elf32_shvxworks_vec and
	bfd_elf32_shlvxworks_vec.
	* configure.in (bfd_elf32_sh64_vec): Add elf-vxworks.lo.
	(bfd_elf32_sh64l_vec, bfd_elf32_sh64lin_vec): Likewise.
	(bfd_elf32_sh64blin_vec, bfd_elf32_sh64lnbsd_vec): Likewise.
	(bfd_elf32_sh64nbsd_vec, bfd_elf32_sh_vec): Likewise.
	(bfd_elf32_shblin_vec, bfd_elf32_shl_vec): Likewise.
	(bfd_elf32_shl_symbian_vec, bfd_elf32_shlin_vec): Likewise.
	(bfd_elf32_shlnbsd_vec, bfd_elf32_shnbsd_vec): Likewise.
	(bfd_elf32_shlvxworks_vec, bfd_elf32_shvxworks_vec): New stanzas.
	* configure: Regenerate.
	* Makefile.am: Regenerate dependencies.
	* Makefile.in: Regenerate.
	* elf-vxworks.c (elf_vxworks_gott_symbol_p): New function.
	(elf_vxworks_add_symbol_hook): Use it.
	(elf_vxworks_link_output_symbol_hook): Likewise.  Use the hash
	table entry to check for weak undefined symbols and to obtain
	the original bfd.
	(elf_vxworks_emit_relocs): Use target_index instead of this_idx.
	* elf32-sh-relocs.h: New file, split from elf32-sh.c.
	(R_SH_DIR32): Use SH_PARTIAL32 for the partial_inplace field,
	SH_SRC_MASK32 for the src_mask field, and SH_ELF_RELOC for the
	special_function field.
	(R_SH_REL32): Use SH_PARTIAL32 and SH_SRC_MASK32 here too.
	(R_SH_REL32, R_SH_TLS_GD_32, R_SH_TLS_LD_32): Likewise.
	(R_SH_TLS_LDO_32, R_SH_TLS_IE_32, R_SH_TLS_LE_32): Likewise.
	(R_SH_TLS_DTPMOD32, R_SH_TLS_DTPOFF32, R_SH_TLS_TPOFF32): Likewise.
	(R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT): Likewise.
	(R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Likewise.
	(SH_PARTIAL32, SH_SRC_MASK32, SH_ELF_RELOC): Undefine at end of file.
	* elf32-sh.c: Include elf32-vxworks.h.
	(MINUS_ONE): Define.
	(sh_elf_howto_table): Include elf32-sh-relocs.h with SH_PARTIAL32
	set to TRUE, SH_SRC_MASK32 set to 0xffffffff, and SH_ELF_RELOC set
	to sh_elf_reloc.
	(sh_vxworks_howto_table): New variable.  Include elf32-sh-relocs.h
	with SH_PARTIAL32 set to FALSE, SH_SRC_MASK32 set to 0, and
	SH_ELF_RELOC set to bfd_elf_generic_reloc.
	(vxworks_object_p, get_howto_table): New functions.
	(sh_elf_reloc_type_lookup): Fix typo.  Use get_howto_table.
	(sh_elf_info_to_howto): Use get_howto_table.
	(sh_elf_relax_section): Honor the partial_inplace field of the
	R_SH_DIR32 howto.
	(sh_elf_relax_delete_bytes): Likewise.
	(elf_sh_plt_info): New structure.
	(PLT_ENTRY_SIZE): Replace both definitions with...
	(ELF_PLT_ENTRY_SIZE): ...this new macro, with separate definitions for
	INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
	(elf_sh_plt0_entry_be): Update sizes of both definitions accordingly.
	(elf_sh_plt0_entry_le): Likewise.
	(elf_sh_plt_entry_be, elf_sh_plt_entry_le): Likewise.
	(elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le): Likewise.
	(elf_sh_plts): New structure, with separate definitions for
	INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
	(elf_sh_plt0_entry): Delete both definitions.
	(elf_sh_plt_entry, elf_sh_pic_plt_entry): Likewise.
	(elf_sh_sizeof_plt, elf_sh_plt_plt0_offset): Likewise.
	(elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset): Likewise.
	(elf_sh_plt_reloc_offset): Likewise.
	(movi_shori_putval): Delete in favor of...
	(install_plt_field): ...this new function, with separate definitions
	for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
	(get_plt_info): New function, with separate definitions
	for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
	(elf_sh_plt0_linker_offset, elf_sh_plt0_gotid_offset): Delete.
	(VXWORKS_PLT_HEADER_SIZE, VXWORKS_PLT_ENTRY_SIZE): New macros.
	(vxworks_sh_plt0_entry_be, vxworks_sh_plt0_entry_le): New constants.
	(vxworks_sh_plt_entry_be, vxworks_sh_plt_entry_le): Likewise.
	(vxworks_sh_pic_plt_entry_be, vxworks_sh_pic_plt_entry_le): Likewise.
	(get_plt_index, get_plt_offset): New functions.
	(elf_sh_link_hash_table): Add srelplt2, plt_info and vxworks_p fields.
	(sh_elf_link_hash_table_create): Initialize them.
	(sh_elf_create_dynamic_sections): Call
	elf_vxworks_create_dynamic_sections for VxWorks.
	(allocate_dynrelocs): Use htab->plt_info to get the size of PLT
	entries.  Allocate relocation entries in .rela.plt.unloaded if
	generating a VxWorks executable.
	(sh_elf_always_size_sections): New function.
	(sh_elf_size_dynamic_sections): Extend .rela.plt handling to
	.rela.plt.unloaded.
	(sh_elf_relocate_section): Use get_howto_table.  Honor
	partial_inplace when calculating the addend for dynamic
	relocations.  Use get_plt_index.
	(sh_elf_finish_dynamic_symbol): Use get_plt_index, install_plt_field
	and htab->plt_info.  Fill in the bra .plt offset for VxWorks
	executables.  Populate .rela.plt.unloaded.  Do not make
	_GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
	(sh_elf_finish_dynamic_sections): Use install_plt_field and
	htab->plt_info.  Handle cases where there is no special PLT header.
	Populate the first relocation in .rela.plt.unloaded and fix up
	the remaining entries.
	(sh_elf_plt_sym_val): Use get_plt_info.
	(elf_backend_always_size_sections): Define.
	(TARGET_BIG_SYM, TARGET_BIG_NAME): Override for VxWorks.
	(TARGET_LITTLE_SYM, TARGET_BIG_SYM): Likewise.
	(elf32_bed, elf_backend_want_plt_sym): Likewise.
	(elf_symbol_leading_char, elf_backend_want_got_underscore): Likewise.
	(elf_backend_grok_prstatus, elf_backend_grok_psinfo): Likewise.
	(elf_backend_add_symbol_hook): Likewise.
	(elf_backend_link_output_symbol_hook): Likewise.
	(elf_backend_emit_relocs): Likewise.
	(elf_backend_final_write_processing): Likewise.
	(ELF_MAXPAGESIZE, ELF_COMMONPAGESIZE): Likewise.
	* targets.c (bfd_elf32_shlvxworks_vec): Declare.
	(bfd_elf32_shvxworks_vec): Likewise.
	(_bfd_target_vector): Include bfd_elf32_shlvxworks_vec and
	bfd_elf32_shvxworks_vec.

gas/
	* config/tc-sh.c (apply_full_field_fix): New function.
	(md_apply_fix): Use it instead of md_number_to_chars.  Do not fill
	in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
	(tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
	* config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.

ld/
2006-08-02  Richard Sandiford  <richard@codesourcery.com>
	    Kazu Hirata  <kazu@codesourcery.com>
	    Phil Edwards  <phil@codesourcery.com>

	* Makefile.am (ALL_EMULATIONS): Add eshelf_vxworks.o and
	eshlelf_vxworks.o.
	(eshelf_vxworks.c, eshlelf_vxworks.c): New rules.
	* Makefile.in: Regenerate.
	* configure.tgt (sh-*-vxworks): Use shelf_vxworks and
	shlelf_vxworks.
	* emulparams/shelf_vxworks.sh: New file.
	* emulparams/shlelf_vxworks.sh: Likewise.
	* emulparams/vxworks.sh (FINI): Prefix _etext with ${SYMPREFIX}.
	(OTHER_END_SYMBOLS): Likewise _ehdr.
	(DATA_END_SYMBOLS): Likewise _edata.
	* emultempl/vxworks.em (vxworks_after_open): Check whether output_bfd
	is indeed an ELF file before dealing with --force-dynamic.

ld/testsuite/
	* ld-sh/rd-sh.exp: Treat vxworks1-static.d specially.
	* ld-sh/sh-vxworks.exp: New file.
	* ld-sh/sh.exp: Extend sh-linux SIZEOF_HEADERS handling to
	sh-*-vxworks.
	* ld-sh/vxworks1-le.dd, ld-sh/vxworks1-lib-le.dd,
	* ld-sh/vxworks1-lib.dd, ld-sh/vxworks1-lib.nd,
	* ld-sh/vxworks1-lib.rd, ld-sh/vxworks1-lib.s,
	* ld-sh/vxworks1-static.d, ld-sh/vxworks1.dd,
	* ld-sh/vxworks1.ld, ld-sh/vxworks1.rd, ld-sh/vxworks1.s,
	* ld-sh/vxworks2-static.sd, ld-sh/vxworks2.s,
	* ld-sh/vxworks2.sd, ld-sh/vxworks3-le.dd,
	* ld-sh/vxworks3-lib-le.dd, ld-sh/vxworks3-lib.dd,
	* ld-sh/vxworks3-lib.s, ld-sh/vxworks3.dd, ld-sh/vxworks3.s,
	* ld-sh/vxworks4.d, ld-sh/vxworks4a.s, ld-sh/vxworks4b.s,
	* ld-sh/reloc1.s, ld-sh/reloc1.d: New tests.
2006-08-04 13:13:56 +00:00
Daniel Jacobowitz
d19628a59d * configure.tgt (i[3-7]86-*-solaris2*, i[3-7]86-*-solaris*): Correct
typo setting targ_extra_libpath.
2006-07-14 15:26:36 +00:00
Daniel Jacobowitz
0faaaeb8fc * configure.tgt (i[3-7]86-*-solaris2*, i[3-7]86-*-solaris*): Set
targ_extra_libpath.
2006-06-23 18:11:47 +00:00
Nick Clifton
28c9d252b4 Add support for AVR6 family 2006-05-24 07:36:12 +00:00
Richard Sandiford
910600e9c7 bfd/
* config.bfd (sparc-*-vxworks*): New stanza.
	* configure.in (bfd_elf32_sparc_vxworks_vec): New stanza.
	(bfd_elf32_sparc_vec, bfd_elf64_sparc_vec): Add elf-vxworks.lo.
	* configure: Regenerate.
	* elf32-sparc.c: Include elf-vxworks.h.
	(elf32_sparc_vxworks_link_hash_table_create: New.
	(elf32_sparc_vxworks_final_write_processing): New.
	(TARGET_BIG_SYM): Override for VxWorks.
	(TARGET_BIG_NAME, ELF_MINPAGESIZE): Likewise.
	(bfd_elf32_bfd_link_hash_table_create): Likewise.
	(elf_backend_want_got_plt, elf_backend_plt_readonly): Likewise.
	(elf_backend_got_header_size, elf_backend_add_symbol_hook): Likewise.
	(elf_backend_link_output_symbol_hook): Likewise.
	(elf_backend_emit_relocs): Likewise.
	(elf_backend_final_write_processing, elf32_bed): Likewise.
	* elfxx-sparc.c: Include libiberty.h and elf-vxworks.h.
	(sparc_vxworks_exec_plt0_entry, sparc_vxworks_exec_plt_entry): New.
	(sparc_vxworks_shared_plt0_entry, sparc_vxworks_shared_plt_entry): New.
	(_bfd_sparc_elf_link_hash_table_create): Don't initialize
	build_plt_entry here.
	(create_got_section): Initialize sgotplt for VxWorks.
	(_bfd_sparc_elf_create_dynamic_sections): Initialize build_plt_entry,
	plt_header_size and plt_entry_size, with new VxWorks-specific settings.
	Call elf_vxworks_create_dynamic_sections for VxWorks.
	(allocate_dynrelocs): Use plt_header_size and plt_entry_size.
	Allocate room for .got.plt and .rela.plt.unloaded entries on VxWorks.
	(_bfd_sparc_elf_size_dynamic_sections): Don't allocate a nop in .plt
	for VxWorks.  Check for the .got.plt section.
	(sparc_vxworks_build_plt_entry): New function.
	(_bfd_sparc_elf_finish_dynamic_symbol): Add handling of VxWorks PLTs.
	Don't make _GLOBAL_OFFSET_TABLE_ and _PROCEDURE_LINKAGE_TABLE_
	absolute on VxWorks.
	(sparc32_finish_dyn): Add special handling for DT_RELASZ
	and DT_PLTGOT on VxWorks.
	(sparc_vxworks_finish_exec_plt): New.
	(sparc_vxworks_finish_shared_plt): New.
	(_bfd_sparc_elf_finish_dynamic_sections): Call them.
	Use plt_header_size and plt_entry_size.
	* elfxx-sparc.h (_bfd_sparc_elf_link_hash_table): Add is_vxworks,
	srelplt2, sgotplt, plt_header_size and plt_entry_size fields.
	* Makefile.am (elfxx-sparc.lo): Depend on elf-vxworks.h.
	(elf32-sparc.lo): Likewise.
	* Makefile.in: Regenerate.
	* targets.c (bfd_elf32_sparc_vxworks_vec): Declare.
	(_bfd_target_vector): Add a pointer to it.

gas/
	* config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
	(GOTT_BASE, GOTT_INDEX): New.
	(tc_gen_reloc): Don't alter relocations against GOTT_BASE and
	GOTT_INDEX when generating VxWorks PIC.
	* configure.tgt (sparc*-*-vxworks*): Remove this special case;
	use the generic *-*-vxworks* stanza instead.

gas/testsuite/
	* gas/sparc/vxworks-pic.s, gas/sparc/vxworks-pic.d: New test.
	* gas/sparc/sparc.exp: Run it.  Remove sparc*-*-vxworks* XFAILs.

ld/
	* configure.tgt (sparc*-*-vxworks*): New stanza.
	* emulparams/elf32_sparc_vxworks.sh: New file.
	* Makefile.am (ALL_EMULATIONS): Add eelf32_sparc_vxworks.o.
	(eelf32_sparc_vxworks.c): New rule.
	* Makefile.in: Regenerate.

ld/testsuite/
	* ld-sparc/vxworks1.dd, ld-sparc/vxworks1.ld, ld-sparc/vxworks1-lib.dd,
	* ld-sparc/vxworks1-lib.nd, ld-sparc/vxworks1-lib.rd,
	* ld-sparc/vxworks1-lib.s, ld-sparc/vxworks1.rd, ld-sparc/vxworks1.s,
	* ld-sparc/vxworks1-static.d, ld-sparc/vxworks2.s,
	* ld-sparc/vxworks2.sd, ld-sparc/vxworks2-static.sd: New tests.
	* ld-sparc/sparc.exp: Run them.
2006-04-05 12:41:59 +00:00
Bernd Schmidt
753a4ce392 * emulparams/elf32bfinfd.sh: New file.
* emultempl/bfin.em: Delete.
	* emulparams/bfin.sh: Lose reference to bfin.em.
	* Makefile.am (eelf32bfin.c): Likewise.
	(eelf32bfinfd.c): New.
	* Makefile.in: Regenerate.
	* configure.tgt (bfin-*-elf, bfin-*-uclinux): Add elf32bfinfd to
	targ_extra_emuls.
2006-03-26 00:46:13 +00:00
Richard Sandiford
0a44bf6950 Richard Sandiford <richard@codesourcery.com>
Daniel Jacobowitz  <dan@codesourcery.com>
	Phil Edwards  <phil@codesourcery.com>
	Zack Weinberg  <zack@codesourcery.com>
	Mark Mitchell  <mark@codesourcery.com>
	Nathan Sidwell  <nathan@codesourcery.com>

bfd/
	* bfd-in2.h: Regenerate.
	* config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas.
	* configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza.
	(bfd_elf32_littlemips_vxworks_vec): Likewise.
	(bfd_elf32_bigmips_vec): Add elf-vxworks.lo.
	(bfd_elf32_littlemips_vec): Likewise.
	(bfd_elf32_nbigmips_vec): Likewise.
	(bfd_elf32_nlittlemips_vec): Likewise.
	(bfd_elf32_ntradbigmips_vec): Likewise.
	(bfd_elf32_ntradlittlemips_vec): Likewise.
	(bfd_elf32_tradbigmips_vec): Likewise.
	(bfd_elf32_tradlittlemips_vec): Likewise.
	(bfd_elf64_bigmips_vec): Likewise.
	(bfd_elf64_littlemips_vec): Likewise.
	(bfd_elf64_tradbigmips_vec): Likewise.
	(bfd_elf64_tradlittlemips_vec): Likewise.
	* elf32-mips.c: Include elf-vxworks.h.
	(mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto
	instead of calling mips_elf32_rtype_to_howto directly.
	(mips_vxworks_copy_howto_rela): New reloc howto.
	(mips_vxworks_jump_slot_howto_rela): Likewise.
	(mips_vxworks_bfd_reloc_type_lookup): New function.
	(mips_vxworks_rtype_to_howto): Likewise.
	(mips_vxworks_final_write_processing): Likewise.
	(TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks.
	(TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise.
	(elf_backend_want_got_plt): Likewise.
	(elf_backend_want_plt_sym): Likewise.
	(elf_backend_got_symbol_offset): Likewise.
	(elf_backend_want_dynbss): Likewise.
	(elf_backend_may_use_rel_p): Likewise.
	(elf_backend_may_use_rela_p): Likewise.
	(elf_backend_default_use_rela_p): Likewise.
	(elf_backend_got_header_size: Likewise.
	(elf_backend_plt_readonly): Likewise.
	(bfd_elf32_bfd_reloc_type_lookup): Likewise.
	(elf_backend_mips_rtype_to_howto): Likewise.
	(elf_backend_adjust_dynamic_symbol): Likewise.
	(elf_backend_finish_dynamic_symbol): Likewise.
	(bfd_elf32_bfd_link_hash_table_create): Likewise.
	(elf_backend_add_symbol_hook): Likewise.
	(elf_backend_link_output_symbol_hook): Likewise.
	(elf_backend_emit_relocs): Likewise.
	(elf_backend_final_write_processing: Likewise.
	(elf_backend_additional_program_headers): Likewise.
	(elf_backend_modify_segment_map): Likewise.
	(elf_backend_symbol_processing): Likewise.
	* elfxx-mips.c: Include elf-vxworks.h.
	(mips_elf_link_hash_entry): Add is_relocation_target and
	is_branch_target fields.
	(mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt,
	srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields.
	(MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros.
	(MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument.
	Return 3 for VxWorks.
	(ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a
	mips_elf_link_hash_table.  Return 0 for VxWorks.
	(MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a
	mips_elf_link_hash_table.  Update the call to ELF_MIPS_GP_OFFSET.
	(mips_vxworks_exec_plt0_entry): New variable.
	(mips_vxworks_exec_plt_entry): Likewise.
	(mips_vxworks_shared_plt0_entry): Likewise.
	(mips_vxworks_shared_plt_entry): Likewise.
	(mips_elf_link_hash_newfunc): Initialize the new hash_entry fields.
	(mips_elf_rel_dyn_section): Change the bfd argument to a
	mips_elf_link_hash_table.  Use MIPS_ELF_REL_DYN_NAME to get
	the name of the section.
	(mips_elf_initialize_tls_slots): Update the call to
	mips_elf_rel_dyn_section.
	(mips_elf_gotplt_index): New function.
	(mips_elf_local_got_index): Add an input_section argument.
	Update the call to mips_elf_create_local_got_entry.
	(mips_elf_got_page): Likewise.
	(mips_elf_got16_entry): Likewise.
	(mips_elf_create_local_got_entry): Add bfd_link_info and input_section
	arguments.  Create dynamic relocations for each entry on VxWorks.
	(mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE.
	(mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE
	and MIPS_RESERVED_GOTNO.
	(mips_elf_create_got_section): Update the uses of
	MIPS_ELF_GOT_MAX_SIZE.  Create .got.plt on VxWorks.
	(is_gott_symbol): New function.
	(mips_elf_calculate_relocation): Use a dynobj local variable.
	Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and
	mips_elf_got_page_entry.  Set G to the .got.plt entry when calculating
	VxWorks R_MIPS_CALL* relocations.  Calculate and use G for all GOT
	relocations on VxWorks.  Add dynamic relocations for references
	to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols.  Don't
	create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64
	in VxWorks executables.
	(mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument.
	Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry.
	Don't allocate a null entry on VxWorks.
	(mips_elf_create_dynamic_relocation): Update the call to
	mips_elf_rel_dyn_section.  Use absolute rather than relative
	relocations for VxWorks, and make them RELA rather than REL.
	(_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic
	read-only on VxWorks.  Update the call to mips_elf_rel_dyn_section.
	Create the .plt, .rela.plt, .dynbss and .rela.bss sections on
	VxWorks.  Likewise create the _PROCEDURE_LINKAGE_TABLE symbol.
	Call elf_vxworks_create_dynamic_sections for VxWorks and
	initialize the plt_header_size and plt_entry_size fields.
	(_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be
	used in VxWorks executables.  Don't allocate dynamic relocations
	for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables.
	Set is_relocation_target for each symbol referenced by a relocation.
	Allocate .rela.dyn entries for relocations against the special
	VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols.  Create GOT
	entries for all VxWorks R_MIPS_GOT16 relocations.  Don't allocate
	a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*,
	R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations.  Update the calls
	to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations.
	Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26
	relocations.  Don't set no_fn_stub on VxWorks.
	(_bfd_mips_elf_adjust_dynamic_symbol): Update the call to
	mips_elf_allocate_dynamic_relocations.
	(_bfd_mips_vxworks_adjust_dynamic_symbol): New function.
	(_bfd_mips_elf_always_size_sections): Do not allocate GOT page
	entries for VxWorks, and do not create multiple GOTs.
	(_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME.
	Handle .got specially for VxWorks.  Update the uses of
	MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations.
	Check for sgotplt and splt.  Allocate the .rel(a).dyn contents last,
	once its final size is known.  Set DF_TEXTREL for VxWorks.  Add
	DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL
	tags on VxWorks.  Do not add the MIPS-specific tags for VxWorks.
	(_bfd_mips_vxworks_finish_dynamic_symbol): New function.
	(mips_vxworks_finish_exec_plt): Likewise.
	(mips_vxworks_finish_shared_plt): Likewise.
	(_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call
	to mips_elf_rel_dyn_section.  Use a VxWorks-specific value of
	DT_PLTGOT.  Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL,
	DT_PLTRELSZ and DT_JMPREL.  Update the uses of MIPS_RESERVED_GOTNO
	and mips_elf_rel_dyn_section.  Use a different GOT header for
	VxWorks.  Don't sort .rela.dyn on VxWorks.  Finish the PLT on VxWorks.
	(_bfd_mips_elf_link_hash_table_create): Initialize the new
	mips_elf_link_hash_table fields.
	(_bfd_mips_vxworks_link_hash_table_create): New function.
	(_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_
	on VxWorks.  Update the call to ELF_MIPS_GP_OFFSET.
	* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare.
	(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
	(_bfd_mips_vxworks_link_hash_table_create): Likewise.
	* libbfd.h: Regenerate.
	* Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h.
	(elf32-mips.lo): Likewise.
	* Makefile.in: Regenerate.
	* reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare.
	* targets.c (bfd_elf32_bigmips_vxworks_vec): Declare.
	(bfd_elf32_littlemips_vxworks_vec): Likewise.
	(_bfd_target_vector): Add entries for them.

gas/
	* config/tc-mips.c (mips_target_format): Handle vxworks targets.
	(md_begin): Complain about -G being used for PIC.  Don't change
	the text, data and bss alignments on VxWorks.
	(reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
	generating VxWorks PIC.
	(load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
	(macro): Likewise, but do not treat la $25 specially for
	VxWorks PIC, and do not handle jal.
	(OPTION_MVXWORKS_PIC): New macro.
	(md_longopts): Add -mvxworks-pic.
	(md_parse_option): Don't complain about using PIC and -G together here.
	Handle OPTION_MVXWORKS_PIC.
	(md_estimate_size_before_relax): Always use the first relaxation
	sequence on VxWorks.
	* config/tc-mips.h (VXWORKS_PIC): New.

gas/testsuite/
	* gas/mips/vxworks1.s, gas/mips/vxworks1.d,
	* gas/mips/vxworks1-xgot.d: New tests.
	* gas/mips/mips.exp: Run them.  Do not run other tests on VxWorks.

include/elf/
	* mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs.

ld/
	* configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use
	separate VxWorks emulations.
	* emulparams/elf32ebmipvxworks.sh: New file.
	* emulparams/elf32elmipvxworks.sh: New file.
	* Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and
	eelf32elmipvxworks.o.
	(eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules.
	* Makefile.in: Regenerate.

ld/testsuite/
	* ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd,
	* ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd,
	* ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s,
	* ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd,
	* ld-mips/vxworks2-static.sd: New tests.
	* ld-mips/mips-elf.exp: Run them.
2006-03-22 09:28:15 +00:00
Nick Clifton
d70c5fc7c5 Add support for the Infineon XC16X. 2006-02-17 14:36:28 +00:00
Nick Hudson
aaa2ab3d61 bfd:
* config.bfd (mips*el-*-netbsd*, mips*-*-netbsd*): Use
	traditional MIPS ELF targets.

	gas:
	* configure.tgt: set emulation for mips-*-netbsd*

	ld:
	* configure.tgt (mips*el-*-netbsd*, mips*-*-netbsd*):
	Use the traditional target.
2006-02-16 08:05:02 +00:00
Joseph Myers
94089a50d3 gas:
* configure.tgt (arm-*-linux-gnueabi*): Change to
	arm-*-linux-*eabi*.

ld:
	* configure.tgt (arm*b-*-linux-gnueabi): Change to
	arm*b-*-linux-*eabi.
	(arm*-*-linux-gnueabi): Change to arm*-*-linux-*eabi.
2006-02-13 15:08:43 +00:00
Nick Clifton
b59bea8a13 Add support for RDOS targets. 2005-12-27 17:42:45 +00:00
Nathan Sidwell
4970f871a7 Rename ms1 to mt, part 1
* config.sub: Replace ms1 arch with mt.  Allow ms1 as alias.
	* configure.in: Replace ms1 arch with mt.
	* configure: Rebuilt.

	* bfd/Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES,
	BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Replace ms1 with mt.
	(cpu_mt.lo, elf32-mt.lo): Update target and dependency names.
	* bfd/Makefile.in: Rebuilt.
	* bfd/config.bfd: Replace ms1 arch with mt.
	* bfd/configure.in: Replace ms1 files with mt files.
	* bfd/configure: Rebuilt.
	* bfd/elf32-mt.c: Renamed from elf32-ms1.c.  Update include files.
	* bfd/cpu-mt.c: Renamed from cpu-ms1.c.

	* cpu/mt.cpu: Rename from ms1.cpu.
	* cpu/mt.opc: Rename from ms1.opc.

	* binutils/Makefile.am: Replace ms1 files with mt files.
	* binutils/Makefile.in: Rebuilt.
	* binutils/readelf.c (elf/mt.h): Adjust #include.

	* gas/configure.in: Replace ms1 arch with mt arch.
	* gas/configure: Rebuilt.
	* gas/configure.tgt: Replace ms1 arch with mt arch.
	* gas/config/tc-mt.c: Renamed from tc-ms1.c: Update include files.

	* gas/doc/Makefile.am (CPU_DOCS): Replace ms1 files with mt files.
	* gas/doc/Makefile.in: Rebuilt.

	* gas/testsuite/gas/mt: Renamed from ms1 dir.  Update file names as
	needed.
	* gas/testsuite/gas/mt/errors.exp: Replace ms1 arch with mt arch.
	* gas/testsuite/gas/mt/mt.exp: Replace ms1 arch with mt arch.
	* gas/testsuite/gas/mt/relocs.exp: Replace ms1 arch with mt arch.

	* gdb/configure.tgt: Replace ms1 arch with mt arch.
	* gdb/config/mt: Renamed from ms1 dir.  Update file names as needed.
	* gdb/config/mt/mt.mt (TDEPFILES): Replace ms1 file with mt file.

	* include/elf/mt.h: Renamed from ms1.h

	* ld/Makefile.am (ALL_EMULATIONS): Replace ms1 files with mt files.
	(eelf32mt.c): Update target name and dependencies.
	* ld/Makefile.in: Rebuilt.
	* ld/configure.tgt: Replace ms1 arch with mt arch.
	* ld/emulparams/elf32mt.sh: Renamed from elf32ms1.sh. Update
	comment.

	* libgloss/configure.in: Replace ms1 arch with mt arch.
	* libgloss/configure: Rebuilt.
	* libgloss/mt: Renamed from ms1 dir.

	* newlib/configure.host: Replace ms1 arch with mt arch.
	* newlib/libc/machine/mt: Renamed from ms1 dir.

	* opcodes/Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1
	with mt.
	* opcodes/Makefile.in: Rebuilt.
	* opcodes/configure.in: Replace ms1 files with mt files.
	* opcodes/configure: Rebuilt.

	* sid/component/cgen-cpu/mt: Renamed from ms1 dir.  Update file
	names as appropriate.
	* sid/component/cgen-cpu/mt/Makefile.am: Replace ms1 files with mt
	files.
	* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
2005-12-12 11:25:08 +00:00
Nick Clifton
3c9b82baee Add support for the Z80 processor family 2005-10-25 17:40:19 +00:00
Catherine Moore
95f4309b98 * Makefile.am: Bfin support.
* Makefile.in: Regenerated.
	* aclocal.m4: Regenerated.
	* configure.tgt: Bfin support.
	* emulparams/bfin.sh: New file.
	* emultempl/bfin.em: New file.
2005-09-30 15:23:16 +00:00
Alan Modra
c17ae8a24e Remove a29k support. 2005-08-18 03:51:51 +00:00
Nick Clifton
44c86e8c6d Add support for msp430x21xx variants 2005-08-08 17:08:04 +00:00
Nick Clifton
9f971fcbd4 Remove special case handling for rtems targets that are sufficiently handled by
the default rtems targets.
2005-07-22 10:34:30 +00:00
Nick Clifton
e729279b04 Fix building for MS1 and M32C.
Restore alpha- sorting to the architecture tables.
2005-07-18 14:13:36 +00:00
Jim Blandy
49f58d10f8 ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	* configure.in: Add cases for Renesas m32c.
	* configure: Regenerated.

bfd/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for m32c-*-elf (Renesas m32c and m16c).
	* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
	(ALL_MACHINES_CFILES): Add cpu-m32c.c.
	(BFD32_BACKENDS): Add elf32-m32c.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
	(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
	* Makefile.in: Regenerated.
	* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
	arch and mach codes.
	(bfd_m32c_arch): New arch info object.
	(bfd_archures_list): List bfd_m32c_arch.
	* bfd-in2.h: Regenerated.
	* config.bfd: Add case for the m32c.
	* configure.in: Add case for the m32c.
	* configure: Regenerated.
	* cpu-m32c.c, elf32-m32c.c: New files.
	* libbfd.h: Regenerated.
	* targets.c (bfd_elf32_m32c_vec): Declare.
	(_bfd_target_vector): List bfd_elf32_m32c_vec.

binutils/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	* readelf.c: #include "elf/m32c.h"
	(guess_is_rela, dump_relocations, get_machine_name): Add cases for
	EM_M32C.
	* Makefile.am (readelf.o): Update dependencies.
	* Makefile.in: Regenerated.

cpu/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.

gas/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for the Renesas M32C.
	* Makefile.am (CPU_TYPES): List m32c.
	(TARGET_CPU_CFILES): List config/tc-m32c.c.
	(TARGET_CPU_HFILES): List config/tc-m32c.h.
	* configure.in: Add case for m32c.
	* configure.tgt: Add cases for m32c and m32c-*-elf.
	* configure: Regenerated.
	* config/tc-m32c.c, config/tc-m32c.h: New files.
	* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
	* doc/Makefile.in: Regenerated.
	* doc/all.texi: Set M32C.
	* doc/as.texinfo: Add text for the M32C-specific options and line
	comment characters, and refer to c-m32c.texi.
	* doc/c-m32c.texi: New file.

include/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	* dis-asm.h (print_insn_m32c): New declaration.

include/elf/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for Renesas M32C and M16C.
	* common.h (EM_M32C): New machine number.
	* m32c.h: New file.

ld/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for the Renesas M32C and M16C.
	* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
	(eelf32m32c.c): New target.
	* Makefile.in: Regenerated.
	* configure.tgt: Add case for m32c-*-elf.
	* emulparams/elf32m32c.sh: New file.

opcodes/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for the Renesas M32C and M16C.
	* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
	* m32c-desc.h, m32c-opc.h: New.
	* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
	(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
	m32c-opc.c.
	(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
	m32c-ibld.lo, m32c-opc.lo.
	(CLEANFILES): List stamp-m32c.
	(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
	(CGEN_CPUS): Add m32c.
	(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
	(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
	(m32c_opc_h): New variable.
	(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
	(m32c-opc.lo): New rules.
	* Makefile.in: Regenerated.
	* configure.in: Add case for bfd_m32c_arch.
	* configure: Regenerated.
	* disassemble.c (ARCH_m32c): New.
	[ARCH_m32c]: #include "m32c-desc.h".
	(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
	(disassemble_init_for_target) [ARCH_m32c]: Same.

	* cgen-ops.h, cgen-types.h: New files.
	* Makefile.am (HFILES): List them.
	* Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
Nick Clifton
438361cd2f Remove sparc*-*-rtemsaout*, i[3-7]86-go32-rtems*, i[3-7]86-*-rtemscoff*,
hppa*-*-rtems*, mips*el-*-rtems*, powerpcle-*-rtems*.
2005-07-11 07:43:53 +00:00
Paul Brook
9d8504b17f 2005-05-07 Paul Brook <paul@codesourcery.com>
bfd/
	* config.bfd: Add separate case for ppc-vxworks.
	* configure: Regenerate.
	* configure.in: Include elf-vxworks.lo on ppc targets.
	* elf-vxworks.c (elf_vxworks_final_write_processing): Handle
	.rela.plt.unloaded.
	* elf32-ppc.c: Add VxWorks target vec.	Include elf-vxworks.h.
	(PLT_ENTRY_SIZE, PLT_INITIAL_ENTRY_SIZE, PLT_SLOT_SIZE): Remove.
	(VXWORKS_PLT_ENTRY_SIZE, ppc_elf_vxworks_plt_entry,
	ppc_elf_vxworks_pic_plt_entry, VXWORKS_PLT_INITIAL_ENTRY_SIZE,
	ppc_elf_vxworks_plt0_entry, ppc_elf_vxworks_pic_plt0_entry,
	VXWORKS_PLT_NON_JMP_SLOT_RELOCS, VXWORKS_PLTRESOLVE_RELOCS,
	VXWORKS_PLTRESOLVE_RELOCS_SHLIB): New.
	(ppc_elf_link_hash_table): Add srelplt2, sgotplt, hgot, hplt,
	is_vxworks, plt_entry_size, plt_slot_size, plt_initial_entry_size.
	(ppc_elf_link_hash_table_create): Initialize hadtab plt fields.
	(ppc_elf_create_got): Create .got.plt for VxWorks.
	(ppc_elf_create_dynamic_sections): Create unloaded plt relocation
	section for VxWorks.
	(ppc_elf_select_plt_layout): Handle VxWorks plt format.
	(allocate_got): VxWorks does not need a got header.
	(allocate_dynrelocs): Handle VxWorks plt format.
	(ppc_elf_size_dynamic_sections): Save _G_O_T_ and _P_L_T_ symbols for
	VxWorks.  Handle VxWorks plt/got.
	(ppc_elf_finish_dynamic_sections): Fill in VxWorks plt.
	(ppc_elf_vxworks_special_sections): New.
	(ppc_elf_vxworks_link_hash_table_create,
	ppc_elf_vxworks_add_symbol_hook,
	elf_i386_vxworks_link_output_symbol_hook,
	ppc_elf_vxworks_final_write_processing): New functions.
	* targets.c (bfd_elf32_powerpc_vxworks_vec): Declare.
	(_bfd_target_vector): Use it.
gas/
	* config/tc-ppc.c (ppc_target_format): Add VxWorks.
gas/testsuite/
	* gas/ppc/altivec.d: Match all powerpc target vecs.
	* gas/ppc/booke.d: Ditto.
	* gas/ppc/e500.d: Ditto.
ld/
	* Makefile.am (ALL_EMULATIONS): Add eelf32ppcvxworks.o.
	(eelf32ppcvxworks.o): Add dependencies.
	* Makefile.in: Regenerate.
	* configure.tgt: Add entry for powerpc-vxworks.
	* emulparams/elf32-ppc.c: Mention elf32ppcvxworks.sh in comment.
	* emulparams/elf32ppcvxworks.sh: New file.
	* emultempl/ppc32elf.em (bfd_elf32_powerpc_vxworks_vec): Declare.
	(is_ppc_elf32_vec): New function.
	(ppc_after_open, ppc_before_allocation,
	gld${EMULATION_NAME}_after_allocation): Use it.
2005-07-05 13:25:56 +00:00
Aldy Hernandez
9e1f170fa9 * configure.tgt: Same.
* Makefile.am (ALL_EMULATIONS): Depend on eelf32ms1.o.
	(eelf32ms1.c): Add eelf32ms1.c rule.

	* Makefile.in: Regenerate.
2005-06-07 21:12:16 +00:00
Paul Brook
eac338cfd5 2005-05-05 Paul Brook <paul@codesourcery.com>
bfd/
	* config.bfd: Use bfd_elf32_i386_vxworks_vec for i?86-*-vxworks.
	* configure.in: Add bfd_elf32_i386_vxworks_vec. i386 targets need
	elf-vxworks.lo.
	* configure: Regenerate.
	* Makefile.am (BFD32_BACKENDS): Add elf-vxworks.lo.
	(BFD32_BACKENDS_CFILES): Add elf-vxworks.c.
	(elf32-i386.lo): Depend on elf-vxworks.h.
	(elf-vxworks.lo): New rule.
	* Makefile.in: Regenerate.
	* elf-bfd.h (elf_backend_data): Update type of
	elf_backend_emit_relocs.
	(_bfd_elf_link_output_relocs): Update prototype.
	* elflink.c (_bfd_elf_link_output_relocs): Always use
	bed->elf_backend_emit_relocs when outputting relocations.
	* elfxx-target.h (elf_backend_emit_relocs): Default to
	_bfd_elf_link_output_relocs.
	* targets.c (bfd_elf32_i386_vxworks_vec): Declare.
	(_bfd_target_vector): Add bfd_elf32_i386_vxworks_vec.
	* elf32-i386.c: Add elf32-i386-vxworks target BFD.
	(elf_i386_plt0_entry): Remove padding.
	(elf_i386_pic_plt0_entry): Ditto.
	(PLTRESOLVE_RELOCS_SHLIB, PLTRESOLVE_RELOCS): Define.
	(PLT_NON_JUMP_SLOT_RELOCS): Define.
	(elf_i386_link_hash_table): Add srelplt2, hgot, hplt, is_vxworks and
	plt0_pad_byte fields.
	(elf_i386_link_hash_table_create): Zero them.
	(elf_i386_create_dynamic_sections): Create static relocation section.
	(allocate_dynrelocs): Allocate space for static PLT relocations.
	(elf_i386_size_dynamic_sections): Save shortcuts to PLT and GOT
	symbols.  Give PLT symbols function type.  Don't strip PLT sections
	if we have exported symbols from them.
	(elf_i386_finish_dynamic_symbol): Fill in VxWorks PLT static
	relocation section.  Don't mark _GLOBAL_OFFSET_TABLE_ as absolute on
	VxWorks.
	(elf_i386_finish_dynamic_sections): Allow different pad bytes.
	Add relocation for GOT location.  Fill in PLT static relocations.
	(elf_i386_vxworks_link_hash_table_create): New function.
	(elf_i386_vxworks_link_output_symbol_hook): New function.
	* elf-vxworks.h: New file.
gas/
	* config/tc-i386.h (ELF_TARGET_FORMAT): Define for TE_VXWORKS.
gas/testsuite/
	* gas/i386/i386.exp: Don't run divide test on vxworks.
ld/
	* Makefile.am: Add eelf_i386_vxworks.
	* Makefile.in: Regenerate.
	* configure.tgt: Make i?86-*-vxworks use targ_emul=elf_i386_vxworks.
	* emulparams/elf_i386_vxworks.sh: New file.
	* emulparams/vxworks.sh: New file.
	* scripttempl/elf.sc: Add DATA_END_SYMBOLS and ETEXT_NAME.
2005-05-05 14:37:27 +00:00
Daniel Jacobowitz
009b6a7aa9 * configure.tgt: Add h8300*-*-rtemscoff.
Switch h8300*-*-rtems* to elf.
2005-04-29 18:43:35 +00:00
Nick Clifton
ed84e69560 Accept any C library to accompany a GNU Linux implementation, not just the GNU
C library.
2005-03-23 15:35:50 +00:00
Nick Clifton
34723071b5 Add support for an x86_64-elf target 2005-03-15 14:14:08 +00:00
Richard Sandiford
1c7c5e5b09 * configure.tgt (mips64*el-*-linux-gnu*): Define targ_extra_libpath
to include o32 and n64 emulations.
	(mips64*-*-linux-gnu*): Likewise.
2005-02-08 19:54:27 +00:00
Nick Clifton
d648679633 Remove obsolete targets 2005-01-31 17:18:51 +00:00
Mark Mitchell
a154a8ad20 * Makefile.am (ALL_EMULATIONS): Add earmelfb_linux_eabi.o.
(earmelfb_linux_eabi.c): New target.
	* Makefile.in: Regenerated.
	* configure.tgt (arm*b-*-linux-gnueabi): New target.
	* emulparams/armelfb_linux_eabi.sh: New file.
2005-01-20 19:37:49 +00:00
Paul Brook
4e7fd91e3e 2005-01-06 Paul Brook <paul@codesourcery.com>
bfd/
	* config.bfd: Add entry for arm-*-vxworks and arm-*-windiss.
	* configure.in: Add bfd_elf32_{big,little}arm_vxworks_vec.
	* configure: Regenerate.
	* elf32-arm.c: Add VxWorks target bfd.
	(USE_REL): Remove.
	(elf32_arm_link_hash_table): Add use_rel.
	(elf32_arm_link_hash_table_create, elf32_arm_final_link_relocate,
	elf32_arm_relocate_section): Replace USE_REL with runtime check.
	Correct offset calculation for RELA case.
	(elf_backend_may_use_rel_p, elf_backend_may_use_rela_p,
	elf_backend_default_use_rela_p, elf_backend_rela_normal): Define.
	(elf32_arm_vxworks_link_hash_table_create): New function.
	* targets.c (bfd_elf32_bigarm_vxworks_vec): Add declaration.
	(bfd_elf32_littlearm_vxworks_vec): Ditto.
	(_bfd_target_vector): Add bfd_elf32_{big,little}arm_vxworks_vec.
gas/
	* config/tc-arm.c (FPU_DEFAULT): Define for TE_VXWORKS.
	(md_begin): Handle TE_VXWORKS for FP defaults.
	(md_apply_fix3): Correct rela offsets.
	(elf32_arm_target_format): Add VxWorks targets.
ld/
	* Makefie.am: Add earmelf_vxworks.
	* Makefile.in: Regenerate.
	* configure.tgt: Make arm-*-vxworks a separate case.
	* emulparams/armelf_vxworks.sh: New function.
2005-01-06 16:18:25 +00:00
Nick Clifton
2fbd2a87e2 Add support for s390x-ibm-tpf target 2004-12-16 16:02:59 +00:00