Commit graph

1069 commits

Author SHA1 Message Date
H.J. Lu
9e61c69e1e 2006-03-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/rep.s: Pad with .p2align.
	* gas/i386/rep.d: Adjust.
2006-03-24 05:07:53 +00:00
Andreas Jaeger
7b81dfbbf9 Patch by matz@suse.de:
bfd/ChangeLog:
	* reloc.c: Add BFD_RELOC_X86_64_GOT64, BFD_RELOC_X86_64_GOTPCREL64,
	BFD_RELOC_X86_64_GOTPC64, BFD_RELOC_X86_64_GOTPLT64,
	BFD_RELOC_X86_64_PLTOFF64.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Regenerated.
	* elf64-x86-64.c (x86_64_elf_howto_table): Correct comment.
	Add howtos for above relocs.
	(x86_64_reloc_map): Add mappings for new relocs.
	(elf64_x86_64_check_relocs): R_X86_64_GOT64, R_X86_64_GOTPCREL64,
	R_X86_64_GOTPLT64 need a got entry.  R_X86_64_GOTPLT64 also a PLT
	entry.  R_X86_64_GOTPC64 needs a .got section.  R_X86_64_PLTOFF64
	needs a PLT entry.
	(elf64_x86_64_gc_sweep_hook): Reflect changes from
	elf64_x86_64_check_relocs for the new relocs.
	(elf64_x86_64_relocate_section): Handle new relocs.

gas/ChangeLog:
	* config/tc-i386.c (type_names): Correct placement of 'static'.
	(reloc): Map some more relocs to their 64 bit counterpart when
	size is 8.
	(output_insn): Work around breakage if DEBUG386 is defined.
	(output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
	needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
	BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
	different from i386.
	(output_imm): Ditto.
	(lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
	Imm64.
	(md_convert_frag): Jumps can now be larger than 2GB away, error
	out in that case.
	(tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
	and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.

gas/testsuite/ChangeLog:
	* gas/i386/reloc64.s: Accept 64-bit forms.
	* gas/i386/reloc64.d: Adjust.
	* gas/i386/reloc64.l: Adjust.

include/ChangeLog:
	* elf/x86-64.h: Add the new relocations with their official
	numbers.
2006-03-23 08:23:09 +00:00
Richard Sandiford
0a44bf6950 Richard Sandiford <richard@codesourcery.com>
Daniel Jacobowitz  <dan@codesourcery.com>
	Phil Edwards  <phil@codesourcery.com>
	Zack Weinberg  <zack@codesourcery.com>
	Mark Mitchell  <mark@codesourcery.com>
	Nathan Sidwell  <nathan@codesourcery.com>

bfd/
	* bfd-in2.h: Regenerate.
	* config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas.
	* configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza.
	(bfd_elf32_littlemips_vxworks_vec): Likewise.
	(bfd_elf32_bigmips_vec): Add elf-vxworks.lo.
	(bfd_elf32_littlemips_vec): Likewise.
	(bfd_elf32_nbigmips_vec): Likewise.
	(bfd_elf32_nlittlemips_vec): Likewise.
	(bfd_elf32_ntradbigmips_vec): Likewise.
	(bfd_elf32_ntradlittlemips_vec): Likewise.
	(bfd_elf32_tradbigmips_vec): Likewise.
	(bfd_elf32_tradlittlemips_vec): Likewise.
	(bfd_elf64_bigmips_vec): Likewise.
	(bfd_elf64_littlemips_vec): Likewise.
	(bfd_elf64_tradbigmips_vec): Likewise.
	(bfd_elf64_tradlittlemips_vec): Likewise.
	* elf32-mips.c: Include elf-vxworks.h.
	(mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto
	instead of calling mips_elf32_rtype_to_howto directly.
	(mips_vxworks_copy_howto_rela): New reloc howto.
	(mips_vxworks_jump_slot_howto_rela): Likewise.
	(mips_vxworks_bfd_reloc_type_lookup): New function.
	(mips_vxworks_rtype_to_howto): Likewise.
	(mips_vxworks_final_write_processing): Likewise.
	(TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks.
	(TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise.
	(elf_backend_want_got_plt): Likewise.
	(elf_backend_want_plt_sym): Likewise.
	(elf_backend_got_symbol_offset): Likewise.
	(elf_backend_want_dynbss): Likewise.
	(elf_backend_may_use_rel_p): Likewise.
	(elf_backend_may_use_rela_p): Likewise.
	(elf_backend_default_use_rela_p): Likewise.
	(elf_backend_got_header_size: Likewise.
	(elf_backend_plt_readonly): Likewise.
	(bfd_elf32_bfd_reloc_type_lookup): Likewise.
	(elf_backend_mips_rtype_to_howto): Likewise.
	(elf_backend_adjust_dynamic_symbol): Likewise.
	(elf_backend_finish_dynamic_symbol): Likewise.
	(bfd_elf32_bfd_link_hash_table_create): Likewise.
	(elf_backend_add_symbol_hook): Likewise.
	(elf_backend_link_output_symbol_hook): Likewise.
	(elf_backend_emit_relocs): Likewise.
	(elf_backend_final_write_processing: Likewise.
	(elf_backend_additional_program_headers): Likewise.
	(elf_backend_modify_segment_map): Likewise.
	(elf_backend_symbol_processing): Likewise.
	* elfxx-mips.c: Include elf-vxworks.h.
	(mips_elf_link_hash_entry): Add is_relocation_target and
	is_branch_target fields.
	(mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt,
	srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields.
	(MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros.
	(MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument.
	Return 3 for VxWorks.
	(ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a
	mips_elf_link_hash_table.  Return 0 for VxWorks.
	(MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a
	mips_elf_link_hash_table.  Update the call to ELF_MIPS_GP_OFFSET.
	(mips_vxworks_exec_plt0_entry): New variable.
	(mips_vxworks_exec_plt_entry): Likewise.
	(mips_vxworks_shared_plt0_entry): Likewise.
	(mips_vxworks_shared_plt_entry): Likewise.
	(mips_elf_link_hash_newfunc): Initialize the new hash_entry fields.
	(mips_elf_rel_dyn_section): Change the bfd argument to a
	mips_elf_link_hash_table.  Use MIPS_ELF_REL_DYN_NAME to get
	the name of the section.
	(mips_elf_initialize_tls_slots): Update the call to
	mips_elf_rel_dyn_section.
	(mips_elf_gotplt_index): New function.
	(mips_elf_local_got_index): Add an input_section argument.
	Update the call to mips_elf_create_local_got_entry.
	(mips_elf_got_page): Likewise.
	(mips_elf_got16_entry): Likewise.
	(mips_elf_create_local_got_entry): Add bfd_link_info and input_section
	arguments.  Create dynamic relocations for each entry on VxWorks.
	(mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE.
	(mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE
	and MIPS_RESERVED_GOTNO.
	(mips_elf_create_got_section): Update the uses of
	MIPS_ELF_GOT_MAX_SIZE.  Create .got.plt on VxWorks.
	(is_gott_symbol): New function.
	(mips_elf_calculate_relocation): Use a dynobj local variable.
	Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and
	mips_elf_got_page_entry.  Set G to the .got.plt entry when calculating
	VxWorks R_MIPS_CALL* relocations.  Calculate and use G for all GOT
	relocations on VxWorks.  Add dynamic relocations for references
	to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols.  Don't
	create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64
	in VxWorks executables.
	(mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument.
	Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry.
	Don't allocate a null entry on VxWorks.
	(mips_elf_create_dynamic_relocation): Update the call to
	mips_elf_rel_dyn_section.  Use absolute rather than relative
	relocations for VxWorks, and make them RELA rather than REL.
	(_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic
	read-only on VxWorks.  Update the call to mips_elf_rel_dyn_section.
	Create the .plt, .rela.plt, .dynbss and .rela.bss sections on
	VxWorks.  Likewise create the _PROCEDURE_LINKAGE_TABLE symbol.
	Call elf_vxworks_create_dynamic_sections for VxWorks and
	initialize the plt_header_size and plt_entry_size fields.
	(_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be
	used in VxWorks executables.  Don't allocate dynamic relocations
	for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables.
	Set is_relocation_target for each symbol referenced by a relocation.
	Allocate .rela.dyn entries for relocations against the special
	VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols.  Create GOT
	entries for all VxWorks R_MIPS_GOT16 relocations.  Don't allocate
	a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*,
	R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations.  Update the calls
	to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations.
	Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26
	relocations.  Don't set no_fn_stub on VxWorks.
	(_bfd_mips_elf_adjust_dynamic_symbol): Update the call to
	mips_elf_allocate_dynamic_relocations.
	(_bfd_mips_vxworks_adjust_dynamic_symbol): New function.
	(_bfd_mips_elf_always_size_sections): Do not allocate GOT page
	entries for VxWorks, and do not create multiple GOTs.
	(_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME.
	Handle .got specially for VxWorks.  Update the uses of
	MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations.
	Check for sgotplt and splt.  Allocate the .rel(a).dyn contents last,
	once its final size is known.  Set DF_TEXTREL for VxWorks.  Add
	DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL
	tags on VxWorks.  Do not add the MIPS-specific tags for VxWorks.
	(_bfd_mips_vxworks_finish_dynamic_symbol): New function.
	(mips_vxworks_finish_exec_plt): Likewise.
	(mips_vxworks_finish_shared_plt): Likewise.
	(_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call
	to mips_elf_rel_dyn_section.  Use a VxWorks-specific value of
	DT_PLTGOT.  Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL,
	DT_PLTRELSZ and DT_JMPREL.  Update the uses of MIPS_RESERVED_GOTNO
	and mips_elf_rel_dyn_section.  Use a different GOT header for
	VxWorks.  Don't sort .rela.dyn on VxWorks.  Finish the PLT on VxWorks.
	(_bfd_mips_elf_link_hash_table_create): Initialize the new
	mips_elf_link_hash_table fields.
	(_bfd_mips_vxworks_link_hash_table_create): New function.
	(_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_
	on VxWorks.  Update the call to ELF_MIPS_GP_OFFSET.
	* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare.
	(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
	(_bfd_mips_vxworks_link_hash_table_create): Likewise.
	* libbfd.h: Regenerate.
	* Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h.
	(elf32-mips.lo): Likewise.
	* Makefile.in: Regenerate.
	* reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare.
	* targets.c (bfd_elf32_bigmips_vxworks_vec): Declare.
	(bfd_elf32_littlemips_vxworks_vec): Likewise.
	(_bfd_target_vector): Add entries for them.

gas/
	* config/tc-mips.c (mips_target_format): Handle vxworks targets.
	(md_begin): Complain about -G being used for PIC.  Don't change
	the text, data and bss alignments on VxWorks.
	(reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
	generating VxWorks PIC.
	(load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
	(macro): Likewise, but do not treat la $25 specially for
	VxWorks PIC, and do not handle jal.
	(OPTION_MVXWORKS_PIC): New macro.
	(md_longopts): Add -mvxworks-pic.
	(md_parse_option): Don't complain about using PIC and -G together here.
	Handle OPTION_MVXWORKS_PIC.
	(md_estimate_size_before_relax): Always use the first relaxation
	sequence on VxWorks.
	* config/tc-mips.h (VXWORKS_PIC): New.

gas/testsuite/
	* gas/mips/vxworks1.s, gas/mips/vxworks1.d,
	* gas/mips/vxworks1-xgot.d: New tests.
	* gas/mips/mips.exp: Run them.  Do not run other tests on VxWorks.

include/elf/
	* mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs.

ld/
	* configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use
	separate VxWorks emulations.
	* emulparams/elf32ebmipvxworks.sh: New file.
	* emulparams/elf32elmipvxworks.sh: New file.
	* Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and
	eelf32elmipvxworks.o.
	(eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules.
	* Makefile.in: Regenerate.

ld/testsuite/
	* ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd,
	* ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd,
	* ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s,
	* ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd,
	* ld-mips/vxworks2-static.sd: New tests.
	* ld-mips/mips-elf.exp: Run them.
2006-03-22 09:28:15 +00:00
Paul Brook
3e94bf1a01 2006-03-21 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
gas/testsuite/
	* gas/arm/thumb32.d: Correct expected output.
2006-03-21 14:35:27 +00:00
Paul Brook
dfa9f0d57b 2006-03-20 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
	(do_t_branch): Encode branches inside IT blocks as unconditional.
	(do_t_cps): New function.
	(do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
	do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
	(opcode_lookup): Allow conditional suffixes on all instructions in
	Thumb mode.
	(md_assemble): Advance condexec state before checking for errors.
	(insns): Use do_t_cps.
gas/testsuite/
	* gas/arm/thumb2_bcond.d: New test.
	* gas/arm/thumb2_bcond.s: New test.
	* gas/arm/thumb2_it_bad.d: New test.
	* gas/arm/thumb2_it_bad.l: New test.
	* gas/arm/thumb2_it_bad.s: New test.
2006-03-20 15:38:02 +00:00
Paul Brook
f5208ef27a 2006-03-17 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (insns): Add ldm and stm.
gas/testsuite/
	* gas/arm/thumb32.d: Add ldm and stm tests.
	* gas/arm/thumb32.s: Ditto.
2006-03-17 14:03:36 +00:00
Bernd Schmidt
2db51539bb * gas/bfin/shift2.s: Add new tests.
* gas/bfin/shift.d: Match changed disassembler behaviour.
	* gas/bfin/parallel2.d: Likewise.
	* gas/bfin/shift2.d: Likewise; also match new tests.
2006-03-16 19:09:25 +00:00
Paul Brook
c16d2bf065 2006-03-16 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (insns): Add "svc".
gas/testsuite/
	* gas/arm/svc.d: New test.
	* gas/arm/svc.s: New test.
	* gas/arm/inst.d: Accept svc mnemonic.
	* gas/arm/thumb.d: Ditto.
	* gas/arm/wince_inst.d: Ditto.
opcodes/
	* arm-dis.c (arm_opcodes): Rename swi to svc.
	(thumb_opcodes): Ditto.
2006-03-16 15:08:48 +00:00
Paul Brook
384060486d 2006-03-09 Paul Brook <paul@codesourcery.com>
bfd/
	* cpu-arm.c (bfd_is_arm_mapping_symbol_name): Recognise additional
	mapping symbols.
gas/testsuite/
	* gas/arm/nomapping.d: New test.
	* gas/arm/nomapping.s: New test.
2006-03-09 23:05:59 +00:00
H.J. Lu
35c52694b9 gas/testsuite/
2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* gas/i386/i386.exp: Add rep, rep-suffix, x86-64-rep and
	x86-64-rep-suffix.

	* gas/i386/naked.d: Replace repz with rep.
	* gas/i386/x86_64.d: Likewise.

	* gas/i386/rep-suffix.d: New file.
	* gas/i386/rep-suffix.s: Likewise.
	* gas/i386/rep.d: Likewise.
	* gas/i386/rep.s: Likewise.
	* gas/i386/x86-64-rep-suffix.d: Likewise.
	* gas/i386/x86-64-rep-suffix.s: Likewise.
	* gas/i386/x86-64-rep.d: Likewise.
	* gas/i386/x86-64-rep.s: Likewise.

opcodes/

2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* i386-dis.c (REP_Fixup): New function.
	(AL): Remove duplicate.
	(Xbr): New.
	(Xvr): Likewise.
	(Ybr): Likewise.
	(Yvr): Likewise.
	(indirDXr): Likewise.
	(ALr): Likewise.
	(eAXr): Likewise.
	(dis386): Updated entries of ins, outs, movs, lods and stos.
2006-03-07 20:18:06 +00:00
Richard Sandiford
00a976722a bfd/
* configure.in (bfd_elf32_bigarm_vec): Include elf-vxworks.lo.
	(bfd_elf32_bigarm_symbian_vec): Likewise.
	(bfd_elf32_bigarm_vxworks_vec): Likewise.
	(bfd_elf32_littlearm_vec): Likewise.
	(bfd_elf32_littlearm_symbian_vec): Likewise.
	(bfd_elf32_littlearm_vxworks_vec): Likewise.
	* configure: Regenerate.
	* elf32-arm.c: Include libiberty.h and elf-vxworks.h.
	(RELOC_SECTION, RELOC_SIZE, SWAP_RELOC_IN, SWAP_RELOC_OUT): New macros.
	(elf32_arm_vxworks_bed): Add forward declaration.
	(elf32_arm_howto_table_1): Fix the masks for R_ASM_ABS12.
	(elf32_arm_vxworks_exec_plt0_entry): New table.
	(elf32_arm_vxworks_exec_plt_entry): Likewise.
	(elf32_arm_vxworks_shared_plt_entry): Likewise.
	(elf32_arm_link_hash_table): Add vxworks_p and srelplt2 fields.
	(reloc_section_p): New function.
	(create_got_section): Use RELOC_SECTION.
	(elf32_arm_create_dynamic_sections): Likewise.  Call
	elf_vxworks_create_dynamic_sections for VxWorks targets.
	Choose between the two possible values of plt_header_size
	and plt_entry_size.
	(elf32_arm_link_hash_table_create): Initialize vxworks_p and srelplt2.
	(elf32_arm_abs12_reloc): New function.
	(elf32_arm_final_link_relocate): Call it.  Allow the creation of
	dynamic R_ARM_ABS12 relocs on VxWorks.  Use reloc_section_p,
	RELOC_SIZE, SWAP_RELOC_OUT and RELOC_SECTION.  Initialize the
	r_addend fields of relocs.  On rela targets, skip any code that
	adjusts in-place addends.  When using _bfd_link_final_relocate
	to perform a final relocation, pass rel->r_addend as the addend
	argument.
	(elf32_arm_merge_private_bfd_data): If one of the bfds is a VxWorks
	object, ignore flags that are not standard on VxWorks.
	(elf32_arm_check_relocs): Allow the creation of dynamic R_ARM_ABS12
	relocs on VxWorks.  Use reloc_section_p.
	(elf32_arm_adjust_dynamic_symbol): Use RELOC_SECTION and RELOC_SIZE.
	(allocate_dynrelocs): Use RELOC_SIZE.  Account for the size of
	.rela.plt.unloaded relocs on VxWorks targets.
	(elf32_arm_size_dynamic_sections): Use RELOC_SIZE.  Check for
	.rela.plt.unloaded as well as .rel(a).plt.  Add DT_RELA* tags
	instead of DT_REL* tags on RELA targets.
	(elf32_arm_finish_dynamic_symbol): Use RELOC_SECTION, RELOC_SIZE
	and SWAP_RELOC_OUT.  Initialize r_addend fields.  Handle VxWorks
	PLT entries.  Do not make _GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
	(elf32_arm_finish_dynamic_sections): Use RELOC_SECTION, RELOC_SIZE
	and SWAP_RELOC_OUT.  Initialize r_addend fields.  Handle DT_RELASZ
	like DT_RELSZ.  Handle the VxWorks form of initial PLT entry.
	Correct the .rela.plt.unreloaded symbol indexes.
	(elf32_arm_output_symbol_hook): Call the VxWorks version of this
	hook on VxWorks targets.
	(elf32_arm_vxworks_link_hash_table_create): Set vxworks_p to true.
	Minor formatting tweak.
	(elf32_arm_vxworks_final_write_processing): New function.
	(elf_backend_add_symbol_hook): Override for VxWorks and reset
	for Symbian.
	(elf_backend_final_write_processing): Likewise.
	(elf_backend_emit_relocs): Likewise.
	(elf_backend_want_plt_sym): Likewise.
	(ELF_MAXPAGESIZE): Likewise.
	(elf_backend_may_use_rel_p): Minor formatting tweak.
	(elf_backend_may_use_rela_p): Likewise.
	(elf_backend_default_use_rela_p): Likewise.
	(elf_backend_rela_normal): Likewise.
	* Makefile.in (elf32-arm.lo): Depend on elf-vxworks.h.

gas/
	* config/tc-arm.c (md_apply_fix): Install a value of zero into a
	BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
	R_ARM_ABS12 reloc.
	(tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
	relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
	relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.

gas/testsuite/
	* gas/arm/abs12.s, gas/arm/abs12.d: New test.
	* gas/arm/pic.d: Skip for *-*-vxworks*...
	* gas/arm/pic_vxworks.d: ...use this version instead.
	* gas/arm/unwind_vxworks.d: Fix expected output.

ld/
	* emulparams/armelf_vxworks.sh: Include vxworks.sh.
	(MAXPAGESIZE): Define.
	* emulparams/vxworks.sh: Undefine.
	* Makefile.am (earmelf_vxworks.c): Depend on vxworks.sh and vxworks.em.
	* Makefile.in: Regenerate.

ld/testsuite/
	* ld-arm/vxworks1.dd, ld-arm/vxworks1.ld, ld-arm/vxworks1-lib.dd,
	* ld-arm/vxworks1-lib.nd, ld-arm/vxworks1-lib.rd,
	* ld-arm/vxworks1-lib.s, ld-arm/vxworks1.rd, ld-arm/vxworks1.s,
	* ld-arm/vxworks1-static.d, ld-arm/vxworks2.s, ld-arm/vxworks2.sd,
	* ld-arm/vxworks2-static.sd: New tests.
	* ld-arm/arm-elf.exp: Run them.
2006-03-07 08:39:21 +00:00
Nathan Sidwell
0b2e31dc3b bfd:
* archures.c (bfd_mach_mcf_isa_a_nodiv, bfd_mach_mcf_isa_b_nousp):
	New.  Adjust other variants.
	(bfd_default_scan): Update.
	* bfd-in2.h: Rebuilt.
	* cpu-m68k.c: Adjust.
	(bfd_m68k_compatible): New. Use it for architectures.
	* elf32-m68k.c (elf32_m68k_object_p): Adjust.
	(elf32_m68k_merge_private_bfd_data): Adjust.  Correct isa-a/b
	mismatch.
	(elf32_m68k_print_private_bfd_data): Adjust.
	* ieee.c (ieee_write_processor): Adjust.

	binutils:
	* readelf.c (get_machine_flags): Adjust.

	gas:
	* config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
	and cf.
	(m68k_ip): <case 'J'> Check we have some control regs.
	(md_parse_option): Allow raw arch switch.
	(m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
	whether 68881 or cfloat was meant by -mfloat.
	(md_show_usage): Adjust extension display.
	(m68k_elf_final_processing): Adjust.

	gas/testsuite:
	* gas/m68k/arch-cpu-1.s: Tweak.
	* gas/m68k/arch-cpu-1.d: Tweak.

	include/elf:
	* m68k.h (EF_M68K_ISA_MASK, EF_M68K_ISA_A,
	EF_M68K_ISA_A_PLUS, EF_M68K_ISA_B, EF_M68K_ISA_C): Adjust.
	(EF_M68K_ISA_A_NODIV, EF_M68K_ISA_B_NOUSP): New.
	(EF_M68K_HW_DIV, EF_M68K_USP): Remove.
	(EF_M68K_MAC, EF_M68K_EMAC, EF_M68K_FLOAT): Adjust.
	(EF_M68K_EMAC_B): New.

	ld/testsuite:
	* ld-m68k: New tests.
2006-03-06 13:42:05 +00:00
Jan Beulich
9f6f925e1e gas/
2006-02-28  Jan Beulich  <jbeulich@novell.com>

	* macro.c (get_any_string): Don't insert quotes for <>-quoted input.

gas/testsuite/
2006-02-28  Jan Beulich  <jbeulich@novell.com>

	* gas/all/altmacro.s: Adjust.
	* gas/all/altmac2.s: Adjust.
2006-02-28 07:57:09 +00:00
Jan Beulich
0e31b3e1a3 gas/
2006-02-28  Jan Beulich  <jbeulich@novell.com>

	PR/1070
	* macro.c (getstring): Don't treat parentheses special anymore.
	(get_any_string): Don't consider '(' and ')' as quoting anymore.
	Special-case '(', ')', '[', and ']' when dealing with non-quoting
	characters.

gas/testsuite/
2006-02-28  Jan Beulich  <jbeulich@novell.com>

	* gas/macros/paren[sd]: New.
	* gas/macros/macros.exp: Run new test.
2006-02-28 07:55:36 +00:00
H.J. Lu
331d2d0d9c gas/
2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (output_insn): Support Intel Merom New
	Instructions.

	* gas/config/tc-i386.h (CpuMNI): New.
	(CpuUnknownFlags): Add CpuMNI.

gas/testsuite/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add merom and x86-64-merom.

	* gas/i386/merom.d: New file.
	* gas/i386/merom.s: Likewise.
	* gas/i386/x86-64-merom.d: Likewise.
	* gas/i386/x86-64-merom.s: Likewise.

include/opcode/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Support Intel Merom New Instructions.

opcodes/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	Intel Merom New Instructions.
	(THREE_BYTE_0): Likewise.
	(THREE_BYTE_1): Likewise.
	(three_byte_table): Likewise.
	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	THREE_BYTE_1 for entry 0x3a.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	Instructions.
2006-02-27 15:35:37 +00:00
Nathan Sidwell
04ede391a6 missing from 2006-02-07 Nathan Sidwell <nathan@codesourcery.com> commit 2006-02-26 10:00:30 +00:00
David S. Miller
83d634e3da 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
* gas/sparc/rdhpr.s: New test.
	* gas/sparc/rdhpr.d: New test.
	* gas/sparc/wrhpr.s: New test.
	* gas/sparc/wrhpr.d: New test.
	* gas/sparc/window.s: New test.
	* gas/sparc/window.d: New test.
	* gas/sparc/rdpr.s: Add case for reading %gl register.
	* gas/sparc/rdpr.d: Likewise.
	* gas/sparc/wrpr.s: Add case for writing %gl register.
	* gas/sparc/wrpr.d: Likewise.
	* gas/sparc/sparc.exp: Update for new tests.
2006-02-25 01:36:12 +00:00
Paul Brook
62b3e31101 2006-02-24 Paul Brook <paul@codesourcery.com>
gas/
	* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
	arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
	(struct asm_barrier_opt): Define.
	(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
	(parse_psr): Accept V7M psr names.
	(parse_barrier): New function.
	(enum operand_parse_code): Add OP_oBARRIER.
	(parse_operands): Implement OP_oBARRIER.
	(do_barrier): New function.
	(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
	(do_t_cpsi): Add V7M restrictions.
	(do_t_mrs, do_t_msr): Validate V7M variants.
	(md_assemble): Check for NULL variants.
	(v7m_psrs, barrier_opt_names): New tables.
	(insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
	(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
	(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
	(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
	(struct cpu_arch_ver_table): Define.
	(cpu_arch_ver): New.
	(aeabi_set_public_attributes): Use cpu_arch_ver.  Set
	Tag_CPU_arch_profile.
	* doc/c-arm.texi: Document new cpu and arch options.
gas/testsuite/
	* gas/arm/thumb32.d: Fix expected msr and mrs output.
	* gas/arm/arch7.d: New test.
	* gas/arm/arch7.s: New test.
	* gas/arm/arch7m-bad.l: New test.
	* gas/arm/arch7m-bad.d: New test.
	* gas/arm/arch7m-bad.s: New test.
include/opcode/
	* arm.h: Add V7 feature bits.
opcodes/
	* arm-dis.c (arm_opcodes): Add V7 instructions.
	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
	(print_arm_address): New function.
	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
	(psr_name): New function.
	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
2006-02-24 15:36:36 +00:00
H.J. Lu
59cf82fe74 bfd/
2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* cpu-ia64-opc.c (ins_immu5b): New.
	(ext_immu5b): Likewise.
	(elf64_ia64_operands): Add IMMU5b.

gas/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.

gas/testsuite/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/opc-i.s: Add tests for tf.
	* gas/ia64/pseudo.s: Likewise.
	* gas/ia64/opc-i.d: Updated.
	* gas/ia64/pseudo.d: Likewise.

include/opcode/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b.

opcodes/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-opc-i.c (bXc): New.
	(mXc): Likewise.
	(OpX2TaTbYaXcC): Likewise.
	(TF). Likewise.
	(TFCM). Likewise.
	(ia64_opcodes_i): Add instructions for tf.

	* ia64-opc.h (IMMU5b): New.

	* ia64-asmtab.c: Regenerated.
2006-02-23 21:36:18 +00:00
H.J. Lu
7f3dfb9cf7 gas/
2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (specify_resource): Add the rule 17 from
	SDM 2.2.

gas/testsuite/

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/dv-raw-err.s: Add check for vmsw.0.
	* gas/ia64/dv-raw-err.l: Updated.

	* gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1.
	* gas/ia64/opc-b.d: Updated.

opcodes/

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c (lookup_regindex): Handle ".vm".
	(print_dependency_table): Handle '\"'.

	* ia64-ic.tbl: Updated from SDM 2.2.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
Paul Brook
f40d164325 2005-02-22 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (do_pld): Remove incorrect write to
	inst.instruction.
	(encode_thumb32_addr_mode): Use correct operand.
gas/testsuite/
	* gas/arm/thumb32.d: Fix expected pld opcode.
2006-02-22 15:03:30 +00:00
Nick Clifton
d70c5fc7c5 Add support for the Infineon XC16X. 2006-02-17 14:36:28 +00:00
H.J. Lu
4ac54c279e 2006-02-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-crx-suffix.d: Undo the last change.
2006-02-12 17:26:21 +00:00
H.J. Lu
a1cfb73ee0 gas/testsuite/
2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add "x86-64-drx" and "x86-64-drx-suffix".

	* gas/i386/x86-64-crx-suffix.d: Minor update.

	* gas/i386/x86-64-drx-suffix.d: New file.
	* gas/i386/x86-64-drx.d: Likewise.
	* gas/i386/x86-64-drx.s: Likewise.

opcodes/

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	moves.
2006-02-11 18:08:35 +00:00
H.J. Lu
6dd5059a06 gas/testsuite/
2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix".

	* gas/i386/x86-64-crx-suffix.d: New file.
	* gas/i386/x86-64-crx.d: Likewise.
	* gas/i386/x86-64-crx.s: Likewise.

opcodes/

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c ('Z'): Add a new macro.
	(dis386_twobyte): Use "movZ" for control register moves.
2006-02-11 17:00:59 +00:00
Nathan Sidwell
266abb8f72 * bfd/archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e,
bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x,
	bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249,
	bfd_mach_mcf547x, bfd_mach_mcf548x): Remove.
	(bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div,
	bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac,
	bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
	bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp,
	bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac,
	bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac,
	bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac,
	bfd_mach_mcf_isa_b_usp_float_emac): New.
	(bfd_default_scan): Update coldfire mapping.
	* bfd/bfd-in.h (bfd_m68k_mach_to_features,
	bfd_m68k_features_to_mach): Declare.
	* bfd/bfd-in2.h: Rebuilt.
	* bfd/cpu-m68k.c (arch_info_struct): Add new coldfire machines,
	adjust legacy names.
	(m68k_arch_features): New.
	(bfd_m68k_mach_to_features,
	bfd_m68k_features_to_mach): Define.
	* bfd/elf32-m68k.c (elf32_m68k_object_p): New.
	(elf32_m68k_merge_private_bfd_data): Merge the CF EF flags.
	(elf32_m68k_print_private_bfd_data): Print the CF EF flags.
	(elf_backend_object_p): Define.
	* bfd/ieee.c (ieee_write_processor): Update coldfire machines.
	* bfd/libbfd.h: Rebuilt.

	* gas/config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
	mcf5329_control_regs): New.
	(not_current_architecture, selected_arch, selected_cpu): New.
	(m68k_archs, m68k_extensions): New.
	(archs): Renamed to ...
	(m68k_cpus): ... here.  Adjust.
	(n_arches): Remove.
	(md_pseudo_table): Add arch and cpu directives.
	(find_cf_chip, m68k_ip): Adjust table scanning.
	(no_68851, no_68881): Remove.
	(md_assemble): Lazily initialize.
	(select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
	(md_init_after_args): Move functionality to m68k_init_arch.
	(mri_chip): Adjust table scanning.
	(md_parse_option): Reimplement 'm' processing to add -march & -mcpu
	options with saner parsing.
	(m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
	m68k_init_arch): New.
	(s_m68k_cpu, s_m68k_arch): New.
	(md_show_usage): Adjust.
	(m68k_elf_final_processing): Set CF EF flags.
	* gas/config/tc-m68k.h (m68k_init_after_args): Remove.
	(tc_init_after_args): Remove.
	* gas/doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
	(M68k-Directives): Document .arch and .cpu directives.

	* gas/testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
	* gas/testsuite/gas/m68k/arch-cpu-1.[sd]: New.

	* include/elf/m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ...
	(EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here.
	(EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS,
	EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC,
	EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New.

	* include/opcode/m68k.h (m68008, m68ec030, m68882): Remove.
	(m68k_mask): New.
	(cpu_m68k, cpu_cf): New.
	(mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
	mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants.

	* opcodes/m68k-dis.c (print_insn_m68k): Use
	bfd_m68k_mach_to_features.

	* binutils/readelf.c (get_machine_flags): Add logic for EF_M68K flags.
2006-02-07 19:01:10 +00:00
Paul Brook
ef8d22e63b 2005-02-02 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
	T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
	T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
	T2_OPCODE_RSB): Define.
	(thumb32_negate_data_op): New function.
	(md_apply_fix): Use it.
gas/testsuite/
	* gas/arm/thumb2_invert.d: New test.
	* gas/arm/thumb2_invert.s: New test.
2006-02-02 13:34:17 +00:00
Paul Brook
791346475b 2006-01-31 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
gas/testsuite/
	* gas/testsuite/gas/arm/iwmmxt-bad.s: Add check for bad register name.
	* gas/testsuite/gas/arm/iwmmxt-bad.l: Ditto.
2006-01-31 16:19:41 +00:00
Arnold Metselaar
3170c51cf8 fix typo 2006-01-18 15:00:22 +00:00
Arnold Metselaar
ae33e02d8f Add tests for instructions with offsets. 2006-01-18 14:52:11 +00:00
Alan Modra
e88d958a4f split changelogs 2006-01-16 23:15:07 +00:00
Paul Brook
c2fe93275a 2006-01-16 Paul Brook <paul@codesourcery.com>
opcodes/
	* m68k-opc.c(m68k_opcodes): Fix opcodes for ColdFire f?abss,
	f?add?, and f?sub? instructions.

gas/testsuite/
	* gas/m68k/all.exp: Add mcf-fpu.
	* gas/m68k/mcf-fpu.d: New file.
	* gas/m68k/mcf-fpu.s: New file.
2006-01-16 16:23:30 +00:00
Nick Clifton
8ad7c533ee Fixes for building on 64-bit hosts:
* config/tc-avr.c (mod_index): New union to allow conversion
        between pointers and integers.
        (md_begin, avr_ldi_expression): Use it.
        * config/tc-i370.c (md_assemble): Add cast for argument to print
        statement.
        * config/tc-tic54x.c (subsym_substitute): Likewise.
        * config/tc-mn10200.c (md_assemble): Use a union to convert the
        opindex field of fr_cgen structure into a pointer so that it can
        be stored in a frag.
        * config/tc-mn10300.c (md_assemble): Likewise.
        * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
        types.
        * config/tc-v850.c: Replace uses of (int) casts with correct
        types.
        * gas/tic54x/address.d: Work with 64bit hosts.
        * gas/tic54x/addrfar.d: Likewise.
        * gas/tic54x/align.d: Likewise.
        * gas/tic54x/all-opcodes.d: Likewise.
        * gas/tic54x/asg.d: Likewise.
        * gas/tic54x/cons.d: Likewise.
        * gas/tic54x/consfar.d: Likewise.
        * gas/tic54x/extaddr.d: Likewise.
        * gas/tic54x/field.d: Likewise.
        * gas/tic54x/labels.d: Likewise.
        * gas/tic54x/loop.d: Likewise.
        * gas/tic54x/lp.d: Likewise.
        * gas/tic54x/macro.d: Likewise.
        * gas/tic54x/math.d: Likewise.
        * gas/tic54x/opcodes.d: Likewise.
        * gas/tic54x/sections.d: Likewise.
       * gas/tic54x/set.d: Likewise.
       * gas/tic54x/struct.d: Likewise.
       * gas/tic54x/subsym.d: Likewise.
2006-01-11 17:39:50 +00:00
H.J. Lu
4dcb3903aa gas/
2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/2117
	* symbols.c (snapshot_symbol): Don't change a defined symbol.

gas/testsuite/

2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/2117
	* gas/ia64/ia64.exp: Add ltoff22x-2, ltoff22x-3, ltoff22x-4 and
	ltoff22x-5.

	* gas/ia64/ltoff22x-2.d: New file.
	* gas/ia64/ltoff22x-2.s: Likewise.
	* gas/ia64/ltoff22x-3.d: Likewise.
	* gas/ia64/ltoff22x-3.s: Likewise.
	* gas/ia64/ltoff22x-4.d: Likewise.
	* gas/ia64/ltoff22x-4.s: Likewise.
	* gas/ia64/ltoff22x-5.d: Likewise.
	* gas/ia64/ltoff22x-5.s: Likewise.
2006-01-09 17:14:40 +00:00
Hans-Peter Nilsson
b27c00b3ab fix last-minute typo 2006-01-03 06:23:10 +00:00
Hans-Peter Nilsson
834b26f4b7 PR gas/2101
* gas/mmix/hex2.s, gas/mmix/hex2.d: New test.
2006-01-03 05:52:15 +00:00
Jan Beulich
2e1e12b1f4 gas/
2005-12-22  Jan Beulich  <jbeulich@novell.com>

	* symbols.h (snapshot_symbol): First parameter is now pointer
	to pointer to symbolS.
	* symbols.c (snapshot_symbol): Likewise. Store resulting symbol
	there. Use symbol_equated_p.
	* expr.c (resolve_expression): Change first argument to
	snapshot_symbol. Track possibly changed add_symbol consistently
	across function. Resolve more special cases with known result.
	Also update final_val when replacing add_symbol.

gas/testsuite/
2005-12-22  Jan Beulich  <jbeulich@novell.com>

	* gas/all/cond.s: Also check .if works on equates to undefined
	when the expression value can be known without knowing the
	value of the symbol.
	* gas/all/cond.l: Adjust.
	* gas/i386/equ.s: Also check .if works on (equates to)
	registers when the expression value can be known without
	knowing the value of the register.
	* gas/i386/equ.e: Adjust.
2005-12-22 17:05:40 +00:00
Jan Beulich
b190548998 gas/
2005-12-14  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (add_prefix): More fine-grained handling of
	REX prefixes. Or new prefix value into i.prefix instead of
	assigning.

gas/testsuite/
2005-12-14  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/rex.[sd]: New.
	* gas/i386/i386.exp: Run new test.
2005-12-14 08:57:06 +00:00
Paul Brook
39b41c9ca8 2005-12-12 Paul Brook <paul@codesourcery.com>
bfd/
	* bfd-in2.h: Regenerate.
	* elf32-arm.c (elf32_arm_reloc_map): Add BFD_RELOC_ARM_PCREL_CALL and
	BFD_RELOC_ARM_PCREL_JUMP.
	(check_use_blx): New function.
	(bfd_elf32_arm_process_before_allocation): Don't allocate glue if
	using BLX.
	(elf32_arm_final_link_relocate): Perform bl<->blx conversion for
	R_ARM_CALL and R_ARM_THM.
	(elf32_arm_get_eabi_attr_int): New function.
	(elf32_arm_size_dynamic_sections): Call check_use_blx.
	* libbfd.h: Regenerate.
	* reloc.c: Add BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP.
gas/
	* config/tc-arm.c (do_branch): Generate EABI branch relocations.
	(do_bl): New function.
	(do_blx): Generate BFD_RELOC_ARM_PCREL_CALL relocation.
	(do_t_blx): Generate BFD_RELOC_THUMB_PCREL_BRANCH23.
	(insns): Use do_bl.
	(md_pcrel_from_section): Add BFD_RELOC_ARM_PCREL_CALL and
	BFD_RELOC_ARM_PCREL_JUMP.
	(md_apply_fix): Merge BFD_RELOC_ARM_PCREL_BRANCH and
	BFD_RELOC_ARM_PCREL_BLX cases.  Handle BFD_RELOC_ARM_PCREL_CALL and
	BFD_RELOC_ARM_PCREL_JUMP.
	(tc_gen_reloc): Handle BFD_RELOC_ARM_PCREL_CALL and
	BFD_RELOC_ARM_PCREL_JUMP.
	gas/testsuite/
	* gas/arm/pic.d: Allow R_ARM_CALL relocations.
include/elf/
	* arm.h (elf32_arm_get_eabi_attr_int): Add prototype.
ld/testsuite/
	* ld-arm/arm-call.d: New test.
	* ld-arm/arm-call1.s: New file.
	* ld-arm/arm-call1.s: New file.
	* ld-arm/arm-elf.exp: Add arm-call and mixed-app-v5.
	* ld-arm/arm.ld: Add .glue_7 and .ARM.attribues.
	* ld-arm/mixed-app-v5.d: New file.
	* ld-arm/mixed-app.r: Tweak expected output.
2005-12-12 17:03:40 +00:00
Nathan Sidwell
4970f871a7 Rename ms1 to mt, part 1
* config.sub: Replace ms1 arch with mt.  Allow ms1 as alias.
	* configure.in: Replace ms1 arch with mt.
	* configure: Rebuilt.

	* bfd/Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES,
	BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Replace ms1 with mt.
	(cpu_mt.lo, elf32-mt.lo): Update target and dependency names.
	* bfd/Makefile.in: Rebuilt.
	* bfd/config.bfd: Replace ms1 arch with mt.
	* bfd/configure.in: Replace ms1 files with mt files.
	* bfd/configure: Rebuilt.
	* bfd/elf32-mt.c: Renamed from elf32-ms1.c.  Update include files.
	* bfd/cpu-mt.c: Renamed from cpu-ms1.c.

	* cpu/mt.cpu: Rename from ms1.cpu.
	* cpu/mt.opc: Rename from ms1.opc.

	* binutils/Makefile.am: Replace ms1 files with mt files.
	* binutils/Makefile.in: Rebuilt.
	* binutils/readelf.c (elf/mt.h): Adjust #include.

	* gas/configure.in: Replace ms1 arch with mt arch.
	* gas/configure: Rebuilt.
	* gas/configure.tgt: Replace ms1 arch with mt arch.
	* gas/config/tc-mt.c: Renamed from tc-ms1.c: Update include files.

	* gas/doc/Makefile.am (CPU_DOCS): Replace ms1 files with mt files.
	* gas/doc/Makefile.in: Rebuilt.

	* gas/testsuite/gas/mt: Renamed from ms1 dir.  Update file names as
	needed.
	* gas/testsuite/gas/mt/errors.exp: Replace ms1 arch with mt arch.
	* gas/testsuite/gas/mt/mt.exp: Replace ms1 arch with mt arch.
	* gas/testsuite/gas/mt/relocs.exp: Replace ms1 arch with mt arch.

	* gdb/configure.tgt: Replace ms1 arch with mt arch.
	* gdb/config/mt: Renamed from ms1 dir.  Update file names as needed.
	* gdb/config/mt/mt.mt (TDEPFILES): Replace ms1 file with mt file.

	* include/elf/mt.h: Renamed from ms1.h

	* ld/Makefile.am (ALL_EMULATIONS): Replace ms1 files with mt files.
	(eelf32mt.c): Update target name and dependencies.
	* ld/Makefile.in: Rebuilt.
	* ld/configure.tgt: Replace ms1 arch with mt arch.
	* ld/emulparams/elf32mt.sh: Renamed from elf32ms1.sh. Update
	comment.

	* libgloss/configure.in: Replace ms1 arch with mt arch.
	* libgloss/configure: Rebuilt.
	* libgloss/mt: Renamed from ms1 dir.

	* newlib/configure.host: Replace ms1 arch with mt arch.
	* newlib/libc/machine/mt: Renamed from ms1 dir.

	* opcodes/Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1
	with mt.
	* opcodes/Makefile.in: Rebuilt.
	* opcodes/configure.in: Replace ms1 files with mt files.
	* opcodes/configure: Rebuilt.

	* sid/component/cgen-cpu/mt: Renamed from ms1 dir.  Update file
	names as appropriate.
	* sid/component/cgen-cpu/mt/Makefile.am: Replace ms1 files with mt
	files.
	* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
2005-12-12 11:25:08 +00:00
Nathan Sidwell
787121fc40 Rename ms1 files to mt files (part 1 -- renames only) 2005-12-12 11:16:41 +00:00
Hans-Peter Nilsson
76956aa342 * gas/cris/rd-bcnst-pic.d, gas/cris/rd-branch-pic.d,
gas/cris/rd-brokw-pic-1.d, gas/cris/rd-brokw-pic-2.d,
	gas/cris/rd-brokw-pic-3.d, gas/cris/rd-fragtest-pic.d: New tests.
2005-12-07 06:43:17 +00:00
H.J. Lu
cb712a9ecd gas/
2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* config/tc-i386.c (match_template): Handle monitor.
	(process_suffix): Likewise.

gas/testsuite/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* gas/i386/i386.exp: Add x86-64-prescott for 64bit.

	* gas/i386/prescott.s: Test address size override for monitor.
	* gas/i386/prescott.d: Updated.

	* gas/i386/x86-64-prescott.d: New file.
	* gas/i386/x86-64-prescott.s: Likewise.

include/opcode/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* i386.h (i386_optab): Add 64bit support for monitor and mwait.

opcodes/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* i386-dis.c (address_mode): New enum type.
	(address_mode): New variable.
	(mode_64bit): Removed.
	(ckprefix): Updated to check address_mode instead of mode_64bit.
	(prefix_name): Likewise.
	(print_insn): Likewise.
	(putop): Likewise.
	(print_operand_value): Likewise.
	(intel_operand_size): Likewise.
	(OP_E): Likewise.
	(OP_G): Likewise.
	(set_op): Likewise.
	(OP_REG): Likewise.
	(OP_I): Likewise.
	(OP_I64): Likewise.
	(OP_OFF): Likewise.
	(OP_OFF64): Likewise.
	(ptr_reg): Likewise.
	(OP_C): Likewise.
	(SVME_Fixup): Likewise.
	(print_insn): Set address_mode.
	(PNI_Fixup): Add 64bit and address size override support for
	monitor and mwait.
2005-12-06 12:40:57 +00:00
Hans-Peter Nilsson
63e199b91a * gas/cris/rd-pcplus.s, gas/cris/rd-pcplus.d: New test. 2005-12-05 23:26:23 +00:00
Dave Anglin
d9ca002e6b * gas/macros/purge.l: Increment line numbers.
* gas/macros/purge.s: Add ".data" line.
2005-11-25 02:11:40 +00:00
Dave Anglin
88856d20cb Bug gas/1896
* config/tc-hppa.c (hppa_fix_adjustable): Don't reject for reduction
	R_HPPA relocations that are 32-bits wide.
	* gas/all/redef2.d: Allow "$DATA$" as well as ".data" in matches.
	* gas/all/weakref1.d: Allow "$CODE$" as well as ".text" in matches.
	* gas/hppa/reloc/reloc.exp: Adjust regexp for new output.
2005-11-25 02:08:22 +00:00
Daniel Jacobowitz
bad36eacda bfd/
* elf32-mips.c (elf_mips_howto_table_rel): Use rightshift 2 for
	R_MIPS_PC16.
	(mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16.
	(bfd_elf32_bfd_reloc_type_lookup): Don't handle
	BFD_RELOC_16_PCREL_S2.
	* elf64-mips.c (mips_elf64_howto_table_rel): Use rightshift 2 for
	R_MIPS_PC16.
	(mips_elf64_howto_table_rela): Likewise.
	(mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16.
	(bfd_elf64_bfd_reloc_type_lookup): Don't handle
	BFD_RELOC_16_PCREL_S2.
	* elfn32-mips.c (elf_mips_howto_table_rel): Use rightshift 2 for
	R_MIPS_PC16.
	(elf_mips_howto_table_rela): Likewise.
	(mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16.
	(bfd_elf32_bfd_reloc_type_lookup): Don't handle
	BFD_RELOC_16_PCREL_S2.
	* elfxx-mips.c: Formatting fixes.
	(mips_elf_calculate_relocation): Handle R_MIPS_GNU_REL16_S2
	and R_MIPS_PC16 identically.
gas/
	* config/tc-mips.c (append_insn): Handle BFD_RELOC_16_PCREL_S2.
	(macro_build): Complain for invalid branch displacements.
	(mips_validate_fix): Delete.
	(md_apply_fix): Re-add pcrel support for branches.  Use consistent
	text for misaligned branch targets.
	(tc_gen_reloc: Re-add pcrel support for branches.  Handle strange
	BFD pcrel processing.  Remove error for unresolved branches.
	* config/tc-mips.h (TC_VALIDATE_FIX, mips_validate_fix): Delete.
gas/testsuite/
	* gas/mips/bge.d, gas/mips/bge.s, gas/mips/bgeu.d, gas/mips/bgeu.s,
	gas/mips/blt.d, gas/mips/blt.s, gas/mips/bltu.d,
	gas/mips/bltu.s: Reactivate external branch tests.
	* gas/mips/branch-misc-2.d, gas/mips/branch-misc-2pic.d,
	gas/mips/branch-misc-2-64.d, gas/mips/branch-misc-2pic-64.d: New
	tests.
	* gas/mips/branch-misc-2.l, gas/mips/branch-misc-2pic.l,
	gas/testsuite/gas/mips/branch-misc-2pic.s: Remove.
	* gas/mips/mips.exp: Adjust branch-misc-2 tests.  Add 64-bit
	variants.
2005-11-23 14:04:18 +00:00
Dave Anglin
6e572af013 * gas/all/quad.d: Add -j "\$DATA\$". Modify regexp to check for
"$DATA$" as well as ".data".
	* gas/all/sleb128.d: Likewise.
2005-11-23 00:28:58 +00:00
Dave Anglin
6745c7267e Bug gas/1894 Bug gas/1895
* gas/all/gas.exp (redef3): xfail on hppa*-*-hpux*.
	* gas/all/redef.d: Add -j "\$DATA\$".  Modify regexp to check for
	"$DATA$" as well as ".data".
	* gas/all/redef2.d: Likewise.
2005-11-21 04:30:32 +00:00
Dave Anglin
9af1437233 Bug gas/1879
* gas/all/weakref1.d: Check for "$CODE$" as well as ".text".
	* gas/all/weakref1.s: Indent "-ld1 = l".
	* gas/all/weakref1g.d: Remove --no-sort option.
	* gas/all/weakref1l.d: Likewise.
	* gas/all/weakref1u.d: Likewise.  Sort expected results.
	* gas/all/weakref1w.d: Likewise.
	* gas/all/weakref2.s: Indent directives.
	* gas/all/weakref3.s: Likewise.
2005-11-20 22:03:25 +00:00