sim:
* Makefile.in (interp.o): Depends on ppi.c .
(ppi.c): New rule.
* gencode.c (printonmatch, think, genopc): Deleted.
(MAX_NR_STUFF): Now 42.
(tab): Add SH-DSP CPU instructions.
Amalgamate ldc / stc / lds / sts instructions with similar
bit patterns. Fix opcodes of stc Rm_BANK,@-<REG_N>.
Fix semantics of lds.l @<REG_N>+,MACH (no sign extend).
(movsxy_tab): New array.
For movs, change MMMM field to GGGG, and mmmm field to MMMM.
Added entries for movx, movy and parallel processing insns.
(ppi_tab): New array.
(qfunc): Stabilize sort.
(expand_opcode): Handle [01][01]NN, [01][01]xx and [01][01]yy.
Handle 'M', 'G' 's' 'X', 'a', 'Y' and 'A'.
(dumptable): Now takes three arguments. Changed all callers.
Emit just one contigous jump table.
(filltable): Now takes an argument. Changed all callers.
Make index static.
(ppi_moves, expand_ppi_code, ppi_filltable, ppi_gensim): New functions.
(gensim_caselist): New function, broken out of gensim.
Handle opcode fields 'x', 'y', 's', 'M', 'G', 'X', 'a', and 'Y'.
Handle ref '9'.
(gensim): Handle 'N' in code field and '8' in refs field.
Call gensim_caselist - twice.
(ppi_index): New static variable.
(main): Unsupport default action.
Add dsp support for -x / -s option. Add -p option.
* interp.c (sh_jump_table, sh_dsp_table, ppi_table): Declare.
(saved_state_type): Rearrange to allow amalgamated ldc / stc /
lds / sts to work efficiently.
(target_dsp): New static variable.
(GBR, VBR, SSR, SPC, MACH, MACL): Reflect saved_state_type change.
(FPUL, Rn_BANK, SET_Rn_BANK, M, Q, S, T, SR_BL, SR_RB): Likewise.
(SR_MD, SR_RC, SET_SR_BIT, GET_SR, SET_RC, GET_FPSCR): Likewise.
(RS, RE, MOD, MOD_ME, DSP_R): Likewise.
(set_fpscr1): Likewise. Use target_dsp to check for dsp.
(MOD_MSi, SIG_BUS_FETCH): Deleted.
(CREG, SREG, PR, SR_MASK_DMY, SR_MASK_DMX, SR_DMY): New macros.
(SR_DMX, DSR, MOD_DELTA, GET_DSP_GRD): Likewise.
(SET_MOD): Reflect saved_state_type change. Set MOD_DELTA instead
of MOD_MS, and encode SR_DMY / SR_DMX into high word of MOD_ME.
(set_sr): Reflect saved_state_type change. Fix SR_RB handling.
Use SET_MOD.
(MA, L, TL, TB): Now controlled by ACE_FAST.
(SEXT32): Just cast to int.
(SIGN32): Fixed to only shift by 31.
(CHECK_INSN_PTR): SIGBUS at insn fetch now represented by insn_end 0.
(ppi_insn): Declare.
(ppi.c): Include.
(init_dsp): Set target_dsp. When it changes, switch end of
sh_jump_table with sh_dsp_table.
(sim_resume) Don't declare sh_jump_table0. Use sh_jump_table instead.
Don't Declare PR if it's #defined.
Fix single-stepping (Was broken in Mar 6 16:59:10 patch).
(sim_store_register, sim_read_register): Translate accesses to
reflect saved_state_type change.
* interp.c (set_sr): Set sr.
(SET_RC, MOD, MOD_MS, MOD_ME, SET_MOD, MOD_MS, MOD_ME): New macros.
(set_fpscr1): Don't bank-switch fpu registers when simulating sh-dsp.
(DSP_R): Fix definition.
(sim_resume): Remove outdated SET_SR use.
* interp.c (saved_state): New members for struct member asregs:
rs, re, insn_end, xram_start, yram_start.
(struct loop_bounds): New struct.
(SKIP_INSN): New macro.
(get_loop_bounds): New function.
(endianw): Renamed to global_endianw.
(maskw): negated bits.
(PC): Now insn_ptr.
(SR_MASK_RC, SR_RC_INCREMENT, SR_RC, RAISE_EXCEPTION): New macros.
(RS, RE, DSP_R, DSP_GRD, A1, A0, X0, X1, Y0, Y1, M0, A1G): Likewise.
(M1, A0G, RIAT, PT2H, PH2T, SET_NIP, CHECK_INSN_PTR): Likewise.
(SIG_BUS_FETCH): Likewise
(raise_exception, riat_fast): New functions.
(raise_buserror, sim_stop): Use raise_exception.
(PROCESS_SPECIAL_ADDRESS): Use xram_start / yram_start.
(BUSERROR, WRITE_BUSERROR, READ_BUSERROR):
Reverse sense of mask argument.
(FP_OP, set_dr): Use RAISE_EXCEPTION.
(wlat_fast, wwat_fast, wbat_fast, rlat_fast, rwat_fast, rbat_fast):
Declare. Remove redundant masking.
(wwat_fast, rwat_fast): Add argument endianw. Changed callers.
(MA): Updated for change pc -> PC.
(Delay_Slot): Use RIAT.
(empty): Deleted.
(trap): Remove argument little_endian. Add argument endianw.
Changed all callers. Use raise_exception.
(macw): Add argument endainw. Changed all callers.
(init_dsp): New function, extended after broken out of init_pointers.
(sim_resume): Replace pc with insn_ptr. Replace little_endian with
endianw. Replace nia with nip. Reverse sense of maskb / maskw /
maskl. Implement logic for zero-overhead loops. Don't try to
interpret garbage when getting a SIGBUS at insn fetch.
(sim_open): Call init_dsp.
* gencode.c (tab): Use SET_NIP instead of nia = . Use PH2T / PT2H /
RAISE_EXCEPTION where appropriate.
Add extra cycles for brai, braf , bsr, bsrf, jmp, jsr.
* interp.c (sim_store_register, sim_fetch_register):
Do proper endianness switch.
* interp.c (saved_state_type): New members for struct member asregs:
xymem_select, xmem, ymem, xmem_offset, ymem_offset.
(special_address): Delete.
(BUSERROR): Now a two-argument predicate.
(PROCESS_SPECIAL_ADDRESS, WRITE_BUSERROR, READ_BUSERROR): New macros.
(wlat_little, wwat_little, wbat_any, wlat_big, wwat_big): Delete.
(process_wlat_addr, process_wwat_addr): New functions.
(process_wbat_addr, process_rlat_addr, process_rwat_addr): Likewise.
(process_rbat_addr): Likewise.
(wlat_fast, wwat_fast, wbat_fast): Use WRITE_BUSERROR.
(rlat_little, rwat_little, rbat_any, rlat_big, rwat_big): Delete.
(rlat_fast, rwat_fast, rbat_fast): Use READ_BUSERROR.
(RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Delete SLOW versions.
(do_rdat, trap): Delete SLOW code.
(SEXT32, SIGN32): New macros.
(swap, swap16): Now integer in - integer out. Changed all callers.
(strswaplen, strnswap): Delete SLOW versions.
(init_pointers): Initialize dsp memory selection (preliminary).
(sim_store_register, sim_fetch_register): Use swap instead of
big / little endian read / write functions.
* interp.c (maskl): Deleted.
(endianw, endianb): New variables.
(special_address): Now inline.
(bp_holder): Put raising of buserror there, rename to:
(raise_buserror).
(BUSERROR): Now yields a value. Changed all users.
(wbat_big): Delete.
(wlat_fast, wwat_fast, wbat_fast): New functions.
(rlat_fast, rwat_fast, rbat_fast): Likewise.
(RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Use new functions.
(do_rdat, do_wdat): Likewise. Take maskl argument instead of
little_endian one. Changed caller macros.
(swap, swap16): Use w[rw]lat_big / w[rw]lat_little directly.
(strswaplen, strnswap): New functions.
(trap): Use them to fix up endian mismatches;
disable SYS_execve and SYS_execv; fix double address translation for
SYS_pipe and SYS_stat.
(sym_write, sym_read): Add endianness translation.
(sym_store_register, sym_fetch_register): Add maskl local variable.
(sim_open): Set endianw and endianb.
gdb:
* sh-tdep.c (sh_dsp_reg_names, sh3_dsp_reg_names): New arrays.
(sh_processor_type_table): Add entries for bfd_mach_sh_dsp and
bfd_mach_sh3_dsp.
(sh_show_regs): Floating point registers are called fr0-fr15.
For sh4, display fpul, fpscr and fr0-fr15 / dr0-dr14 as appropriate.
Handle sh-dsp and sh3-dsp.
config/sh/tm-sh.h (REGISTER_VIRTUAL_TYPE): sh-dsp / sh3-dsp
don't have floating point registers.
(DSR_REGNUM, A0G_REGNUM, A0_REGNUM, A1G_REGNUM, A1_REGNUM): Define.
(M0_REGNUM, M1_REGNUM, X0_REGNUM, X1_REGNUM, Y0_REGNUM): Likewise.
(Y1_REGNUM, MOD_REGNUM, RS_REGNUM, RE_REGNUM, R0B_REGNUM): Likewise.
Make Sparc a Multi-Arch target. Discard PARAMS macro (require ANSI).
* sparc-tdep.c: include arch-utils.h.
(SPARC_HAS_FPU, FP_REGISTER_BYTES, FP_MAX_REG NUM, SPARC_INTREG_SIZE,
DUMMY_REG_SAVE_OFFSET): provide multi-arch-compatible definitions.
(GDB_TARGET_IS_SPARC64): make into a runtime test.
(struct frame_extra_info): Define, use instead of the macro.
(Many places): Use alloca instead of statically allocated buffers
that depend on a multi-arch variable such as MAX_REGISTER_RAW_SIZE.
(sparc_extract_struct_value_address): Accept a pointer arg instead
of an array sized by REGISTER_BYTES.
(examine_prologue): Accept a pointer to an array of CORE_ADDR,
instead of the defunct struct frame_saved_regs. Recognize new
Sparc64 store instructions as part of the prologue. Ignore the
destination of a frame store when parsing the prologue (so long
as it's on the stack).
(sparc_push_dummy_frame): Fix incorrect buffer offset for PSTATE.
(sparc_frame_find_saved_regs): Accept a ptr to an array of CORE_ADDR
instead of the defunct struct frame_saved_regs.
(supply_gregset): Discard unnecessary 'zerobuf': just send NULL to
supply_register. Provide 4-byte offset to compensate for diff
between size of the prgreg_t elements on a 64-bit host and size
of the registers for a 32-bit target. Fill all inaccessible regs
with zero so they won't keep being requested again and again.
(fill_gregset): Handle 32/64 size difference between registers
and prgreg_t. Handle as many new 64-bit regs as possible.
(supply_fpregset, fill_fpregset): Attempt to handle 64-bit world.
(sparc_push_arguments): Rename to sparc32_push_arguments.
Copy arguments into registers as well as onto stack, so that the
CALL_DUMMY (code pushed onto the target stack) is not required.
(sparc_extract_return_value): Rename to sparc32_extract_return_value.
(sparc_store_return_value): Use memset instead of bzero.
Use write_register_gen instead of write_register_bytes.
(sparclet_store_return_value): New function.
(_initialize_sparc_tdep): Call register_gdbarch_init to activate
the gdbarch multi-architecture system.
(sp64_push_arguments): Rename to sparc64_push_arguments.
Extend to store arguments in general registers as well as on stack.
(sparc64_extract_return_value): Rename to sp64_extract_return_value.
Use as a private function, to be called by the new external function
sparc64_extract_return_value.
(sparclet_extract_return_value): New function.
(sparc32_stack_align, sparc64_stack_align, sparc32_register_name,
sparc64_register_name, sparc_print_extra_frame_info,
sparclite_register_name, sparclet_register_name,
sparc_push_return_address, sparc64_use_struct_convention,
sparc32_store_struct_return, sparc64_store_struct_return,
sparc32_register_virtual_type, sparc64_register_virtual_type,
sparc32_register_size, sparc64_register_size,
sparc32_register_byte, sparc64_register_byte,
sparc_gdbarch_skip_prologue, sparc_convert_to_virtual,
sparc_convert_to_raw, sparc_frame_init_saved_regs,
sparc_frame_address, sparc_gdbarch_fix_call_dummy,
sparc_coerce_float_to_double, sparc_call_dummy_address,
sparc_y_regnum, sparc_reg_struct_has_addr, sparc_intreg_size,
sparc_return_value_on_stack): New functions supporting multi-arch.
(sparc_gdbarch_init): New function; initialize multi-arch.
(struct gdbarch_tdep): Define, use for private multi-arch data.
* config/sparc/tm-sparc.h: Move definitions around, enclose with
#ifdef GDB_MULTI_ARCH tests, provide some multi-arch alternate
definitions. Add enums for register names, to help debugging gdb.
This header file must work for non-multi-arch and for multi-arch.
* config/sparc/tm-sp64.h: Add GDB_MULTI_ARCH configuration. Also add
AT_ENTRY_POINT definitions for CALL_DUMMY, for non-multi-arch case.
Define GDB_MULTI_ARCH.
* config/sparc/tm-sparclet.h: Add GDB_MULTI_ARCH configuration.
Do not define GDB_MULTI_ARCH (bfd does not correctly identify target).
* config/sparc/tm-sparclite.h: Ditto.
* config/sparc/tm-sun4sol2.h: Define GDB_MULTI_ARCH.
* sparclet-rom.c (sparclet_regnames): Initialize explicitly, to
avoid using deprecated REGISTER_NAMES macro.
* Makefile.in: Let sparc-tdep.c depend on arch-utils.h.
with the version name.
* config/djgpp/djconfig.sh: Use more warning switches.
* config/djgpp/fnchange.lst: Replace the leading gdb-0222 with the
@V@ placebo.
(mempool): Just free any buffer prior to reuse. Don't bother with realloc.
(flag_single_step): New function.
(skip_message): Detect "helpful" Windows CE messages and skip sending them to
the host.
(wait_for_debug_event): Use skip_message to avoid sending debug messages to the
host.
(dispatch): Prelimary implementation of single step detection.
* wince.c: Rework SH single stepping code to be more consistent with other
wince targets.
(handle_output_debug_string): Allow first chance exceptions to come through
since they seem to be all that we get on some versions of Windows CE.
(check_for_step): New function, conditionally compiled based on target.
(regptr): Delete obsolete function.
(handle_exception): Detect illegal instructions.
(get_child_debug_event): Return success only if event code matches target.
(child_create_inferior): Reflect change to get_child_debug_event arguments.
2000-04-20 Scott Bambrough <scottb@netwinder.org>
* arm-linux-nat.c (PIDGET, TIDGET): New.
(get_thread_id, GET_THREAD_ID): New.
(fetch_nwfpe_register, store_nwfpe_register): New.
(fetch_register, store_register): New.
(fetch_fpregister, store_fpregister): New.
(fill_gregset, supply_gregset): New.
(fill_fpregset, supply_fpregset): New.
(fetch_fpregs): Modified to use thread id's.
(store_fpregs): Modified to use thread id's and
fetch_nwfpe_register.
(fetch_regs): Modified to use thread id's.
(store_regs): Modified to use thread id's.
(fetch_inferior_registers): Modified to handle single register
fetches.
(store_inferior_registers): Modified to handle single register
stores.
(arm_linux_register_u_addr): Removed.
* configure.tgt: Added gdbserver to configdirs for arm*-*-linux*.
* config/arm/linux.mh
(NATDEPFILES): Removed core-aout.o. Added core-regset.o.
(LOADLIBES): Define.
* config/arm/nm-linux.h: Include config/nm-linux.h.
(ATTACH_DETACH): Removed. Defined in config/nm-linux.h.
(REGISTER_U_ADDR): Removed.
(SVR4_SHARED_LIBS): Removed. Defined in config/nm-linux.h.
(#include "solib.h"): Removed. Included via config/nm-linux.h.
* gdbarch.sh (IEEE_FLOAT): New entry.
* gdbarch.c, gdbarch.h: Regenerated.
* valprint.c (IEEE_FLOAT): Provide a default #definition for this.
(print_floating): Use IEEE_FLOAT as if it were an expression; use
the code specific to IEEE-format numbers whenever the value of
IEEE_FLOAT is non-zero.
* config/a29k/tm-a29k.h, config/alpha/tm-alpha.h,
config/arc/tm-arc.h, config/arm/tm-arm.h, config/fr30/tm-fr30.h,
config/h8300/tm-h8300.h, config/i386/tm-i386.h,
config/i960/tm-i960.h, config/m88k/tm-m88k.h,
config/mips/tm-mips.h, config/pa/tm-hppa.h,
config/sparc/tm-sparc.h, config/delta/tm-delta.h,
config/frv/tm-frv.h (IEEE_FLOAT): For all ports that #define
IEEE_FLOAT, make sure they give it the value (1).
* config/i386/tm-i386sol2.h (HAVE_I387_REGS): Define.
* i386v4-nat.c (supply_fpregset, fill_fpregset): Add code
to handle floating point registers if NUM_FREGS is not zero.
* ChangeLog: Correct date on last entry.
* arm-linux-tdep.c (arm_linux_push_arguments): New function.
* config/arm/tm-linux: Redefined PUSH_ARGUMENTS for Linux.
* config/arm/tm-embed: Fix build warning from redefinition of
LOWEST_PC.
* config/arm/tm-arm.h: Remove TARGET_BYTE_ORDER_SELECTABLE.
* config/arm/tm-wince.h: Remove TARGET_BYTE_ORDER_SELECTABLE and
TARGET_BYTE_ORDER. Add TARGET_BYTE_ORDER_SELECTABLE_P to
override default in tm-arm.h. Use default target byte order
from tm-arm.h.
Change to rely on PIDGET etc.
* config/i386/nm-i386sol2.h (TARGET_HAS_WATCHPOINTS,
TARGET_CAN_USE_HARDWARE_WATCHPOINT, HAVE_CONTINUABLE_WATCHPOINT,
STOPPED_BY_WATCHPOINT, target_[insert/remove]_watchpoint):
define. Allow target to use procfs hardware watchpoints.
* config/sparc/nm-sun4sol2.h: ditto.
* config/i386/tm-i386sol2.h (PIDGET, TIDGET, MERGEPID): modify
definitions to use 16 bits for the pid, 15 bits for the tid, and
1 bit for the flag.
* config/sparc/tm-sun4sol2.h: ditto.
(SOFTWARE_SINGLE_STEP, SOFTWARE_SINGLE_STEP_P): undefine.
* testsuite/gdb.threads/pthreads.exp (all_threads_running): Allow
for more than 15 thread increments.
dependencies. Created ARM Linux specific arm-linux-tdep.c file and moved
missing code into it from arm-linux-nat.c.
2000-04-05 Scott Bambrough <scottb@netwinder.org>
* arm-linux-tdep.c: New file.
* arm-linux-nat.c (fetch_fpregs): Remove unused code.
(arm_get_longjmp_target): Moved it and all defines
it uses to arm-linux-tdep.c.
(arm_linux_extract_return_value): Moved to
arm-linux-tdep.c.
* config/arm/linux.mt: Add arm-linux-tdep.c to TDEPFILES.
* config/i386/tm-go32.h (TARGET_LONG_DOUBLE_BIT): Remove
definition (and use the common one in tm-i386.h).
(REGISTER_CONVERT_TO_VIRTUAL, REGISTER_CONVERT_TO_RAW): Likewise.
(I386_DJGPP_TARGET): Don't define, it's no longer required.
(LOW_RETURN_REGNUM, HIGH_RETURN_REGNUM): Remove definition,
i386-tdep.c defines it for all x86 targets.
(LD_I387, HEX_LONG_DOUBLE_INPUT): Remove.
* config/djgpp/fnchange.lst: Add i386-linux-tdep.c.
* config/djgpp/djcheck.sh: Edit the copyright year out of the test
results. Fix editing of `main' arguments for non-GNU Sed.
and P_LINK_W.
(P_PEA_FP, P_MOVL_SP_FP): New macros.
(P_MOVL, P_LEAL, P_MOVML): Macros renamed from P_MOV_L, P_LEA_L and
P_MOVM_L.
(altos_skip_prologue, isi_skip_prologue): Use P_* macros, not octal
constants.
(delta68_in_sigtramp): New function.
(delta68_frame_args_address, delta68_frame_saved_pc): Ditto.
(m68k_skip_prologue): Use P_* macros, not hex constants.
(m68k_find_saved_regs): Do not expect a fixed sequence of register save
instructions, but accept them in any order; use P_* macros, not octal
or hex constants; recognize also `fmovemx to (fp + displacement)' and
`moveml to (fp + displacement)'.
* m68/tm-delta68.h (IN_SIGTRAMP): New macro.
(FRAME_SAVED_PC, FRAME_ARGS_ADDRESS): Ditto.
* config/i386/tm-i386aix.h (I386_AIX_TARGET): Remove.
* config/i386/tm-linux.h (LOW_RETURN_REGNUM, HIGH_RETURN_REGNUM):
Remove
* i386-tdep.c (LOW_RETURN_REGNUM, HIGH_RETURN_REGNUM): New defines.
(i386_extract_return_value): Rewritten. Correctly support all
floating-point types and large integer types on targets that use
the standard i386 GDB register layout and return floating-point
values in the FPU.
(LINUX_SIGTRAMP_INSN0, LINUX_SIGTRAMP_OFFSET0,
LINUX_SIGTRAMP_INSN1, LINUX_SIGTRAMP_OFFSET1,
LINUX_SIGTRAMP_INSN2, LINUX_SIGTRAMP_OFFSET2, linux_sigtramp_code,
LINUX_SIGTRAMP_LEN, i386_linux_sigtramp_start,
LINUX_RT_SIGTRAMP_INSN0, LINUX_RT_SIGTRAMP_OFFSET0,
LINUX_RT_SIGTRAMP_INSN1, LINUX_RT_SIGTRAMP_OFFSET1,
linux_rt_sigtramp_code, LINUX_RT_SIGTRAMP_LEN,
i386_linux_rt_sigtramp_start, i386_linux_in_sigtramp,
i386_linux_sigcontext_addr, LINUX_SIGCONTEXT_PC_OFFSET,
i386_linux_sigtramp_saved_pc, LINUX_SIGCONTEXT_SP_OFFSET,
i386_linux_sigtramp_saved_sp): Deleted. Folks rightly pointed
out that these are target-dependent, and useful in non-native
configurations. Moved to...
* i386-linux-tdep.c: ... Here, a new file.
* Makefile.in (ALLDEPFILES): Add i386-linux-tdep.c.
(i386-linux-tdep.o): New rule.
(i386-linux-nat.o): We no longer depend on frame.h.
* config/i386/linux.mt (TDEPFILES): Add i386-linux-tdep.o.
* event-loop.c (top-level) [NO_FD_SET]: Deprecate this branch.
Print an error at compile time if we are to use select, but FD_SET
is not available.
(SELECT_MASK, NBBY, FD_SETSIZE, NFDBITS, MASK_SIZE): Define only
if HAVE_POLL is not defined and NO_FD_SET *is* defined.
(create_file_handler) [!HAVE_POLL]: Use FD_SET and FD_CLR.
(delete_file_handler) [!HAVE_POLL]: Use FD_CLR and FD_ISSET.
(gdb_wait_for_event) [!HAVE_POLL]: Copy fd_set sets directly
instead of using memcpy and memset. Use FD_ISSET.
* config/i386/xm-go32.h (fd_mask): Remove typedef.
it:
* config/djgpp/djconfig.sh: New file.
* config/djgpp/config.sed: New file.
* config/djgpp/README: New file.
* config/djgpp/fnchange.lst: New file.
* config/djgpp/djcheck.sh: New file.
LINUX_SIGTRAMP_INSN1, LINUX_SIGTRAMP_OFFSET1,
LINUX_SIGTRAMP_INSN2, LINUX_SIGTRAMP_OFFSET2, linux_sigtramp_code,
LINUX_SIGTRAMP_LEN, i386_linux_sigtramp_start,
LINUX_RT_SIGTRAMP_INSN0, LINUX_RT_SIGTRAMP_OFFSET0,
LINUX_RT_SIGTRAMP_INSN1, LINUX_RT_SIGTRAMP_OFFSET1,
linux_rt_sigtramp_code, LINUX_RT_SIGTRAMP_LEN,
i386_linux_rt_sigtramp_start, i386_linux_in_sigtramp,
i386_linux_sigcontext_addr, LINUX_SIGCONTEXT_PC_OFFSET,
i386_linux_sigtramp_saved_pc, LINUX_SIGCONTEXT_SP_OFFSET,
i386_linux_sigtramp_saved_sp): Deleted. These all implement
Linux-specific signal trampoline detection, and should be moved to...
* i386-linux-nat.c: ... here.
* config/i386/tm-linux.h (I386_LINUX_SIGTRAMP): No need to define
this any more, since we're not enabling OS-specific code in a
OS-independent file.
Allow GDB to run on Linux 2.0 again.
* config.in: Add HAVE_PTRACE_GETREGS.
* configure.in: Check if <sys/ptrace.h> defines PTRACE_GETREGS.
* configure: Regenerated.
* config/i386/nm-linux.h (CANNOT_FETCH_REGISTER,
CANNOT_STORE_REGISTER): New defines.
* i386-linux-nat.c (have_ptrace_getregs): New variable.
(PTRACE_XFER_TYPE, CANNOT_FETCH_REGISTER, fetch_register,
old_fetch_inferior_registers, CANNOT_STORE_REGISTER,
store_register, old_store_inferior_registers): Copied over from
`inptrace.c' as a temporary measure.
(fetch_regs, store_regs, fetch_fpregs, store_fpregs):
Conditionalize on HAVE_PTRACE_GETREGS. Define stubs if
HAVE_PTRACE_GETREGS isn't defined.
(fetch_regs): Reset `have_ptrace_getregs' if ptrace call fails
with EIO.
(fetch_inferior_registers, store_inferior_registers): Fall back on
the method use in `infptrace.c' (by calling
old_fetch_inferior_registers and old_store_inferior_registers) if
`have_ptrace_getregs' isn't set.
Fix support for Linux/i386 signal trampolines. The old approach
didn't work for Linux 2.2 and beyond, and didn't work with recent
versions of the GNU C library.
* i386-tdep.c (LINUX_RT_SIGTRAMP_INSN0, LINUX_RT_SIGTRAMP_OFFSET0,
LINUX_RT_SIGTRAMP_INSN1, LINUX_RT_SIGTRAMP_OFFSET1): New defines.
(linux_rt_sigtramp_code): New variable.
(LINUX_RT_SIGTRAMP_LEN): New define.
(i386_linux_rt_sigtramp_start): New function. Detect start of
signal trampolines for RT signals.
(i386_linux_sigtramp): Removed.
(i386_linux_in_sigtramp): New function.
(i386_linux_sigcontext_addr): New function. Recognize the names
of the signal tranmpolines used by recent versions of the GNU C
library, and add support for RT signals.
(LINUX_SIGCONTEXT_PC_OFFSET, LINUX_SIGCONTEXT_SP_OFFSET): New
defines. Moved here from config/i386/tm-linux.h.
(i386_linux_sigtramp_saved_pc, i386_linux_sigtramp_saved_sp):
Reimplement in terms of i386_linux_sigcontext_addr.
* config/i386/tm-linux.h (LINUX_SIGCONTEXT_SIZE): Removed.
(LINUX_SIGCONTEXT_PC_OFFSET, LINUX_SIGCONTEXT_SP_OFFSET):
Moved to i386-tdep.c.
(IN_SIGTRAMP): Redefine to call i386_linux_in_sigtramp.
