Before GCC 4.9, -flto is required for final LTO link. Add -flto to PR
ld/20321 test to support older versions of GCC.
* testsuite/ld-plugin/lto.exp: Add -flto to PR ld/20321 test.
Commit 38b022b445 adds "method" and
"format" fields in =record-started, but doesn't update test case
gdb.mi/mi-reverse.exp, so it causes the fail like this,
PASS: gdb.mi/mi-reverse.exp: mi runto main
Expecting: ^(-interpreter-exec console record[^M
]+)?(=record-started,thread-group="i1"^M
\^done[^M
]+[(]gdb[)] ^M
[ ]*)
-interpreter-exec console record^M
=record-started,thread-group="i1",method="full"^M
^done^M
(gdb) ^M
FAIL: gdb.mi/mi-reverse.exp: Turn on process record
and regression was found by buildbot too
https://sourceware.org/ml/gdb-testers/2016-q2/msg04492.html
gdb/testsuite:
2016-07-05 Yao Qi <yao.qi@linaro.org>
* gdb.mi/mi-reverse.exp: Match =record-started output.
2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
* elf32-arm.c (THUMB32_MOVT): New veneer macro.
(THUMB32_MOVW): Likewise.
(elf32_arm_stub_long_branch_thumb2_only_pure): New.
(DEF_STUBS): Define long_branch_thumb2_only_pure.
(arm_stub_is_thumb): Add new veneer stub.
(arm_type_of_stub): Use new veneer.
(arm_stub_required_alignment): Add new veneer.
2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
* testsuite/ld-arm/farcall-thumb2-purecode.d: New test result.
* testsuite/ld-arm/farcall-thumb2-purecode.s: New test.
* testsuite/ld-arm/arm-elf.exp: Run it.
A missing 'r' (or wrong 'e') register prefix needs to be complained
about if the template allows for a 64-bit register, not a 32-bit one.
I assume this was a copy-and-paste type of mistake
(from check_long_reg()).
If a plugin has been loaded already, we should warn and return, instead
of adding it on the plugin list.
PR ld/20321
* plugin.c (plugin_opt_plugin): Warn and return if plugin has
been loaded already.
* testsuite/ld-plugin/lto.exp: Run PR ld/20321 test.
* testsuite/ld-plugin/pr20321.c: New file.
* scripttempl/ft32.sc (__PMSIZE_): If not defined, set to 256K.
(__RAMSIZE): If not defined, set to 64K.
(MEMORY): Set the flash region size to __PMSIZE and the ram region
size to __RAMSIZE.
Move `branch-misc-2' tests for non locally-defined-global symbols into
separate files. These tests have been introduced with:
commit 6f171daac9
Author: Alexandre Oliva <aoliva@redhat.com>
Date: Thu Dec 12 04:40:22 2002 +0000
<https://sourceware.org/ml/binutils/2002-11/msg00631.html>, ("mips:
branches to external labels are broken"), and:
commit d17b874b6c
Author: Alexandre Oliva <aoliva@redhat.com>
Date: Wed Mar 12 23:07:22 2003 +0000
<https://sourceware.org/ml/binutils/2003-03/msg00136.html>, ("On
resolving the MIPS gas branch reloc issue"), while the test case served
a different purpose. With the original intent of the test case brought
back with:
commit bad36eacda
Author: Daniel Jacobowitz <drow@false.org>
Date: Wed Nov 23 14:04:18 2005 +0000
<https://sourceware.org/ml/binutils/2005-11/msg00324.html>,
("R_MIPS_PC16, again"), these stand in the way for linker testing.
gas/
* testsuite/gas/mips/branch-misc-2.s: Move non
locally-defined-global symbol tests...
* testsuite/gas/mips/branch-misc-5.s: ... to this new test.
* testsuite/gas/mips/branch-misc-2.d: Update accordingly.
* testsuite/gas/mips/branch-misc-2-64.d: Likewise.
* testsuite/gas/mips/branch-misc-2pic.d: Likewise.
* testsuite/gas/mips/branch-misc-2pic-64.d: Likewise.
* testsuite/gas/mips/mipsr6@branch-misc-2-64.d: Likewise.
* testsuite/gas/mips/mipsr6@branch-misc-2pic-64.d: Likewise.
* testsuite/gas/mips/micromips@branch-misc-2.d: Likewise.
* testsuite/gas/mips/micromips@branch-misc-2-64.d: Likewise.
* testsuite/gas/mips/micromips@branch-misc-2pic.d: Likewise.
* testsuite/gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
* testsuite/gas/mips/branch-misc-5.d: New test.
* testsuite/gas/mips/branch-misc-5pic.d: New test.
* testsuite/gas/mips/branch-misc-5-64.d: New test.
* testsuite/gas/mips/branch-misc-5pic-64.d: New test.
* testsuite/gas/mips/mipsr6@branch-misc-5-64.d: New test.
* testsuite/gas/mips/mipsr6@branch-misc-5pic-64.d: New test.
* testsuite/gas/mips/micromips@branch-misc-5.d: New test.
* testsuite/gas/mips/micromips@branch-misc-5pic.d: New test.
* testsuite/gas/mips/micromips@branch-misc-5-64.d: New test.
* testsuite/gas/mips/micromips@branch-misc-5pic-64.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
Some analysis we did here showed that increasing the cap on the
transfer size in target.c:memory_xfer_partial could give 20% or more
improvement in remote load across JTAG. Transfer sizes were capped
to 4K bytes because of performance problems encountered with the
restore command, documented here:
https://sourceware.org/ml/gdb-patches/2013-07/msg00611.html
and in commit 67c059c29e ("Improve performance of large restore
commands").
The 4K cap was introduced because in a case where the restore command
requested a 100MB transfer, memory_xfer_partial would repeatedy
allocate and copy an entire 100MB buffer in order to properly handle
breakpoint shadow instructions, even though memory_xfer_partial would
actually only write a small portion of the buffer contents.
A couple of alternative solutions were suggested:
* change the algorithm for handling the breakpoint shadow instructions
* throttle the transfer size up or down based on the previous actual
transfer size
I tried implementing the throttling approach, and my implementation
reduced the performance in some cases.
This patch implements a new target function that returns that target's
limit on memory transfer size. It defaults to ULONGEST_MAX bytes,
because for native targets there is no marshaling and thus no limit is
needed. For remote targets it uses get_memory_write_packet_size.
gdb/ChangeLog:
* remote.c (remote_get_memory_xfer_limit): New function.
* target-delegates.c: Regenerate.
* target.c (memory_xfer_partial): Call
target_ops.to_get_memory_xfer_limit.
* target.h (struct target_ops)
<to_get_memory_xfer_limit>: New member.
Feature flag handling was not perfect, +nofp16 disabled fp
instructions too.
New feature flag macros were added to check features with multiple
bits set (matters for FP_F16 and SIMD_F16 opcode feature tests).
The unused AARCH64_OPCODE_HAS_FEATURE was removed, all checks should
use one of the AARCH64_CPU_HAS_* macros. AARCH64_CPU_HAS_FEATURE
now checks all feature bits.
The aarch64_features table now contains the dependencies as
a separate field (so when the feature is enabled all dependencies
are enabled and when it is disabled everything that depends on it
is disabled).
Note that armv8-a+foo+nofoo is not equivalent to armv8-a if
+foo turns on dependent features that nofoo does not turn off.
gas/
* config/tc-aarch64.c (struct aarch64_option_cpu_value_table): Add
require field.
(aarch64_features): Initialize require fields.
(aarch64_parse_features): Handle dependencies.
(aarch64_feature_enable_set, aarch64_feature_disable_set): New.
(md_assemble): Use AARCH64_CPU_HAS_ALL_FEATURES.
* testsuite/gas/aarch64/illegal-nofp16.s: New.
* testsuite/gas/aarch64/illegal-nofp16.l: New.
* testsuite/gas/aarch64/illegal-nofp16.d: New.
include/
* opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
(AARCH64_CPU_HAS_ANY_FEATURES): New.
(AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
(AARCH64_OPCODE_HAS_FEATURE): Remove.
FreeBSD does not currently report a ptrace event for a parent process
after it resumes due to the child exiting the shared memory region after
a vfork. Take the same approach used in linux-nat.c in this case of
sleeping for a while and then reporting a fake VFORK_DONE event.
gdb/ChangeLog:
* fbsd-nat.c (struct fbsd_fork_child_info): Rename to ...
(struct fbsd_fork_info): ... this.
(struct fbsd_fork_info) <child>: Rename to ...
(struct fbsd_fork_info) <ptid>: ... this.
(fbsd_pending_children): Update type.
(fbsd_remember_child): Update type and field name.
(fbsd_is_child_pending): Likewise.
(fbsd_pending_vfork_done): New variable.
(fbsd_is_vfork_done_pending): New function.
(fbsd_next_vfork_done): New function.
(fbsd_resume): Don't resume processes with a pending vfork done
event.
(fbsd_wait): Report pending vfork done events.
(fbsd_follow_fork): Delay and record a pending vfork done event
for a vfork parent when detaching the child.
Only detach from the new child process in the follow fork callback
if detach_fork is true.
gdb/ChangeLog:
* fbsd-nat.c (fbsd_follow_fork): Only detach child if
"detach_fork" is true.
2016-07-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (using_thumb2_bl): New function.
(arm_type_of_stub): Declare thumb2 variable together and change type
to bfd_boolean. Use using_thumb2_bl () to determine whether
THM_MAX_FWD_BRANCH_OFFSET or THM2_MAX_FWD_BRANCH_OFFSET should be
checked for BL range.
(elf32_arm_final_link_relocate): Use using_thumb2_bl () to determine
the bit size of BL offset.
ld/
* testsuite/ld-arm/arm-elf.exp (Thumb-2 BL): Assemble for ARMv7.
(Thumb-2 BL on ARMv6-M): New testcase.
* testsuite/ld-arm/thumb2-bl.d: Do not try to match testcase filename.
* testsuite/ld-arm/thumb2-bl.s: Do not select architecture.
Move the debug register support code from amd64bsd-nat.c and
i386bsd-nat.c into a shared x86bsd-nat.c.
Instead of setting up x86_dr_low in amd64fbsd-nat.c and
i386fbsd-nat.c, add a x86bsd_target function that creates a new target
that inherits from inf_ptrace and sets up x86 debug registers if
supported. In addition to initializing x86_dr_low, the x86bsd target
installs a custom mourn_inferior target operation to clean up the
x86 debug register state. Previously this was only done on amd64.
Now it will be done for both i386 and amd64. The i386bsd_target and
amd64bsd_target functions create targets that inherit from x86bsd
rather than inf_ptrace.
gdb/ChangeLog:
* Makefile.in [HFILES_NO_SRCDIR]: Replace 'amd64bsd-nat.h' with
'x86bsd-nat.h'.
* amd64bsd-nat.c: Include 'x86bsd-nat.h' instead of
'amd64bsd-nat.h'.
(amd64bsd_xsave_len): Rename and move to x86bsd-nat.c.
(amd64bsd_fetch_inferior_registers): Replace 'amd64bsd_xsave_len'
with 'x86bsd_xsave_len'.
(amd64bsd_store_inferior_registers): Likewise.
(amd64bsd_target): Inherit from x86bsd_target.
(amd64bsd_dr_get): Rename and move to x86bsd-nat.c.
(amd64bsd_dr_set): Likewise.
(amd64bsd_dr_set_control): Likewise.
(amd64bsd_dr_set_addr): Likewise.
(amd64bsd_dr_get_addr): Likewise.
(amd64bsd_dr_get_status): Likewise.
(amd64bsd_dr_get_control): Likewise.
* amd64fbsd-nat.c: Include 'x86bsd-nat.h' instead of
'amd64bsd-nat.h'.
(super_mourn_inferior): Move to x86bsd-nat.c.
(amd64fbsd_mourn_inferior): Rename and move to x86bsd-nat.c.
(amd64fbsd_read_description): Replace 'amd64bsd_xsave_len' with
'x86bsd_xsave_len'.
(_initialize_amd64fbsd_nat): Remove x86 watchpoint setup and
mourn_inferior' target op.
* config/i386/fbsd.mh (NATDEPFILES): Add x86bsd-nat.o.
* config/i386/fbsd64.mh: Likewise.
* config/i386/nbsd64.mh: Likewise.
* config/i386/nbsdelf.mh: Likewise.
* config/i386/obsd.mh: Likewise.
* config/i386/obsd64.mh: Likewise.
* i386bsd-nat.c: Include 'x86bsd-nat.h'.
(i386bsd_xsave_len): Rename and move to x86bsd-nat.c.
(i386bsd_fetch_inferior_registers): Replace 'i386bsd_xsave_len'
with 'x86bsd_xsave_len'.
(i386bsd_store_inferior_registers): Likewise.
(i386bsd_target): Inherit from x86bsd_target.
(i386bsd_dr_get): Rename and move to x86bsd-nat.c.
(i386bsd_dr_set): Likewise.
(i386bsd_dr_set_control): Likewise.
(i386bsd_dr_set_addr): Likewise.
(i386bsd_dr_get_addr): Likewise.
(i386bsd_dr_get_status): Likewise.
(i386bsd_dr_get_control): Likewise.
* i386bsd-nat.h (i386bsd_xsave_len): Remove.
(i386bsd_dr_set_control): Remove.
(i386bsd_dr_set_addr): Remove.
(i386bsd_dr_get_addr): Remove.
(i386bsd_dr_get_status): Remove.
(i386bsd_dr_get_control): Remove.
* i386fbsd-nat.c: Include 'x86bsd-nat.h'.
(i386fbsd_read_description): Replace 'i386bsd_xsave_len' with
'x86bsd_xsave_len'.
(_initialize_i386fbsd_nat): Remove x86 watchpoint setup and
mourn_inferior' target op.
* x86bsd-nat.c: New file.
* x86bsd-nat.h: New file.
binutuils* prdbg.c (pr_enum_type): Use a buffer big enough to hold an
extremely large decimal value.
(pr_range_type): Likewise.
(pr_array_type): Likewise.
(pr_struct_field): Likewise.
(pr_class_baseclass): Likewise.
(pr_class_method_variant): Likewise.
(pr_tag_type): Likewise.
(pr_int_constant): Likewise.
(pr_typed_constant): Likewise.
(pr_variable): Likewise.
(pr_function_parameter): Likewise.
(pr_start_block): Likewise.
(pr_lineno): Likewise.
(pr_end_block): Likewise.
(tg_enum_type): Likewise.
(tg_int_constant): Likewise.
(tg_typed_constant): Likewise.
(tg_start_block): Likewise.
gas * macro.c (macro_expand_body): Use a buffer big enough to hold an
extremely large integer.
The jit-reader.exp test isn't really exercising the jit-reader's
unwinder API at all. This commit address that, and then fixes GDB
problems exposed.
- The custom JIT reader provided for the jit-reader.exp testcase
always rejects the jitted function's frame...
This is because the custom JIT reader in the testcase never ever
sets state->code_begin/end, so the bounds check in
gdb.base/jitreader.c:unwind_frame:
if (this_ip >= state->code_end || this_ip < state->code_begin)
return GDB_FAIL;
tends to fail, unless you're "lucky" (because it references
uninitialized data).
The result is that GDB is always actually using a built-in unwinder
for the jitted function.
- The provided unwinder doesn't do anything that GDB's built-in
unwinder can't do.
IOW, we can't really tell whether the JIT reader's unwinder is
working or not.
I fixed that by making the jitted function mangle its own stack
pointer with a xor, and then teaching the jit unwinder to demangle
it back (another xor). So now "backtrace" with GDB's built-in
unwinder fails while with the jit unwinder, it succeeds.
- GDB crashes after unloading the JIT reader, and flushing frames...
I made the testcase use the "flushregs" command after unloading the
JIT reader, to force the JIT frames to be flushed. However, that
crashes GDB...
When reinit_frame_cache tears down a frame's cache, it calls its
unwinder's dealloc_cache method, which for JIT frames ends up in
jit.c:jit_dealloc_cache. This function calls each of the frame's
gdb_reg_value's "free" pointer:
for (i = 0; i < gdbarch_num_regs (frame_arch); i++)
if (priv_data->registers[i] && priv_data->registers[i]->free)
priv_data->registers[i]->free (priv_data->registers[i]);
and the problem is these gdb_reg_value instances have been returned
by the JIT reader that has been already unloaded, and their "free"
function pointers likely point to functions in the DSO that has
already been unloaded...
A fix for that could be to call reinit_frame_cache in
jit_reader_unload_command _before_ unloading the jit reader DSO so
that the jit reader is given a chance to clean up the gdb_reg_values
before it is unloaded. However, the fix for the point below makes
this unnecessary, because it stops jit.c from keeping around
gdb_reg_values in the first place.
- However, it still makes sense to clear the frame cache when loading
or unloading a JIT unwinder.
This makes testing a JIT unwinder a bit simpler.
- Not only the frame cache actually -- gdb is not unloading the
jit-registered objfiles when the JIT reader is unloaded, and not
loading the already-registered descriptors when a JIT reader is
loaded.
The new test exercises unloading the jit reader, loading it back
again, and then making sure the JIT reader's unwinder works again.
Without the unload/re-load of already-read descriptors, the newly
loaded JIT would have no idea where the new function is, because
it's stored at symbol read time.
- I added a couple "info frame" calls to the test, and that
crashes GDB...
The problem is that jit_frame_prev_register assumes it'll only be
called for raw registers, so when it gets a pseudo register number,
the "priv->registers[reg]" access is really an out-of-bounds access.
To fix that, I made jit_frame_prev_register use
gdbarch_pseudo_register_read_value for reading the pseudo-registers.
However, that works with a regcache and we don't have one. To fix
that, I made the JIT unwinder store a regcache in its cache instead
of an array of gdb_reg_value pointers.
gdb/ChangeLog:
2016-07-01 Pedro Alves <palves@redhat.com>
Tom Tromey <tom@tromey.com>
* jit.c (jit_reader_load_command): Call reinit_frame_cache and
jit_inferior_created_hook.
(jit_reader_unload_command): Call reinit_frame_cache and
jit_inferior_exit_hook.
* jit.c (struct jit_unwind_private) <registers>: Delete field.
<regcache>: New field.
(jit_unwind_reg_set_impl): Set the register's value in the
regcache. Free the passed-in gdb_reg_value.
(jit_dealloc_cache): Adjust to free the regcache.
(jit_frame_sniffer): Allocate a regcache instead of an array of
gdb_reg_value pointers.
(jit_frame_this_id): Adjust.
(jit_frame_prev_register): Read raw registers off of the regcache
instead of from the gdb_reg_value pointer array. Use
gdbarch_pseudo_register_read_value to read pseudo registers.
* regcache.c (regcache_raw_set_cached_value): New function,
factored out from ...
(regcache_raw_write): ... here.
* regcache.h (regcache_raw_set_cached_value): Declare.
gdb/testsuite/ChangeLog:
2016-07-01 Pedro Alves <palves@redhat.com>
* gdb.base/jit-reader.exp (info_registers_current_frame): New
procedure.
(jit_reader_test): Test the jit reader's unwinder.
* gdb.base/jithost.c (jit_function_00_code): New global.
(main): Use memcpy to fill in the mmapped code, instead of poking
bytes manually here.
* gdb.base/jitreader.c (enum register_mapping) <AMD64_RBP>: New
value.
(read_debug_info): Save the function's range.
(read_sp): New function.
(unwind_frame): Use it. Also unwind RBP.
(get_frame_id): Use read_sp.
(gdb_init_reader): Use calloc instead of malloc.
* lib/gdb.exp (get_hexadecimal_valueof): Add optional 'test'
parameter. Use gdb_test_multiple.
This commit fixes detaching on Linux when some thread exits the whole
thread group (process) just while we're detaching.
On Linux, a ptracer must detach from each LWP individually, with
PTRACE_DETACH. Since PTRACE_DETACH sets the thread running free, if
one of the already-detached threads causes the whole thread group to
exit (e.g., simply calls exit), the kernel force-kills the other
threads in the group, making them zombie, just as we're still
detaching them. Since PTRACE_DETACH against a zombie thread fails
with ESRCH, and gdb/gdbserver are not expecting this, the detach fails
with an error like: "Can't detach process: No such process.".
This patch detects this detach failure as normal, and instead of
erroring out, reaps the now-dead thread.
New test included, that exercises several different scenarios that
cause GDB/GDBserver to error out when it should not.
Tested on x86-64 GNU/Linux with {unix, native-gdbserver,
native-extended-gdbserver}
Note: without the previous fix, the "single-process + continue"
variant of the new test would fail with:
(gdb) PASS: gdb.threads/process-dies-while-detaching.exp: single-process: continue: watchpoint: switch to parent
continue
Continuing.
Warning:
Could not insert hardware watchpoint 3.
Could not insert hardware breakpoints:
You may have requested too many hardware breakpoints/watchpoints.
Command aborted.
(gdb) FAIL: gdb.threads/process-dies-while-detaching.exp: single-process: continue: watchpoint: continue
gdb/gdbserver/ChangeLog:
2016-07-01 Pedro Alves <palves@redhat.com>
Antoine Tremblay <antoine.tremblay@ericsson.com>
* linux-low.c: Change interface to take the target lwp_info
pointer directly and return void. Handle detaching from a zombie
thread.
(linux_detach_lwp_callback): New function.
(linux_detach): Detach from the leader thread after detaching from
the clone threads.
gdb/ChangeLog:
2016-07-01 Pedro Alves <palves@redhat.com>
Antoine Tremblay <antoine.tremblay@ericsson.com>
* inf-ptrace.c (inf_ptrace_detach_success): New function, factored
out from ...
(inf_ptrace_detach): ... here.
* inf-ptrace.h (inf_ptrace_detach_success): New declaration.
* linux-nat.c (get_pending_status): Rename to ...
(get_detach_signal): ... this, and return a host signal instead of
filling in a wait status.
(detach_one_lwp): New function, factored out from detach_callback
and adjusted to handle detaching from a zombie thread.
(detach_callback): Skip the leader thread.
(linux_nat_detach): No longer defer to inf_ptrace_detach to detach
the leader thread, nor build a signal string to pass down.
Instead, use target_announce_detach, detach_one_lwp and
inf_ptrace_detach_success.
gdb/testsuite/ChangeLog:
2016-07-01 Pedro Alves <palves@redhat.com>
Antoine Tremblay <antoine.tremblay@ericsson.com>
* gdb.threads/process-dies-while-detaching.c: New file.
* gdb.threads/process-dies-while-detaching.exp: New file.
If you have two inferiors (or more), set watchpoints in one of the
inferiors, and then that inferior exits, until you manually delete the
watchpoint (or something forces a breakpoint re-set), you can't resume
the other inferior.
This is exercised by the test added by this commit. Without the GDB
fix, this test fails like this:
FAIL: gdb.multi/watchpoint-multi-exit.exp: dispose=kill: continue to marker in inferior 1
FAIL: gdb.multi/watchpoint-multi-exit.exp: dispose=detach: continue to marker in inferior 1
FAIL: gdb.multi/watchpoint-multi-exit.exp: dispose=exit: continue to marker in inferior 1
and gdb.log shows (in all three cases):
(gdb) continue
Continuing.
Warning:
Could not insert hardware watchpoint 2.
Could not insert hardware breakpoints:
You may have requested too many hardware breakpoints/watchpoints.
Command aborted.
(gdb) FAIL: gdb.multi/watchpoint-multi-exit.exp: dispose=kill: continue to marker in inferior 1
The problem is that GDB doesn't forget about the locations of
watchpoints set in the inferior that is now dead. When we try to
continue the inferior that is still alive, we reach
insert_breakpoint_locations, which has the the loop that triggers the
error:
/* If we failed to insert all locations of a watchpoint, remove
them, as half-inserted watchpoint is of limited use. */
That loop finds locations that are not marked inserted, but which
according to should_be_inserted should have been inserted, and so
errors out.
gdb/ChangeLog:
2016-07-01 Pedro Alves <palves@redhat.com>
* breakpoint.c (breakpoint_init_inferior): Discard watchpoint
locations.
* infcmd.c (detach_command): Call breakpoint_init_inferior.
gdb/testsuite/ChangeLog:
2016-07-01 Pedro Alves <palves@redhat.com>
* gdb.multi/watchpoint-multi-exit.c: New file.
* gdb.multi/watchpoint-multi-exit.exp: New file.
Several targets have a copy of the same code that prints
"Detaching from program ..."
in their target_detach implementation. Factor that out to a common
function.
(For now, I left the couple targets that print this a bit differently
alone. Maybe this could be further pulled out into infcmd.c. If we
did that, and those targets want to continue printing differently,
this new function could be converted to a target method.)
gdb/ChangeLog:
2016-07-01 Pedro Alves <palves@redhat.com>
* darwin-nat.c (darwin_detach): Use target_announce_detach.
* inf-ptrace.c (inf_ptrace_detach): Likewise.
* nto-procfs.c (procfs_detach): Likewise.
* remote.c (remote_detach_1): Likewise.
* target.c (target_announce_detach): New function.
* target.h (target_announce_detach): New declaration.
* testsuite/binutils-all/objcopy.exp
(objcopy_test_without_global_symbol): Expect this test to fail on
the AArch64 and ARM targets, since they preserve their mapping
symbols.
While address overrides are ignored in 64-bit mode (and hence shouldn't
really result in an error, but upon v1 converting this to a warning I
was told otherwise), trying to use 16-bit addressing is documented to
result in #UD, and hence the assembler should reject the attempt. (The
added test case at once also checks that bndc{l,n,u} won't accept
16-bit register operands.)
... due to their last byte looking like a suffix, when after its
stripping a matching instruction can be found. Since memory operand
size specifiers in Intel mode get converted into suffix representation
internally, we need to keep track of the actual mnemonic suffix which
may have got trimmed off, and check its validity while looking for a
matching template. I tripper over this quite some time again after
support for AMD's SSE5 instructions got removed, as at that point some
of the SSE5 mnemonics, other than expected, didn't fail to assemble.
But the problem affects many more instructions, namely (almost) all
MMX, SSE, and AVX ones as it looks. I don't think it makes sense to
add a testcase covering all of them, nor do I think it makes sense to
pick out some random examples for a new test case.
... just like is already the case for 16- and 32-bit movzb: I can't see
why omitting suffixes on this (and movs{b,w,l}) is not allowed, when it
is allowed for all other instructions where the suffix is redundant
with (one of) the operands.
The dual purpose mnemonic (string move vs scalar double move) breaks
the assumption that the isstring flag would be set on both the first
and last entry in the current set of templates, which results in bogus
or missing diagnostics for the string move variant of the mnemonic.
Short of mostly rewriting i386_index_check() and its interaction with
the rest of the code, simply shrink the template set to just string
instructions when encountering the second memory operand, and run
i386_index_check() a second time for the first memory operand after
that reduction.
This patch fixes the typo "uf" in the comment. I'll push it in as the
change is obvious.
2016-06-30 Yao Qi <yao.qi@linaro.org>
* arm-dis.c (print_insn): Fix typo in comment.
Fix an assertion failure like:
test.s: Assembler messages:
test.s:3: Internal error!
Assertion failure in append_insn at .../gas/config/tc-mips.c:7523.
Please report this bug.
triggered by assembling MIPS16 code like:
hello:
addiu $4, $4, 4
jr $31
with the generation of a listing file enabled, e.g.:
$ as -mips16 -O2 -aln=test.lst
The cause of the problem is the lack of support for moving instructions
across frags in MIPS16 jump swapping, which triggers more easily with
listing enabled as in that case every instruction gets placed in its own
frag. It would trigger even with listing disabled though if the
instruction to swap a MIPS16 jump with was unfortunately enough placed
as last in a frag that became full.
This scenario is already handled correctly with branch swapping in
regular MIPS and microMIPS code, so reuse it for MIPS16 code as well,
and now that all MIPS16 handling has become the same as the regular MIPS
and microMIPS cases remove MIPS16 special casing altogether.
This effectively complements:
commit 464ab0e55a
Author: Maciej W. Rozycki <macro@linux-mips.org>
Date: Mon Aug 6 20:33:00 2012 +0000
<https://sourceware.org/ml/binutils/2012-08/msg00043.html>, ("MIPS/GAS:
Correct microMIPS branch swapping assertion") for the MIPS16 case.
The assertion itself was introduced with:
commit 1e91584932
Author: Richard Sandiford <rdsandiford@googlemail.com>
Date: Wed Mar 9 09:17:02 2005 +0000
<https://sourceware.org/ml/binutils/2005-03/msg00217.html>, ("Rework
MIPS nop-insertion code, add -mfix-vr4130 [5/11]"), but its introduction
merely noted our existing lack of support for MIPS16 jump swapping
across frags.
gas/
* config/tc-mips.c (append_insn) <APPEND_SWAP>: Do not special
case MIPS16 handling.
* testsuite/gas/mips/branch-swap-3.d: New test.
* testsuite/gas/mips/branch-swap-4.d: New test.
* testsuite/gas/mips/mips16@branch-swap-3.d: New test.
* testsuite/gas/mips/mips16@branch-swap-4.d: New test.
* testsuite/gas/mips/micromips@branch-swap-3.d: New test.
* testsuite/gas/mips/micromips@branch-swap-4.d: New test.
* testsuite/gas/mips/branch-swap-3.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
Simplify non-MIPS16 branch swapping by copying the MIPS16 variant, which
sets the new position for the current instruction first and reduces the
calculation of the new position of the previous instruction. Also refer
to previous instruction's frag and position via `delay' for consistency.
Reintroduce an explanatory comment, updated, previously removed with:
commit 1e91584932
Author: Richard Sandiford <rdsandiford@googlemail.com>
Date: Wed Mar 9 09:17:02 2005 +0000
<https://sourceware.org/ml/binutils/2005-03/msg00217.html>, ("Rework
MIPS nop-insertion code, add -mfix-vr4130 [5/11]").
gas/
* config/tc-mips.c (append_insn): Simplify non-MIPS16 branch
swapping sequence.
