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795 commits

Author SHA1 Message Date
Andreas Schwab
8577e690b5 binutils/testsuite/:
* binutils-all/m68k/movem.s: New file.

	* binutils-all/m68k/objdump.exp: New file.

include/opcode/:
	* m68k.h: Fix comment.

opcodes/:
	* m68k-dis.c (m68k_valid_ea): Check validity of all codes.
2004-07-09 18:42:14 +00:00
Nick Clifton
1fe1f39c06 Add new port: crx-elf 2004-07-07 17:28:53 +00:00
Jim Wilson
7a33b495a5 Correctly assemble mov rX=imm.
* ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
* ia64-asmtab.c: Regnerate.
2004-06-30 18:12:38 +00:00
Alan Modra
98e6987548 opcodes/
* ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
	(extract_fxm): Don't test dialect.
	(XFXFXM_MASK): Include the power4 bit.
	(XFXM): Add p4 param.
	(powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.

gas/testsuite/
	* gas/ppc/power4.d: Update.
2004-06-28 14:08:08 +00:00
Alexandre Oliva
a53b85e216 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
* disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
2004-06-27 06:31:22 +00:00
Alan Modra
d0618d1c97 * ppc-opc.c (BH, XLBH_MASK): Define.
(powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
2004-06-26 08:32:12 +00:00
Alan Modra
1d9f512f33 include/opcode/
* i386.h (i386_optab): Remove fildd, fistpd and fisttpd.

opcodes/
	* i386-dis.c (x_mode): Comment.
	(two_source_ops): File scope.
	(float_mem): Correct fisttpll and fistpll.
	(float_mem_mode): New table.
	(dofloat): Use it.
	(OP_E): Correct intel mode PTR output.
	(ptr_reg): Use open_char and close_char.
	(PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
	operands.  Set two_source_ops.

gas/testsuite/
	* gas/i386/prescott.s: Remove fisttpd and fisttpq.
	* gas/i386/prescott.d: Update.
2004-06-23 15:06:58 +00:00
Alan Modra
52886d7065 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
instead of _raw_size.
2004-06-15 01:14:22 +00:00
Jakub Jelinek
bad9ceeabe opcodes/
* ia64-gen.c (in_iclass): Handle more postinc st
	and ld variants.
	* ia64-asmtab.c: Rebuilt.
gas/testsuite/
	* gas/ia64/dv-raw-err.s: Add some new postinc tests.
	* gas/ia64/dv-raw-err.l: Updated.
2004-06-08 20:40:59 +00:00
Martin Schwidefsky
0451f5dff4 * s390-opc.txt: Correct architecture mask for some opcodes.
lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
	in the esa mode as well.
2004-06-01 13:56:11 +00:00
Joern Rennecke
f6f9408fbf 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
bfd:
	* Makefile.am: Regenerate dependencies.
	* Makefile.in: Regenerate.
	* archures.c: Add bfd_mach_sh3_nommu .
	* bfd-in2.h: Regenerate.
	* cpu-sh.c: Add sh3-nommu architecture.
	(bfd_to_arch_table): Create new table.
	(sh_get_arch_from_bfd_mach): Create new function.
	(sh_get_arch_up_from_bfd_mach): Create new function.
	(sh_merge_bfd_arch): Create new function.
	* elf32-sh.c (sh_ef_bfd_table): Add table.
	(sh_elf_check_relocs): Replace switch statement with
	use of sh_ef_bfd_table .
	(sh_elf_get_flags_from_mach): Add new function.
	(sh_find_elf_flags): Likewise.
	(sh_elf_copy_private_data): Replace most of non-elf contents
	with a call to sh_merge_bfd_arch() .

gas:
	* Makefile.am: Regenerate dependecies.
	* Makefile.in: Regenerate.
	* config/tc-sh.c (valid_arch): Make unsigned.
	(preset_target_arch): Likewise.
	(md_begin): Use new architecture flags system.
	(get_specific): Likewise.
	(assemble_ppi): Likewise.
	(md_assemble): Likewise. Also fix error check for bad opcodes.
	(md_parse_option): Likewise. Also generate -isa values according
	to the table in bfd/cpu-sh.c instead of just constants. Also
	allow <arch>-up ISA variants.
	(sh_elf_final_processing): Replace if-else chain with a call to
	sh_find_elf_flags().
	* testsuite/gas/sh/arch: New directory.
	* testsuite/gas/sh/arch/arch.exp: New test script.
	* testsuite/gas/sh/arch/arch_expected.txt: New file.
	* testsuite/gas/sh/arch/sh.s: New file.
	* testsuite/gas/sh/arch/sh2.s: New file.
	* testsuite/gas/sh/arch/sh-dsp.s: New file.
	* testsuite/gas/sh/arch/sh2e.s: New file.
	* testsuite/gas/sh/arch/sh3-nommu.s: New file.
	* testsuite/gas/sh/arch/sh3.s: New file.
	* testsuite/gas/sh/arch/sh3-dsp.s: New file.
	* testsuite/gas/sh/arch/sh3e.s: New file.
	* testsuite/gas/sh/arch/sh4-nommu-nofpu.s: New file.
	* testsuite/gas/sh/arch/sh4-nofpu.s: New file.
	* testsuite/gas/sh/arch/sh4.s: New file.
	* testsuite/gas/sh/arch/sh4a-nofpu.s: New file.
	* testsuite/gas/sh/arch/sh4al-dsp.s: New file.
	* testsuite/gas/sh/arch/sh4a.s: New file.

include/elf:
	* sh.h (EF_SH_HAS_DSP): Remove.
	(EF_SH_HAS_FP): Remove.
	(EF_SH_MERGE_MACH): Remove.
	(EF_SH4_NOFPU): Convert to decimal.
	(EF_SH4A_NOFPU): Likewise.
	(EF_SH4_NOMMU_NOFPU): Likewise.
	(EF_SH3_NOMMU): Add new macro.
	(EF_SH_BFD_TABLE): Likewise.
	(sh_find_elf_flags): Add prototype.
	(sh_elf_get_flags_from_mach): Likewise.

opcodes:
	* sh-dis.c (target_arch): Make unsigned.
	(print_insn_sh): Replace (most of) switch with a call to
	sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
	* sh-opc.h: Redefine architecture flags values.
	Add sh3-nommu architecture.
	Reorganise <arch>_up macros so they make more visual sense.
	(SH_MERGE_ARCH_SET): Define new macro.
	(SH_VALID_BASE_ARCH_SET): Likewise.
	(SH_VALID_MMU_ARCH_SET): Likewise.
	(SH_VALID_CO_ARCH_SET): Likewise.
	(SH_VALID_ARCH_SET): Likewise.
	(SH_MERGE_ARCH_SET_VALID): Likewise.
	(SH_ARCH_SET_HAS_FPU): Likewise.
	(SH_ARCH_SET_HAS_DSP): Likewise.
	(SH_ARCH_UNKNOWN_ARCH): Likewise.
	(sh_get_arch_from_bfd_mach): Add prototype.
	(sh_get_arch_up_from_bfd_mach): Likewise.
	(sh_get_bfd_mach_from_arch_set): Likewise.
	(sh_merge_bfd_arc): Likewise.

ld:
	* testsuite/ld-sh/arch/arch.exp: New test script.
	* testsuite/ld-sh/arch/arch_expected.txt: New file.
	* testsuite/ld-sh/arch/sh.s: New file.
	* testsuite/ld-sh/arch/sh2.s: New file.
	* testsuite/ld-sh/arch/sh-dsp.s: New file.
	* testsuite/ld-sh/arch/sh2e.s: New file.
	* testsuite/ld-sh/arch/sh3-nommu.s: New file.
	* testsuite/ld-sh/arch/sh3.s: New file.
	* testsuite/ld-sh/arch/sh3-dsp.s: New file.
	* testsuite/ld-sh/arch/sh3e.s: New file.
	* testsuite/ld-sh/arch/sh4-nommu-nofpu.s: New file.
	* testsuite/ld-sh/arch/sh4-nofpu.s: New file.
	* testsuite/ld-sh/arch/sh4.s: New file.
	* testsuite/ld-sh/arch/sh4a-nofpu.s: New file.
	* testsuite/ld-sh/arch/sh4al-dsp.s: New file.
	* testsuite/ld-sh/arch/sh4a.s: New file.
2004-05-28 12:32:10 +00:00
Nick Clifton
be8c092bb0 Reorganise m68k instruction decoding and improve handling of MAC/EMAC 2004-05-24 14:33:22 +00:00
Alan Modra
a30e9cc4a0 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
well as when -mpower4.
2004-05-19 05:11:48 +00:00
Nick Clifton
9598fbe5d4 Updated French translations 2004-05-13 12:54:36 +00:00
Nick Clifton
6b6e92f432 Add support for 521x,5249,547x,548x. 2004-05-05 14:33:14 +00:00
Alan Modra
a404d431a8 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC. 2004-05-05 13:43:36 +00:00
Ben Elliston
520ceea489 * Corrections to previous patch. Amend ChangeLog.
* ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
	(powerpc_opcodes): Add "dbczl" instruction for PPC970.
2004-04-30 07:14:40 +00:00
Ben Elliston
f3806e43d9 * ppc-opc.c (powerpc_opcodes): Add "dbczl" instruction for PPC970.
[testsuite]
	* gas/ppc/power4.s: Add dcbz and dcbzl test cases.
	* gas/ppc/power4.d: Update accordingly.
2004-04-30 06:46:53 +00:00
Kaz Kojima
1f1799d5ad bfd/
* elf32-sh.c (sh_elf_plt_sym_val): New function.
	(elf_backend_plt_sym_val): Define.

opcodes/
	* sh-dis.c (print_insn_sh): Print the value in constant pool
	as a symbol if it looks like a symbol.

gas/testsuite/
	* gas/sh/pcrel2.d: Update.
	* gas/sh/tlsd.d: Update.
	* gas/sh/tlsnopic.d: Update.
	* gas/sh/tlspic.d: Update.

ld/testsuite/
	* ld-sh/tlsbin-1.d: Update
	* ld-sh/tlspic-1.d: Update.
2004-04-23 02:47:39 +00:00
Nick Clifton
fd99574ba5 Add support for ColdFire MAC instructions and tidy up support for other m68k
variants.
2004-04-22 10:33:16 +00:00
Jakub Jelinek
b4781d441c * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
(fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
	suffix.  Use fmov*x macros, create all 3 fpsize variants in one
	macro.  Adjust all users.
2004-04-20 10:23:51 +00:00
Nick Clifton
91809fda2a Treat adds and subs as a special case 2004-04-15 08:55:27 +00:00
Nick Clifton
f4453dfa0a Fix bug parsing shigh(0xffff8000) 2004-03-30 09:29:19 +00:00
Stan Shebs
9b0de91afe * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
used.
2004-03-29 18:09:09 +00:00
Alan Modra
e20c0b3d25 * aclocal.m4: Regenerate.
* config.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
	* po/opcodes.pot: Regenerate.
2004-03-19 07:02:24 +00:00
Alan Modra
a9c3619ef1 Revert "lsdx", "lsdi", "stsdx", "stsdi", "lmd" and "stmd" insns. 2004-03-16 11:46:15 +00:00
Alan Modra
fdd12ef3c6 opcodes/
* ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
	PPC_OPERANDS_GPR_0.
	* ppc-opc.c (RA0): Define.
	(RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
	(RAOPT): Rename from RAO.  Update all uses.
	(powerpc_opcodes): Use RA0 as appropriate.  Add "lsdx", "lsdi",
	"stsdx", "stsdi", "lmd" and "stmd" insns.

include/opcode/
	* ppc.h (PPC_OPERAND_GPR_0): Define.  Bump other operand defines.

gas/testsuite/
	Update gas/ppc/.

ld/testsuite/
	Update ld-powerpc/.
2004-03-16 00:58:43 +00:00
Aldy Hernandez
2dc111b3c1 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg. 2004-03-15 19:07:39 +00:00
Alan Modra
7bfeee7be2 * sparc-dis.c (print_insn_sparc): Update getword prototype. 2004-03-15 13:36:28 +00:00
Michal Ludvig
7ffdda930b 2004-03-12 Michal Ludvig <mludvig@suse.cz>
* i386-dis.c (GRPPLOCK): Delete.
	(grps): Detele GRPPLOCK entry.
2004-03-12 13:38:16 +00:00
Alan Modra
cc0ec05165 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
(M, Mp): Use OP_M.
	(None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
	(GRPPADLCK): Define.
	(dis386): Use NOP_Fixup on "nop".
	(dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
	(twobyte_has_modrm): Set for 0xa7.
	(padlock_table): Delete.  Move to..
	(grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
	and clflush.
	(print_insn): Revert PADLOCK_SPECIAL code.
	(OP_E): Delete sfence, lfence, mfence checks.

	* gas/i386/katmai.d: Revert last change.
2004-03-12 13:06:50 +00:00
Jakub Jelinek
4fd61dcb07 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
(INVLPG_Fixup): New function.
	(PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.

	* opcode/i386.h (i386_optab): Remove CpuNo64 from sysenter and
	sysexit.
2004-03-12 10:47:49 +00:00
Michal Ludvig
0f10071e3d 2004-03-12 Michal Ludvig <mludvig@suse.cz>
* gas/config/tc-i386.c (output_insn): Handle PadLock instructions.
	* gas/config/tc-i386.h (CpuPadLock): New define.
	(CpuUnknownFlags): Added CpuPadLock.
	* include/opcode/i386.h (i386_optab): Added xstore/xcrypt insns.
	* opcodes/i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
	(dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
	(padlock_table): New struct with PadLock instructions.
	(print_insn): Handle PADLOCK_SPECIAL.
2004-03-12 10:14:29 +00:00
Alan Modra
c02908d2c0 opcodes/
* i386-dis.c (grps): Use clflush by default for 0x0fae/7.
	(OP_E): Twiddle clflush to sfence here.

gas/testsuite/
	* gas/i386/katmai.d: Adjust for clflush change.
2004-03-12 07:01:37 +00:00
Nick Clifton
d5bb7600cb Updated German translation 2004-03-08 10:06:13 +00:00
Joern Rennecke
ae51a426eb 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
opcodes:
	* sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
	nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
	* sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
	accordingly.
bfd:
	* archures.c: Add bfd_mach_sh4_nommu_nofpu.
	* cpu-sh.c: Ditto.
	* elf32-sh.c: Ditto.
	* bfd-in2.h: Regenerate.
include/elf:
	* sh.h: Add EF_SH4_NOMMU_NOFPU.
gas:
	* config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and
	-isa=sh4-nommu-nofpu options. Adjust help messages accordingly.
	(sh_elf_final_processing): Output BFD type sh4_nofpu if that is
	the most general type or the user specifically requested it.
	(md_assemble): Add a new error message for when an instruction
	is understood, but is not allowed due to an -isa option.
2004-03-03 18:01:49 +00:00
Richard Sandiford
676a64f422 Add fr450 support. 2004-03-01 10:11:46 +00:00
Richard Sandiford
c7a48b9ac9 cpu/
* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
	(scutss): Change unit to I0.
	(calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
	(mqsaths): Fix FR400-MAJOR categorization.
	(media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
	(media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
	* frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
	combinations.

opcodes/
	* frv-desc.c, frv-opc.c: Regenerate.

sim/frv/
	* cache.c (frv_cache_init): Change fr400 cache statistics to match
	the fr405.
	(non_cache_access): Add missing breaks.
	* interrupts.c (set_exception_status_registers): Always set EAR15
	for data_access_errors.
	* memory.c (fr400_check_write_address): Remove redundant alignment
	check.
	* model.c: Regenerate.
2004-03-01 09:42:33 +00:00
Richard Sandiford
8ae0baa268 cpu/
* frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
	(rstb, rsth, rst, rstd, rstq): Delete.
	(rstbf, rsthf, rstf, rstdf, rstqf): Delete.

gas/testsuite/
	* gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops.
	(rstbf, rsthf, rstf, rstdf, rstqf): Likewise.
	* gas/frv/allinsn.d: Update accordingly.

opcodes/
	* frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.

sim/frv/
	* decode.c, decode.h, model.c, sem.c: Regenerate.

sim/testsuite/
	* sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete.
	* sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
2004-03-01 09:26:33 +00:00
Joern Rennecke
ce11586c0b 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
* sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
	Also correct mistake in the comment.
2004-02-27 14:17:36 +00:00
Joern Rennecke
6a5709a5a1 2004-02-23 Andrew Stubbs <andrew.stubbs@superh.com>
gas:
	* tc-sh.c (build_Mytes): Add REG_N_D and REG_N_B01
	nibble types to assembler.
opcodes:
	* sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
	ensure that double registers have even numbers.
	Add REG_N_B01 for nn01 (binary 01) nibble to ensure
	that reserved instruction 0xfffd does not decode the same
	as 0xfdfd (ftrv).
	* sh-opc.h: Add REG_N_D nibble type and use it whereever
	REG_N refers to a double register.
	Add REG_N_B01 nibble type and use it instead of REG_NM
	in ftrv.
	Adjust the bit patterns in a few comments.
2004-02-26 16:14:42 +00:00
Aldy Hernandez
e5d2b64f53 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst. 2004-02-26 03:24:44 +00:00
Aldy Hernandez
1f04b05ff5 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
2004-02-20 05:10:13 +00:00
Aldy Hernandez
2f3b870051 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c (powerpc_opcodes): Add m*ivor35.
2004-02-20 04:56:34 +00:00
Aldy Hernandez
f0b26da617 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
mtivor32, mtivor33, mtivor34.
2004-02-20 04:45:37 +00:00
Aldy Hernandez
23d59c56c9 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c: Add mfmcar.
2004-02-20 00:17:23 +00:00
Nick Clifton
34920d91a5 Apply fixes for Maverick Crunch 2004-02-18 16:28:18 +00:00
Ben Elliston
44d8648176 * m32r-dis.c: Regenerate. 2004-02-13 03:21:49 +00:00
Michael Snyder
17707c23a8 2004-01-27 Michael Snyder <msnyder@redhat.com>
* sh-opc.h (sh_table): "fsrra", not "fssra".
2004-01-28 00:05:47 +00:00
Nick Clifton
fe3a9bc403 Tighten constaints on a few sparc instructions 2004-01-23 12:08:24 +00:00
Jakub Jelinek
ff24f1246e * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args. 2004-01-18 23:46:32 +00:00
Alan Modra
a02a862a31 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1.  Don't print scale factor on AT&T mode when index missing.
2004-01-18 23:12:47 +00:00
Alexandre Oliva
d164ea7f0f * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
when loaded into XR registers.
2004-01-16 03:16:00 +00:00
Richard Sandiford
cb10e79a50 cpu/
* frv.cpu (UNIT): Add IACC.
	(iacc-multiply-r-r): Use it.
	* frv.opc (fr400_unit_mapping): Add entry for IACC.
	(fr500_unit_mapping, fr550_unit_mapping): Likewise.

opcodes/
	* frv-desc.h: Regenerate.
	* frv-desc.c: Regenerate.
	* frv-opc.c: Regenerate.
2004-01-14 10:05:00 +00:00
Michael Snyder
f532f3fa70 2004-01-13 Michael Snyder <msnyder@redhat.com>
* sh-dis.c (print_insn_sh): Allocate 4	bytes for insn.
2004-01-13 19:56:46 +00:00
Paul Brook
e45d06306f * gas/config/tc-arm.c (do_vfp_reg2_from_sp2): Rename from
do_vfp_sp_reg2.
	(do_vfp_sp2_from_reg2): New function.
	(insns): Use them.
	(do_vfp_dp_from_reg2): Check return values properly.
	* opcodes/arm-opc.h (arm_opcodes): Move generic mcrr after known
	specific opcodes.
	* gas/testsuite/gas/arm/vfp2.s, gas/arm/vfp2.d: New test.
	* gas/testsuite/gas/arm/arm.exp: Add them.
2004-01-09 11:53:16 +00:00
Daniel Jacobowitz
3ba7a1aacf * Makefile.am (libopcodes_la_DEPENDENCIES)
(libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
	comment about the problem.
	* Makefile.in: Regenerate.
2004-01-07 18:39:40 +00:00
Alexandre Oliva
ba2d3f07f2 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
* frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
cut&paste errors in shifting/truncating numerical operands.
2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
* frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
(parse_uslo16): Likewise.
(parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
(parse_d12): Parse gotoff12 and gotofffuncdesc12.
(parse_s12): Likewise.
2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
* frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
(parse_uslo16): Likewise.
(parse_uhi16): Parse gothi and gotfuncdeschi.
(parse_d12): Parse got12 and gotfuncdesc12.
(parse_s12): Likewise.
2004-01-06 19:18:43 +00:00
Nick Clifton
3ab4893121 Catch a bug in the msp430 disassembler where an add instruction was confused
with an rla instruction.  Add a test for this to the testsuite.
2004-01-02 17:26:11 +00:00
Alan Modra
c9e214e571 Split ChangeLog files. 2004-01-02 11:16:21 +00:00
Christian Groessler
a0bd404eac * z8k-dis.c (intr_names): Removed.
(print_intr, print_flags): New functions.
	(unparse_instr): Use new functions.
2003-12-15 22:01:43 +00:00
Nick Clifton
a711c44f29 Add PIPE_O attribute to "pop" instruction. 2003-12-15 12:19:13 +00:00
Mark Mitchell
1ea5b9f8d1 * arm-opc.h (arm_opcodes): Put V6 instructions before XScale
instructions.
2003-12-15 05:01:41 +00:00
Hans-Peter Nilsson
8b1ddfd7d1 * mmix-opc.c (mmix_opcodes): Use GO_INSN_BYTE, PUSHGO_INSN_BYTE,
SETL_INSN_BYTE, INCH_INSN_BYTE, INCMH_INSN_BYTE, INCML_INSN_BYTE
	and SWYM_INSN_BYTE instead of raw numbers.
2003-12-13 14:56:24 +00:00
Zack Weinberg
1f6c9eb084 opcodes:
* ppc-opc.c (MO): Make optional.
	(RAO, RSO, SHO): New optional forms of RA, RS, SH operands.
	(tlbwe): Accept for both PPC403 and BOOKE.  Make all operands optional.
gas:
	* tc-ppc.c (md_assemble): Rewrite comment about optional operands
	to indicate that 'all or none' is also handled.  Pluralize a
	word in another comment.
gas/testsuite:
	* gas/ppc/booke.s: Add two more forms of the mbar instruction
	and three forms of the tlbwe instruction.
	* gas/ppc/booke.d: Update to match.
2003-12-10 22:12:50 +00:00
Mark Mitchell
09d92015d3 * gas/arm/arm.exp: Add archv6 and thumbv6.
* gas/arm/archv6.d: New file.
	* gas/arm/archv6.s: Likewise.
	* gas/arm/thumbv6.d: Likewise.
	* gas/arm/thumbv6.s: Likewise.

	Add V6 support.
	* config/tc-arm.c (ARM_EXT_V6): New macro.
	(ARM_ARCH_V6): Likewise.
	(SHIFT_IMMEDIATE): Likewise.
	(SHIFT_LSL_OR_ASR_IMMEDIATE): Likewise.
	(SHIFT_ASR_IMMEDIATE): Likewise.
	(SHIFT_LSL_IMMMEDIATE): Likewise.
	(do_cps): New function.
	(do_cpsi): Likewise.
	(do_ldrex): Likewise.
	(do_pkhbt): Likewise.
	(do_pkhtb): Likewise.
	(do_qadd16): Likewise.
	(do_rev): Likewise.
	(do_rfe): Likewise.
	(do_sxtah): Likewise.
	(do_sxth): Likewise.
	(do_setend): Likewise.
	(do_smlad): Likewise.
	(do_smlald): Likewise.
	(do_smmul): Likewise.
	(do_ssat): Likewise.
	(do_usat): Likewise.
	(do_srs): Likewise.
	(do_ssat16): Likewise.
	(do_usat16): Likewise.
	(do_strex): Likewise.
	(do_umaal): Likewise.
	(do_cps_mode): Likewise.
	(do_cps_flags): Likewise.
	(do_endian_specifier): Likewise.
	(do_pkh_core): Likewise.
	(do_sat): Likewise.
	(do_sat16): Likewise.
	(insns): Add V6 instructions.
	(do_t_cps): New function.
	(do_t_cpy): Likewise.
	(do_t_setend): Likewise.
	(THUMB_CPY): New macro.
	(tinsns): Add V6 instructions.
	(decode_shift): Handle V6 restricted-shift options.
	(thumb_mov_compare): Support CPY.
	(arm_cores): Add arm1136js and arm1136jfs.
	(arm_archs): Add armv6.
	(arm_fpus): Add arm1136jfs.
	* doc/c-arm.texi (ARM Options): Mention arm1136js, arm1136jfs, and
	armv6 options.

	* gas/arm/arm.exp: Add archv6 and thumbv6.
	* gas/arm/archv6.d: New file.
	* gas/arm/archv6.s: Likewise.
	* gas/arm/thumbv6.d: Likewise.
	* gas/arm/thumbv6.s: Likewise.

	* arm-dis.c (print_arm_insn): Add 'W' macro.
	* arm-opc.h (arm_opcodes): Add V6 instructions.
	(thumb_opcodes): Likewise.
2003-12-06 01:25:29 +00:00
Michael Snyder
2469ef8b79 2003-12-02 Alexandre Oliva <aoliva@redhat.com>
* sh-opc.h: Add support for sh4a and no-fpu variants.
        * sh-dis.c: Ditto.
2003-12-05 22:16:11 +00:00
Michael Snyder
aeadede63f 2003-12-02 Alexandre Oliva <aoliva@redhat.com>
* sh-opc.h: Add support for sh4a and no-fpu variants.
	* sh-dis.c: Ditto.
2003-12-05 02:02:32 +00:00
Alan Modra
8f8077465d * openrisc-asm.c: Regenerate.
* pj-opc.c: Update copyright date.
2003-12-04 11:07:22 +00:00
Nick Clifton
8884595866 Add support for the M32R2 processor. 2003-12-03 17:38:48 +00:00
Kazu Hirata
e0ab682bec * alpha-opc.c: Remove ARGSUSED.
* i370-opc.c: Likewise.
	* ppc-opc.c: Likewise.
2003-12-03 03:15:14 +00:00
Alan Modra
9fa06c65f0 make "dep-am" 2003-12-02 08:14:35 +00:00
Christian Groessler
c8fd013cc2 * z8k-dis.c: Convert to ISO C90.
* z8kgen.c: Convert to ISO C90.
	(opt): Move long opcode for "ldb rdb,imm8" after short one, now
	the short one is created when assembling.
	* z8k-opc.h: Regenerate with new z8kgen.c.
2003-11-28 20:12:17 +00:00
Kazu Hirata
122d081a38 * h8300-dis.c (print_colon_thingie): Remove. 2003-11-19 19:44:58 +00:00
Maciej W. Rozycki
1abe91b1db * config/tc-mips.c (macro): Handle new macros: "lca" and "dlca"
for loading addresses using CALL relocations.
Don't emit CALL relocations when a base register is used.

* gas/mips/lca-svr4pic.d: New test for the "lca" macro.
* gas/mips/lca-xgot.d: Likewise.
* gas/mips/lca.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.

* opcode/mips.h: Define new enum members, M_LCA_AB and M_DLCA_AB.

* mips-opc.c (mips_builtin_opcodes): Handle new macros: "lca" and
"dlca".
2003-11-18 21:22:57 +00:00
Nick Clifton
22a398e190 Add new field to disassemble_info structure: symbol_is_valid() and use it to
skip displaying arm elf mapping symbols in disassembly output.
2003-11-14 15:12:44 +00:00
H.J. Lu
f4fa50da5d 2003-11-05 H.J. Lu <hongjiu.lu@intel.com>
* m68k-opc.c (m68k_opcodes): Reorder "fmovel".
2003-11-06 04:32:07 +00:00
Daniel Jacobowitz
8e6446ff53 * arm-dis.c (print_arm_insn): Print "-" after "#". 2003-11-03 14:47:22 +00:00
Nick Clifton
f46a9fbb7a Add second argument to rcpp instruction. 2003-10-30 10:03:03 +00:00
Stephane Carrez
fde8b63277 * m68hc11-dis.c: Convert to ISO C90 prototypes. 2003-10-27 09:26:13 +00:00
Nick Clifton
3e60263266 Add ColfFire v4 support 2003-10-21 13:28:59 +00:00
Michael Snyder
d43ff6d27f 2003-06-03 Michael Snyder <msnyder@redhat.com>
and Bernd Schmidt   <bernds@redhat.com>
        and Alexandre Oliva <aoliva@redhat.com>

        * disassemble.c (disassembler): Add support for h8300sx.
2003-10-10 22:13:49 +00:00
Dave Brolley
f7c541f680 2003-10-10 Dave Brolley <brolley@redhat.com>
* frv-asm.c,frv-desc.c,frv-opc.c: Regenerated.
2003-10-10 19:30:02 +00:00
Dave Brolley
d576f161dd 2003-10-08 Dave Brolley <brolley@redhat.com>
* frv-desc.[ch], frv-opc.[ch]: Regenerated.
2003-10-08 18:26:01 +00:00
Bob Wilson
118fecd307 * xtensa-dis.c (fetch_data): Remove numBytes parameter.
(print_insn_xtensa): Fix call to fetch_data.
2003-10-01 00:40:22 +00:00
Chris Demetriou
5f74bc130d [ bfd/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* archures.c (bfd_mach_mipsisa64r2): New define.
	* bfd-in2.h: Regenerate.
	* aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2.
	* cpu-mips.c (I_mipsisa64r2): New enum value.
	(arch_info_struct): Add entry for I_mipsisa64r2.
	* elfxx-mips.c (_bfd_elf_mips_mach)
	(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2.
	(mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case.
	(mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2.

[ binutils/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2.

[ gas/Changelog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs.
	* configure: Regenerate.
	* config/tc-mips.c (imm2_expr): New variable.
	(md_assemble, mips16_ip): Initialize imm2_expr.
	(ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2.
	(macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands.
	(macro): Handle M_DEXT and M_DINS.
	(validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands.
	(mips_ip): Likewise.
	(OPTION_MIPS64R2): New define.
	(md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2).
	OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2.
	(md_parse_option): Handle OPTION_MIPS64R2.
	(s_mipsset): Handle setting "mips64r2" ISA.
	(mips_cpu_info_table): Add mips64r2.
	(md_show_usage): Document -mips64r2 option.
	* doc/as.texinfo: Docuemnt -mips64r2 option.
	* doc/c-mips.texi: Likewise.

[ gas/testsuite/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* gas/mips/cp0-names-mips64r2.d: New file.
	* gas/mips/cp0sel-names-mips64r2.d: New file.
	* gas/mips/elf_arch_mips64r2.d: New file.
	* gas/mips/hwr-names-mips64r2.d: New file.
	* gas/mips/mips32r2-ill-fp64.l: New file.
	* gas/mips/mips32r2-ill-fp64.s: New file.
	* gas/mips/mips64r2-ill.l: New file.
	* gas/mips/mips64r2-ill.s: New file.
	* gas/mips/mips64r2.d: New file.
	* gas/mips/mips64r2.s: New file.
	* gas/mips/mips.exp: Define "mips64r2" arch, and run new tests.

[ include/elf/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h (E_MIPS_ARCH_64R2): New define.

[ include/opcode/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h: Document +E, +F, +G, +H, and +I operand types.
	Update documentation of I, +B and +C operand types.
	(INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines.
	(M_DEXT, M_DINS): New enum values.

[ ld/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* ldmain.c (get_emulation): Ignore "-mips64r2".

[ ld/testsuite/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* ld-mips-elf/mips-elf-flags.exp: Add tests for combinations
	with MIPS64r2.

[ opcodes/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_arch_choices): Add entry for "mips64r2"
	(print_insn_args): Add handing for +E, +F, +G, and +H.
	* mips-opc.c (I65): New define for MIPS64r2.
	(mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins",
	"dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh",
	and "dshd" for MIPS64r2.  Adjust "dror", "dror32", and "drorv" to
	be supported on MIPS64r2.
2003-09-30 16:17:15 +00:00
Dave Brolley
e74d091b9a 2003-09-24 Dave Brolley <brolley@redhat.com>
* frv-desc.c, frv-opc.c, frv-opc.h: Regenerated.
2003-09-24 19:10:48 +00:00
Andreas Jaeger
26ca545091 * i386-dis.c: Convert to ISO C90 prototypes.
* i370-dis.c: Likewise.
	* i370-opc.c: Likewiwse.
	* i960-dis.c: Likewise.
	* ia64-opc.c: Likewise.
2003-09-14 15:16:57 +00:00
Dave Brolley
f7df6a7927 2003-09-09 Dave Brolley <brolley@redhat.com>
* frv-desc.c: Regenerated.
2003-09-09 22:29:42 +00:00
Dave Brolley
9c2de72926 2003-09-08 Dave Brolley <brolley@redhat.com>
On behalf of Doug Evans <dje@sebabeach.org>
        * Makefile.am (run-cgen): Pass new args archfile and opcfile
        to cgen.sh.
        (stamp-ip2k,stamp-m32r,stamp-fr30,stamp-frv,stamp-openrisc,
        stamp-iq2000,stamp-xstormy16): Pass paths of .cpu and .opc files
        to cgen.sh.
        (stamp-frv): Delete hardcoded path spec workaround.
        * Makefile.in: Regenerate.
        * cgen.sh: New args archfile and opcfile.  Pass on to cgen.
2003-09-08 17:24:05 +00:00
Nick Clifton
8ad30312ff Add binutils support for v850e1 processor 2003-09-04 11:04:38 +00:00
Alan Modra
661bd698e4 * ppc-dis.c (struct dis_private): New.
(powerpc_dialect): Make static.  Accept -Many in addition to existing
	options.  Save dialect in dis_private.
	(print_insn_big_powerpc): Retrieve dialect from dis_private.
	(print_insn_little_powerpc): Likewise.
	(print_insn_powerpc): Call powpc_dialect here.  Remove unnecessary
	efs/altivec check.  Try harder to disassemble if given -Many.
	* ppc-opc.c (insert_fxm): Expand comment.
	(PPC, PPCCOM, PPC32, PPC64, PPCVEC): Remove PPC_OPCODE_ANY.
	(POWER, POWER2, PPCPWR2, POWER32, COM, COM32, M601, PWRCOM): Likewise.
	(POWER4): Remove PPCCOM.
	(PPCONLY): Don't define.  Update all occurrences to PPC.
2003-09-04 01:51:37 +00:00
Andrew Cagney
92c2346c02 Index: opcodes/ChangeLog
2003-09-03  Andrew Cagney  <cagney@redhat.com>

	* dis-init.c (init_disassemble_info): New file and function.
	* Makefile.am (CFILES): Add "dis-init.c".
	(libopcodes_la_SOURCES): Add "dis-init.c".
	(dis-init.lo): Specify dependencies.
	* Makefile.in: Regenerate.

Index: include/ChangeLog
2003-08-27  Andrew Cagney  <cagney@redhat.com>

	* dis-asm.h (init_disassemble_info): Declare.
	(INIT_DISASSEMBLE_INFO): Redefine as a call to
	init_disassemble_info.
	(INIT_DISASSEMBLE_INFO_NO_ARCH): Ditto.

Index: binutils/ChangeLog
2003-09-03  Andrew Cagney  <cagney@redhat.com>

	* objdump.c: Refer to init_disassemble_info in comments.
	(disassemble_data): Replace INIT_DISASSEMBLE_INFO with
	init_disassemble_info.
2003-09-03 23:43:18 +00:00
Dave Brolley
ecd51ad39f 2003-09-03 Dave Brolley <brolley@redhat.com>
* frv-*: Regenerated.
2003-09-03 23:09:56 +00:00
Alan Modra
823bbe9d95 * ppc-opc.c (powerpc_opcodes): Combine identical PPC403/BOOKE entries.
Move duplicate mnemonic entries together.  Use RS instead of RT on
	all mt*.
	* ppc-dis.c: Convert to ISO C.
2003-09-02 04:15:29 +00:00
Dave Brolley
5272d2012d 2003-08-29 Dave Brolley <brolley@redhat.com>
* Makefile.am (stamp-frv): Copy frv.cpu and frv.opc from
        $(srcdir)/../cpu temporarily when regenerating source files.
        * Makefile.in: Regenerated.
2003-08-29 19:14:54 +00:00
Nick Clifton
f02232aaa3 Add support for unindexed form of Addressing Mode 5 2003-08-19 13:05:42 +00:00
Alan Modra
7d5b217e2c * ppc-opc.c (PPC440): Define.
(powerpc_opcodes): Allow mac*, mul*, nmac*, dccci, dcread, iccci,
	icread instructions when PPC440.  Add dlmzb instruction.
2003-08-19 07:09:10 +00:00
Alan Modra
f860738999 * dep-in.sed: Remove libintl.h.
* Makefile.am (POTFILES.in): Unset LC_COLLATE.
	Run "make dep-am".
	* Makefile.in: Regenerate.
2003-08-14 07:03:18 +00:00
Michael Meissner
90e3a20cfe fix typo in ChangeLog 2003-08-09 00:46:53 +00:00