* nto-procfs.c: New file. Native procfs support for QNX Neutrino.
* config/i386/nto.mh: New file.
* config/i386/nm-nto.h: New file.
* configure.host: Add i[3456]86-*-nto*.
* elfxx-ia64.c (struct elfNN_ia64_link_hash_table): Add rel_fptr_sec.
(elfNN_ia64_dynamic_symbol_p): Change info->shared into
!info->executable.
(get_fptr): For -pie create .opd as writable section and create
.rela.opd as well.
(elfNN_ia64_check_relocs): Change info->shared into
!info->executable.
(allocate_fptr): Likewise.
(allocate_dynrel_entries): Account for a relative reloc for -pie
@fptr(). Don't account for a relative reloc if -pie want_ltoff_fptr
for undefweak symbol. Account for an IPLT reloc in .rela.opd
section if -pie.
(set_got_entry): Don't create a relative reloc if -pie
want_ltoff_fptr for undefweak symbol.
(set_fptr_entry): Emit an IPLT reloc in .rela.opd for -pie.
(elfNN_ia64_relocate_section): Emit a relative reloc for -pie
@fptr().
* elfxx-ia64.c (elfNN_ia64_relocate_section): Issue undefined_symbol
even if -pie.
* elf32-i386.c (elf_i386_relocate_section): Likewise.
* elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise.
* elf64-sparc.c (sparc64_elf_relocate_section): Likewise.
* elf64-s390.c (elf_s390_relocate_section): Likewise.
* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
* elf64-alpha.c (elf64_alpha_relocate_section): Likewise.
* elf32-sparc.c (elf32_sparc_relocate_section): Likewise.
* elf32-s390.c (elf_s390_relocate_section): Likewise.
* elf32-ppc.c (ppc_elf_relocate_section): Likewise.
ld/
* emulparams/elf64_ia64.sh (OTHER_READONLY_SECTIONS): Don't include
.opd if -pie.
(OTHER_READWRITE_SECTIONS): Include .opd if -pie.
* scripttempl/elf.sc: Use SHLIB_DATA_ADDR instead of DATA_ADDR
if -pie.
(FXM4): Define.
(insert_fxm): New function, used by both FXM and FXM4.
(extract_fxm): Likewise.
(XFXFXM_MASK): Remove 1 << 20 term.
(powerpc_opcodes): Add Power4 version of "mfcr". Simplify "mtcr" mask.
(elf32_h8_relax_section) <R_H8_DIR16A8>: Adjust position of relocation.
<R_H8_DIR32A16>: Fix type of relocation.
* ld-h8300/h8300.exp: Replace loop with explicit list. Run relax.d
unconditionally. Run relax-2.d for *-elf targets.
* ld-h8300/relax.d: Fix typo.
* ld-h8300/relax.s: Add 0x prefixes.
* ld-h8300/relad-2.[sd]: New test.
create_got_section if we already have done so.
* elf32-sh.c (sh_elf_create_dynamic_sections): Likewise.
(sh_elf_check_relocs): Likewise.
(sh_elf_adjust_dynamic_symbol): Delete "dynobj" var. Use
htab->root.dynobj instead.
(sh_elf_check_relocs): Likewise.
(sh_elf_finish_dynamic_sections): Likewise.
* gdbarch.sh (REGISTER_RAW_SIZE, REGISTER_VIRTUAL_SIZE): Add
predicate.
* gdbarch.h, gdbarch.c: Re-generate.
* regcache.c (init_regcache_descr): Use legacy code when either
REGISTER_BYTE or REGISTER_RAW_SIZE is set.
(add_char): Rename to add_charest, update.
(wack_char): Rename to wack_charest, update types. Return l + r
to keep r live across the call.
(wack_short, wack_int, wack_long, wack_longest, wack_float)
(wack_double, wack_doublest): Return l + r to keep r live across
the call.
* gdb.base/store.exp: Accomodate store.c changes.
'stack_bought_valid'.
(s390_get_frame_info): Set fextra_info->stack_bought_valid if we
initialize fextra_info->stack_bought.
(s390_frameless_function_invocation): Don't trust the value of
fextra_info_ptr->stack_bought unless
fextra_info->stack_bought_valid is set.
* s390-tdep.c (struct prologue_value, enum pv_boolean): New types.
(pv_set_to_unknown, pv_set_to_constant, pv_set_to_register,
pv_constant_last, pv_add, pv_add_constant, pv_subtract,
pv_logical_and, pv_is_identical, pv_is_register, pv_is_array_ref,
compute_x_addr, s390_on_stack, s390_store,
s390_get_signal_frame_info): New functions.
(S390_NUM_SPILL_SLOTS): New macro.
(s390_get_frame_info): Rewritten.
(is_arg_reg): Deleted.
Break out the decoding of S/390 instructions into separate
functions, to make it more legible, and easier to check
against the spec.
* s390-tdep.c (is_ri, is_ril, is_rr, is_rre, is_rs, is_rse,
is_rx, is_rxe): New functions.
(op1_aghi, op2_aghi, op1_ahi, op2_ahi, op_ar, op_basr, op1_bras,
op2_bras, op_l, op_la, op1_larl, op2_larl, op_lgr, op1_lghi,
op2_lghi, op1_lhi, op2_lhi, op_lr, op_nr, op_ngr, op_s, op_st,
op_std, op1_stg, op2_stg, op_stm, op1_stmg, op2_stmg, op_svc): New
enums for opcode values. (Is this an improvement?)
_restf* to be satisfied by shared libs, and always force them local.
(toc_adjusting_stub_needed): Avoid scanning linker created sections.
Correct test for "bl".
(ppc64_elf_relocate_section <R_PPC64_TLS>): Correct test for
primary opcode 31.
former ia64_push_arguments and ia64_push_return_address, and use
regcache functions instead of read/write_register.
(ia64_gdbarch_init): Set push_dummy_call instead of
deprecated_push_arguments and deprecated_push_return_address.
(md_begin): Add minimal cpu type logic for instructions with different
binary format depending on the cpu.
(md_assemble): Remove check for minimal cpu.
(s390_insert_operand): Add support for long displacements.
(md_gather_operands): Likewise.
(tc_s390_fix_adjustable): Likewise.
(tc_s390_force_relocation): Likewise.
(md_apply_fix3): Likewise.
* trad-frame.h: Update comments, a -1 .addr is reserved.
(trad_frame_value_p, trad_frame_addr_p): Declare.
(trad_frame_reg_p): Declare.
(trad_frame_set_value): Rename trad_frame_register_value.
(trad_frame_set_unknown): Declare.
* trad-frame.c (trad_frame_realreg_p): New function.
(trad_frame_addr_p, trad_frame_value_p): New function.
(trad_frame_set_unknown): New function.
(trad_frame_alloc_saved_regs): Initialize .addr to -1, not zero.
(trad_frame_prev_register): Use trad_frame_realreg_p,
trad_frame_addr_p and trad_frame_value_p.
(trad_frame_set_value): Rename trad_frame_register_value.
* d10v-tdep.c (d10v_frame_unwind_cache): Use trad_frame_addr_p
and trad_frame_set_value.
