Commit graph

154 commits

Author SHA1 Message Date
Mike Frysinger
9b7509d900 sim: bfin: handle V overflows in dsp mult insns
The current dsp mult handler does not take care of overflows and updating
the V ASTAT bit.  So implement it.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:09:09 +00:00
Mike Frysinger
bf416ccded sim: bfin: decode ASTAT on failure
When testing ASTAT regs, specific bit differences carry a lot more meaning
than when checking the value of a data register.  So automatically decode
the bits of the two values and print things out so that people don't have
to manually do it themselves every time.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:08:27 +00:00
Mike Frysinger
c9329594d4 sim: bfin: handle saturation with fract multiplications
The saturation behavior with fract modes differs from non-fract modes.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:04:04 +00:00
Mike Frysinger
f4e33aa6c5 sim: bfin: forgot to cvs add the changelog 2011-03-14 22:24:30 +00:00