* arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
instruction.
* gas/arm/thumb32.d: Fix expected binary value of SEV.W instruction.
* config/tc-arm.c (T16_32_TAB): Fix binary value of SEV.W
instruction.
* config/tc-i386.c (md_estimate_size_before_relax): Don't relax
branches to weak symbols.
(md_apply_fix): Don't convert fixes against weak symbols to
section-relative offsets, but save addend for later reloc emission.
(tc_gen_reloc): When emitting reloc against weak symbol, adjust
addend to pre-compensate for bfd_install_relocation.
* config/tc-mips.c (nops_for_vr4130): Don't check noreorder_p.
(nops_for_insn): Likewise.
gas/testsuite/
* gas/mips/vr4130.s, gas/mips/vr4130.d: Expect part A to have nops.
H.J. Lu <hongjiu.lu@intel.com>
* config/obj-coff.h: Include "coff/x86_64.h" for x86 pe-coff.
(TARGET_FORMAT): Removed for x86 pe-coff.
(COFF_TARGET_FORMAT): Likewise.
* config/tc-i386.c (md_longopts): Allow --64 for x86 pe-coff.
(md_parse_option): Likewise.
(md_show_usage): Show option --32/--64 for x86 pe-coff.
(i386_target_format): Use also for x86 pe-coff.
* config/tc-i386.h (TARGET_FORMAT): Defined as i386_target_format
for x86 pe-coff.
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* cofflink.c (process_embedded_commands): Ignore "-aligncomm".
==> gas/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* NEWS: Mention new feature.
* config/obj-coff.c (obj_coff_common_parse): New function.
(obj_coff_comm): Likewise.
(coff_pseudo_table): Override default ".comm" definition on PE.
* doc/as.texinfo: Document new feature.
==> gas/testsuite/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* gas/pe/: New directory for PE format-specific tests.
* gas/pe/aligncomm-a.d: New test pattern file.
* gas/pe/aligncomm-a.s: New test source file.
* gas/pe/aligncomm-b.d: New test pattern file.
* gas/pe/aligncomm-b.s: New test source file.
* gas/pe/aligncomm-c.d: New test pattern file.
* gas/pe/aligncomm-c.s: New test source file.
* gas/pe/aligncomm-d.d: New test pattern file.
* gas/pe/aligncomm-d.s: New test source file.
* gas/pe/pe.exp: New test control script.
* lib/gas-defs.exp (is_pecoff_format): New function.
==> ld/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* NEWS: Mention new feature.
* deffile.h (def_file_aligncomm): Add new struct definition.
(def_file): Add new def_file_aligncomm member.
* deffilep.y (%token): Add new ALIGNCOMM token.
(command): Add production rule for ALIGNCOMM.
(def_file_free): Free any chained def_file_aligncomm structs.
(diropts[]): Add entry for '-aligncomm' .drectve command.
(def_aligncomm): New grammar function.
* ld.texinfo: Document new feature.
* pe-dll.c (process_def_file): Rename from this ...
(process_def_file_and_drectve): ... to this, updating all callers,
and process any aligncomms chained to the def file after scanning
all .drectve sections.
(generate_edata): Updated to match.
(pe_dll_build_sections): Likewise.
==> ld/testsuite/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* ld-pe/aligncomm-1.c: New test source file.
* ld-pe/aligncomm-2.c: Likewise.
* ld-pe/aligncomm-3.c: Likewise.
* ld-pe/aligncomm-4.c: Likewise.
* ld-pe/aligncomm.d: New test pattern file.
* ld-pe/direct.exp: Deleted, and content moved into ...
* ld-pe/pe-run.exp: ... New common file for all PE run tests.
* ld-pe/vers-script.exp: Deleted, and content merged into ...
* ld-pe/pe-compile.exp: ... New common file for PE tests needing
a compiler, adding aligned common tests.
* ld-pe/pe.exp: Update header comment.
* config/obj-coff.c (obj_coff_section): Add 'y' as
specifier for SEC_COFF_NOREAD section flag.
* doc/as.texinfo: Add documentation about .section flag 'y'.
* config/tc-armeabi.h (FPU_DEFAULT): Likewise.
* config/tc-arm.c (md_begin): If FPU_DEFAULT is set, don't infer
the default FPU from the processor.
testsuite/
* gas/arm/attr-mcpu.d: Add -mfpu=neon.
* gas/arm/mapmisc.d: Correct expected output for .double and
.dcb.d.
* config/tc-arm.c (do_t_blx): Always use BFD_RELOC_THUMB_PCREL_BLX.
(md_pcrel_from_section): Align address for BLX.
(tc_gen_reloc): Change BFD_RELOC_THUMB_PCREL_BLX relocations to
BFD_RELOC_THUMB_PCREL_BRANCH23 for EABI v4+.
2009-04-30 Nick Clifton <nickc@redhat.com>
* common.h (STT_GNU_IFUNC): Define.
elfcpp
2009-04-30 Nick Clifton <nickc@redhat.com>
* (enum STT): Add STT_GNU_IFUNC.
gas
2009-04-30 Nick Clifton <nickc@redhat.com>
* config/obj-elf.c (obj_elf_type): Add support for a
gnu_indirect_function type.
* config/tc-i386.c (tc_i386_fix_adjustable): Do not adjust fixups
against indirect function symbols.
* doc/as.texinfo (.type): Document the support for the
gnu_indirect_function symbol type.
* NEWS: Mention the new feature.
gas/testsuite
2009-04-30 Nick Clifton <nickc@redhat.com>
* gas/elf/elf.exp: Extend type test to include an ifunc symbol.
Provide an alternative test for targets which do not support ifunc
symbols.
(type.s): Add entry for an ifunc symbol.
(type.e): Add ifunc entry to expected symbol dump.
(section2.e-armelf): Add entry for ifunc symbol.
(type-noifunc.s): New file.
(type-noifunc.e): New file.
bfd/
2009-04-30 Nick Clifton <nickc@redhat.com>
* elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs
section pointer.
(struct elf_obj_data): Add has_ifunc_symbols boolean.
* elf.c (swap_out_syms): Convert BSF_GNU_INDIRECT_FUNCTION flags
into a STT_GNU_IFUNC symbol type.
(_bfd_elf_is_function_type): Accept STT_GNU_IFUNC as a function
type.
(_bfd_elf_set_osabi): Set the osasbi field to ELFOSABI_LINUX if
the binary contains ifunc symbols.
* elfcode.h (elf_slurp_symbol_table): Translate the STT_GNU_IFUNC
symbol type into a BSF_GNU_INDIRECT_FUNCTION flag.
* elf32-i386.c (is_indirect_function): New function.
(elf_i386_check_relocs): Create an ifunc output section.
(allocate_dynrelocs): Create dynamic relocs in the ifunc output
section if necessary.
(elf_i386_relocate_section): Emit a reloc against an ifunc symbol
if necessary.
(elf_i386_add_symbol_hook): New function. Set the
has_ifunc_symbols field of the elf_obj_data structure if an ifunc
symbol is encountered.
(elf_backend_post_process_headers): Define.
(elf_backend_add_symbol_hook): Define.
(elf_i386_post_process_headers): Rename to
elf_i388_fbsd_post_process_headers.
* elf64-x86_64.c (IS_X86_64_PCREL_TYPE): New macro.
(is_indirect_function): New function.
(elf64_x86_64_check_relocs): Create an ifunc output section.
(allocate_dynrelocs): Create dynamic relocs in the ifunc output
section if necessary.
(elf64_x86_64_relocate_section): Emit a reloc against an ifunc
symbol if necessary.
(elf_i386_add_symbol_hook): Set the has_ifunc_symbols field of the
elf_obj_data structure if an ifunc symbol is encountered.
(elf_backend_post_process_headers): Define.
* elflink.c (_bfd_elf_adjust_dynamic_symbol): Always create a PLT
if we have ifunc symbols to handle.
(get_ifunc_reloc_section_name): New function. Computes the name
for an ifunc section.
(_bfd_elf_make_ifunc_reloc_section): New function. Creates a
section to hold ifunc relocs.
* syms.c (BSF_GNU_INDIRECT_FUNCTION): Define.
(bfd_print_symbol_vandf): Handle ifunc symbols.
(bfd_decode_symclass): Likewise.
* bfd-in2.h: Regenerate.
binutils
2009-04-30 Nick Clifton <nickc@redhat.com>
* readelf.c (dump_relocations): Display a relocation against an
ifunc symbol as if it were a function invocation.
(get_symbol_type): Handle STT_GNU_IFUNC.
ld
2009-04-30 Nick Clifton <nickc@redhat.com>
* NEWS: Mention support for IFUNC symbols.
ld/testsuite
2009-04-30 Nick Clifton <nickc@redhat.com>
* ld-ifunc: New directory.
* ld-ifunc/ifunc.exp: New file: Run the IFUNC tests.
* ld-ifunc/prog.c: New file.
* ld-ifunc/lib.c: New file.
2009-04-15 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (process_operands): Print operands in
correct order depending on intel_syntax.
gas/testsuite/
2009-04-15 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.e: Adjust expectations.
* config/tc-vax.c (synthetic_votstrs): add "jbbcci" and "jbbssi"
(md_assemble): emit symbol name when used as immediate in PIC mode.
(md_assemble): fix LP64 bug (use sizeof (valueT) instead 4).
gas/
* config/tc-arm.c (md_apply_fix): Check BFD_RELOC_ARM_IMMEDIATE and
BFD_RELOC_ARM_ADRL_IMMEDIATE value is in the correct section.
Check BFD_RELOC_ARM_ADRL_IMMEDIATE has a defined symbol.
gas/testsuites/
* gas/arm/adr-invalid.d: New file.
* gas/arm/adr-invalid.l: New file.
* gas/arm/adr-invalid.s: New file.
* internal.h (C_AIX_WEAKEXT): New macro.
(C_WEAKEXT): Use the GNU definition in the generic part of the file,
and conditionally reset it to C_AIX_WEAKEXT in the XCOFF part of
the file.
(CSECT_SYM_P): New macro.
* xcoff.h (L_WEAK): Define.
(EXTERN_SYM_P): New macro.
bfd/
* coffcode.h (coff_pointerize_aux_hook): Update CSECT_SYM_P to
check whether a symbol has csect information.
(coff_print_aux): Likewise.
* coff-rs6000.c (_bfd_xcoff_swap_aux_in): Handle auxillary csect
information for C_AIX_WEAKEXT too.
(_bfd_xcoff_swap_aux_out): Likewise.
(xcoff_reloc_type_br): Handle defweak symbols too.
* coff64-rs6000.c (_bfd_xcoff64_swap_aux_in): Handle auxillary csect
information for C_AIX_WEAKEXT too.
(_bfd_xcoff64_swap_aux_out): Likewise.
(xcoff64_reloc_type_br): Handle defweak symbols too.
* coffgen.c (coff_print_symbol): Handle auxillary function
information for C_AIX_WEAKEXT too.
* xcofflink.c (_bfd_xcoff_canonicalize_dynamic_symtab): Set BSF_WEAK
instead of BSF_GLOBAL if the L_WEAK flag is set.
(xcoff_dynamic_definition_p): New function.
(xcoff_link_add_dynamic_symbols): Use it to decide whether ldsym
defines h. Don't change h if ldsym isn't the definition. Otherwise,
always take the symbol class from the ldsym. Use weak bfd symbol
types for weak ldsyms.
(xcoff_link_add_symbols): Use CSECT_SYM_P and EXTERN_SYM_P.
Fix the check for whether a definition is from a shared object.
Allow redefinitions of weak symbols.
(xcoff_link_check_ar_symbols): Use EXTERN_SYM_P.
(xcoff_keep_symbol_p): Likewise.
(bfd_xcoff_size_dynamic_sections): Use CSECT_SYM_P.
(xcoff_link_input_bfd): Use CSECT_SYM_P and EXTERN_SYM_P.
Add .loader entries for C_AIX_WEAKEXT as well as C_EXT symbols,
but mark them as L_WEAK.
(xcoff_write_global_symbol): Treat weak symbols as C_AIX_WEAKEXT
instead of C_EXT if C_AIX_WEAKEXT == C_WEAKEXT.
gas/
* config/tc-ppc.c (ppc_frob_symbol): Add csect information for
C_AIX_WEAKEXT too.
ld/testsuite/
* ld-powerpc/aix-glink-2a.s, ld-powerpc/aix-glink-2a.ex,
ld-powerpc/aix-glink-2b.s, ld-powerpc/aix-glink-2c.s,
ld-powerpc/aix-glink-2c.ex, ld-powerpc/aix-glink-2d.s,
ld-powerpc/aix-glink-2-32.dd, ld-powerpc/aix-glink-2-64.dd,
ld-powerpc/aix-weak-1a.s, ld-powerpc/aix-weak-1b.s,
ld-powerpc/aix-weak-1-rel.hd, ld-powerpc/aix-weak-1-rel.nd,
ld-powerpc/aix-weak-1-dso.hd, ld-powerpc/aix-weak-1-dso.nd,
ld-powerpc/aix-weak-1-dso.dnd, ld-powerpc/aix-weak-1.ex,
ld-powerpc/aix-weak-2a.s, ld-powerpc/aix-weak-2a.ex,
ld-powerpc/aix-weak-2a.nd, ld-powerpc/aix-weak-2b.s,
ld-powerpc/aix-weak-2b.nd, ld-powerpc/aix-weak-2c.s,
ld-powerpc/aix-weak-2c.ex, ld-powerpc/aix-weak-2c.nd,
ld-powerpc/aix-weak-2c.od, ld-powerpc/aix-weak-3a.s,
ld-powerpc/aix-weak-3a.ex, ld-powerpc/aix-weak-3b.s,
ld-powerpc/aix-weak-3b.ex, ld-powerpc/aix-weak-3-32.d,
ld-powerpc/aix-weak-3-32.dd, ld-powerpc/aix-weak-3-64.d,
ld-powerpc/aix-weak-3-64.dd: New tests.
* ld-powerpc/aix52.exp: Run them. Replace tmp/aix-* with
tmp/aix64-* in 64-bit ld options.
Rename, changing all callers, to...
(md_create_short_jump): Adjust head comment. Assert
word-sized-branch distance for v32. Bail out calling as_fatal for
compatibility mode here.
(md_create_long_jump): ...not here.
* config/tc-cris.h (md_create_short_jump): Do not define.
* ppc.h (R_PPC_TLSGD, R_PPC_TLSLD): Add new relocs.
* ppc64.h (R_PPC64_TLSGD, R_PPC64_TLSLD): Add new relocs.
bfd/
* reloc.c (BFD_RELOC_PPC_TLSGD, BFD_RELOC_PPC_TLSLD): New.
* section.c (struct bfd_section): Add has_tls_get_addr_call.
(BFD_FAKE_SECTION): Init new flag.
* ecoff.c (bfd_debug_section): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_TLSGD and R_PPC_TLSLD.
(ppc_elf_reloc_type_lookup): Handle new relocs.
(ppc_elf_check_relocs): Set has_tls_get_addr_call on finding such
without marker relocs.
(ppc_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs
if section has no old-style calls.
(ppc_elf_relocate_section): Set tls_mask for non-tls relocs too.
Don't try to optimize new-style __tls_get_addr call when handling
arg setup relocs. Instead do so for R_PPC_TLSGD and R_PPC_TLSLD
relocs.
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_TLSGD, R_PPC64_TLSLD.
(ppc64_elf_reloc_type_lookup): Handle new relocs.
(ppc64_elf_check_relocs): Set has_tls_get_addr_call on finding such
without marker relocs.
(ppc64_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs
if section has no old-style calls. Set toc_ref for new relocs as
appropriate.
(ppc64_elf_relocate_section): Set tls_mask for non-tls relocs too.
Don't try to optimize new-style __tls_get_addr call when handling
arg setup relocs. Instead do so for R_PPC_TLSGD and R_PPC_TLSLD
relocs.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Error if ppc32 tls got relocs
have non-zero addend.
(md_assemble): Parse args of __tls_get_addr calls.
(md_apply_fix): Handle BFD_RELOC_PPC_TLSGD and BFD_RELOC_PPC_TLSLD.
ld/testsuite/
* ld-powerpc/tlsmark.s, * ld-powerpc/tlsmark.d: New test.
* ld-powerpc/tlsmark32.s, * ld-powerpc/tlsmark32.d: New test.
* ld-powerpc/powerpc.exp: Run them.
Eric Botcazou <ebotcazou@adacore.com>
Douglas B Rupp <rupp@gnat.com>
* doc/as.texinfo (Overview): Mention -replace/-noreplace options
for Alpha.
* doc/c-alpha.texi (Alpha Options): Document -replace/-noreplace.
* config/tc-alpha.h (TC_VALIDATE_FIX_SUB): Define to 1 (evax).
(OBJ_SYMFIELD_TYPE): Remove.
(tc_canonicalize_symbol_name): Define to evax_shorten_name.
(TC_IMPLICIT_LCOMM_ALIGNMENT): For alignment to 3 on evax.
(tc_frob_file_before_fix): Do not defined on evax.
* config/tc-alpha.c: Always includes dwarf2dbg.h.
Include vms.h if OBJ_EVAX.
(struct alpha_fixup): Add xtrasym and procsym (evax only).
(enum alpha_macro_arg): Remove trailing comma.
(md_longopts): Add replace and noreplace arguments (evax only).
(alpha_evax_proc_hash): New variable.
(alpha_link_section): Make it global.
(alpha_ctors_section, alpha_dtors_section): Removed.
(alpha_ctors_symbol, alpha_dtors_symbol): Ditto.
(alpha_lit8_section): Ifndef'ed on evax.
(alpha_lit8_symbol): Ditto.
(alpha_prologue_label): New variable.
(alpha_linkage_symbol): New variable (evax only).
(alpha_flag_replace): Ditto.
(struct alpha_evax_procs): Add handler and handler_data field.
(alpha_evax_proc): Now of type pointer.
(alpha_linkage_fixup_root, alpha_linkage_fixup_tail): New variables.
(struct alpha_reloc_tag): Add sym and psym fields (evax only).
(get_alpha_reloc_tag): Initialize sym and psym fields (evax only).
(alpha_adjust_relocs): Ifndef'ed on evax.
(load_expression): Add opname argument.
Implement LDA/BSR optimization for evax.
(emit_lda): Adjust for new prototype of load_expression.
(emit_ir_load): Ditto. Do not nothing for GP if ..lk symbols.
(emit_loadstore): Likewise.
(emit_ldXu): Likewise.
(emit_stX): Likewise.
(emit_jsrjmp): Likewise. Implement LDA/BSR optimization for evax.
(emit_ldgp): Avoid warning in evax case.
(add_to_link_pool): Make it static. Return symbolic expression rather
than number expression for the offset.
(s_alpha_text): Create .text symbol for evax if not already created.
(s_alpha_comm): Do not create specific section for common symbol.
Fill common area with zeros for evax.
(s_alpha_prologue): Create alpha_prologue_label.
(s_alpha_section_name): New function (evax).
(s_alpha_section_word): Likewise.
(section_name): New static variabke moved out from ...
(s_alpha_section): ... here. Create new sections on demand.
(s_alpha_literals): New function (evax).
(s_alpha_ent): Create alpha_evax_proc instance and insert it in the
alpha_evax_proc_hash table.
(s_alpha_handler): New function (evax).
(s_alpha_frame): Adjust for new type of alpha_evax_proc.
(s_alpha_prologue): New function (evax).
(s_alpha_pdesc): Adjust for new type of alpha_evax_proc and new
handling of procedures with hash table.
Add support for condition handlers.
(s_alpha_linkage): Create linkage_fixup instance and chain it.
(s_alpha_fp_save): Adjust for new type of alpha_evax_proc.
(s_alpha_mask): Likewise.
(s_alpha_fmask): Likewise.
(s_alpha_end): Clear alpha_evax_proc.
(s_alpha_align): Increase max_alignment to 16.
(alpha_print_token): Call print_expr_1 instead of print_expr.
(md_pseudo_table): Add "section", "literals", "handler" and
"handler_data" (evax). Do not ignore "prologue" on evax.
Fix indentation.
(md_begin): Create hash table for alpha_evax_proc_hash.
(md_parse_option): Handle OPTION_REPLACE and OPTION_NOREPLACE.
(md_show_usage): Mention -replace/-noreplace for evax.
(md_apply_fix): Handle evax relocs (_NOP, _LDA, _BSR and _BOH).
(alpha_force_relocation): Likewise.
(alpha_fix_adjustable): Likewise. Add BFD_RELOC_16 case.
(tc_gen_reloc): Likewise. Add BFD_RELOC_ALPHA_LINKAGE for evax.
(emit_insn): New cases for evax specific relocs.
(assemble_insn): Fix indentation.
Take care of -MDISP in operand table.
* config/obj-evax.h (struct alpha_linkage_fixups): New struct.
(OBJ_SYMFIELD_TYPE): New macro.
(obj_symbol_new_hook): Define.
(obj_frob_symbol, obj_frob_file_before_adjust): Ditto.
(obj_frob_file_before_fix): Ditto.
(PDSC_S_M_HANDLER_VALID): New macro.
(PDSC_S_M_HANDLER_DATA_VALID): Ditto.
(TC_IMPLICIT_LCOMM_ALIGNMENT): Remove.
Add prototypes for functions declared in obj-evax.c
* config/obj-evax.c: Include subsegs.h, struc-symbol.h, safe-ctype.h.
(s_evax_weak): Convert to ansi-C.
(evax_symbol_new_hook): New function.
(evax_frob_symbol): Ditto.
(evax_frob_file_before_adjust): Ditto.
(evax_frob_file_before_fix): Ditto.
(evax_shorten_name): Ditto.
(crc32): Ditto.
(encode_32): Ditto.
(encode_16): Ditto.
(decode_16): Ditto.
(shorten_identifier): Ditto.
(is_truncated_identifier): Ditto.
* dwarf2dbg.c (out_debug_info): Do not append trailing slash on VMS.
* as.c (close_output_file): Remove #ifndef OBJ_VMS.
(main): Ditto.
(do_t_mov_cmp): Permit R13 as the second
argument to "cmp.n".
* gas/arm/thumb2_bad_reg.s: Update to allow R13 as second argument
for CMP.
* gas/arm/thumb2_bad_reg.l: Adjust accordingly.
* config/tc-arm.c (MODE_RECORDED): New define.
(output_inst): Record the thumb_mode in the current frag.
(arm_handle_align): Ignore the MODE_RECORDED bit in tc_frag_data.
(arm_init_frag): Only set the tc_frag_data field if it has not
already been set.
2009-01-29 Paul Brook <paul@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
* config/tc-arm.c (do_t_mul): In Thumb-2 mode, use 16-bit encoding
of MUL when possible.
gas/testsuite:
2009-01-29 Paul Brook <paul@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
* gas/arm/thumb2_mul.s: New file.
* gas/arm/thumb2_mul.d: Likewise.
* gas/arm/thumb2_mul-bad.s: Likewise.
* gas/arm/thumb2_mul-bad.d: Likewise.
* gas/arm/thumb2_mul-bad.l: Likewise.
* gas/arm/t16-bad.s: Add tests for"mul" with high registers.
* gas/arm/t16-bad.l: Update accordingly.
* gas/all/gas.exp: Expect forward test to fail for MeP.
Expect relax test to fail for MeP.
* gas/mep/relocs.d: Update expected disassembly.
* lib/ld-lib.exp (check_gc_sections_available): Add MeP to list of
targets which do not support garbage collection.
* ld-srec/srec.exp (run_srec_test): Expect tests to fail for MeP.
* ld-elf/group8a.d: Likewise.
* ld-elf/group8b.d: Likewise.
* ld-elf/group9a.d: Likewise.
* ld-elf/group9b.d: Likewise.
* binutils-all/objdump.W: Do not assume that high and low PC
addresses will have been computed.
sequence containing an unsupported reloc type.
(enum options): Replace computed #define's constants for option
numbers with this enum.
(struct md_longopts): Use the enum. Allow OPTION_32 in a non-ELF
environment.
(md_parse_option): Allow -32 in a non-ELF environment.
* gas/lib/gas-defs.exp: Update description of run_dump_test proc.
* gas/mips/dli.d: Pass -64 to gas.
* gas/mips/mips64-mips3d-incl.d: Likewise.
* gas/mips/octeon.d: Likewise.
* gas/mips/sb1-ext-mdmx.d: Likewise.
* gas/mips/sb1-ext-ps.d: Likewise.
* gas/mips/e32el-rel2.s: Pass -march=mips3 to gas.
Update expected relocs.
* gas/mips/ld-ilocks-addr32.d: Do not run for tx39 targets.
* gas/mips/mips.exp: Remove 'ilocks' variable.
Add ecoff targets to 'addr32' variable.
Set 'no_mips16' for ecoff targets.
Do not run div-ilocks or mul-ilocks test variants.
* gas/mips/mips16-intermix.d: Use nm instead of objdump so that
the symbol table output is sorted. Update expecetd output.
gas/
* config/tc-arm.c (attributes_set_explicitly): New array.
(s_arm_eabi_attribute): Check return value from s_vendor_attribute.
(cpu_arch): Add ARM_ARCH_V5T.
(aeabi_set_attribute_int): New function.
(aeabi_set_attribute_string): New function.
(aeabi_set_public_attributes): Set attributes according to the user's
intentions, rather than the actual state of the binary.
Use aeabi_set_attribute_int and aeabi_set_attribute_string instead of
bfd_elf_add_proc_attr_int and bfd_elf_add_proc_attr_string.
Support WMMXv2. Use attribute names instead of numbers.
* read.c (s_vendor_attribute): Change return type to int.
Return the tag number that was set.
* read.h (s_vendor_attribute): Change return type to int.
gas/testsuite/
* gas/arm/attr-cpu-directive.d: New file.
* gas/arm/attr-cpu-directive.s: New file.
* gas/arm/attr-default.d: New file.
* gas/arm/attr-march-all.d: New file.
* gas/arm/attr-march-armv1.d: New file.
* gas/arm/attr-march-armv2.d: New file.
* gas/arm/attr-march-armv2a.d: New file.
* gas/arm/attr-march-armv2s.d: New file.
* gas/arm/attr-march-armv3.d: New file.
* gas/arm/attr-march-armv3m.d: New file.
* gas/arm/attr-march-armv4.d: New file.
* gas/arm/attr-march-armv4t.d: New file.
* gas/arm/attr-march-armv4txm.d: New file.
* gas/arm/attr-march-armv4xm.d: New file.
* gas/arm/attr-march-armv5.d: New file.
* gas/arm/attr-march-armv5t.d: New file.
* gas/arm/attr-march-armv5te.d: New file.
* gas/arm/attr-march-armv5tej.d: New file.
* gas/arm/attr-march-armv5texp.d: New file.
* gas/arm/attr-march-armv5txm.d: New file.
* gas/arm/attr-march-armv6-m.d: New file.
* gas/arm/attr-march-armv6.d: New file.
* gas/arm/attr-march-armv6j.d: New file.
* gas/arm/attr-march-armv6k.d: New file.
* gas/arm/attr-march-armv6kt2.d: New file.
* gas/arm/attr-march-armv6t2.d: New file.
* gas/arm/attr-march-armv6z.d: New file.
* gas/arm/attr-march-armv6zk.d: New file.
* gas/arm/attr-march-armv6zkt2.d: New file.
* gas/arm/attr-march-armv6zt2.d: New file.
* gas/arm/attr-march-armv7-a.d: New file.
* gas/arm/attr-march-armv7-m.d: New file.
* gas/arm/attr-march-armv7-r.d: New file.
* gas/arm/attr-march-armv7.d: New file.
* gas/arm/attr-march-armv7a.d: New file.
* gas/arm/attr-march-armv7m.d: New file.
* gas/arm/attr-march-armv7r.d: New file.
* gas/arm/attr-march-iwmmxt.d: New file.
* gas/arm/attr-march-iwmmxt2.d: New file.
* gas/arm/attr-march-xscale.d: New file.
* gas/arm/attr-mcpu.d: New file.
* gas/arm/attr-mfpu-arm1020e.d: New file.
* gas/arm/attr-mfpu-arm1020t.d: New file.
* gas/arm/attr-mfpu-arm1136jf-s.d: New file.
* gas/arm/attr-mfpu-arm1136jfs.d: New file.
* gas/arm/attr-mfpu-arm7500fe.d: New file.
* gas/arm/attr-mfpu-fpa.d: New file.
* gas/arm/attr-mfpu-fpa10.d: New file.
* gas/arm/attr-mfpu-fpa11.d: New file.
* gas/arm/attr-mfpu-fpe.d: New file.
* gas/arm/attr-mfpu-fpe2.d: New file.
* gas/arm/attr-mfpu-fpe3.d: New file.
* gas/arm/attr-mfpu-maverick.d: New file.
* gas/arm/attr-mfpu-neon-fp16.d: New file.
* gas/arm/attr-mfpu-neon.d: New file.
* gas/arm/attr-mfpu-softfpa.d: New file.
* gas/arm/attr-mfpu-softvfp+vfp.d: New file.
* gas/arm/attr-mfpu-softvfp.d: New file.
* gas/arm/attr-mfpu-vfp.d: New file.
* gas/arm/attr-mfpu-vfp10-r0.d: New file.
* gas/arm/attr-mfpu-vfp10.d: New file.
* gas/arm/attr-mfpu-vfp3.d: New file.
* gas/arm/attr-mfpu-vfp9.d: New file.
* gas/arm/attr-mfpu-vfpv2.d: New file.
* gas/arm/attr-mfpu-vfpv3-d16.d: New file.
* gas/arm/attr-mfpu-vfpv3.d: New file.
* gas/arm/attr-mfpu-vfpxd.d: New file.
* gas/arm/attr-order.d: Update Tag_ARM_ISA_use and Tag_THUMB_ISA_use.
* gas/arm/attr-override-cpu-directive.d: New file.
* gas/arm/attr-override-cpu-directive.s: New file.
* gas/arm/attr-override-mcpu.d: New file.
* gas/arm/attr-override-mcpu.s: New file.
* gas/arm/blank.s: New file.
* gas/arm/eabi_attr_1.d: Update Tag_ARM_ISA_use and Tag_THUMB_ISA_use.
ld/testsuite/
* ld-arm/attr-merge-3.attr: Update following gas change.
* ld-arm/attr-merge-2.attr: Update Tag_ARM_ISA_use and
Tag_THUMB_ISA_use following gas changes.
* ld-arm/attr-merge-4.attr: Likewise.
* ld-arm/attr-merge-5.attr: Likewise.
* ld-arm/attr-merge-arch-1.attr: Likewise.
* ld-arm/attr-merge-arch-2.attr: Likewise.
* ld-arm/attr-merge-unknown-2.d: Likewise.
* ld-arm/attr-merge-unknown-2r.d: Likewise.
* ld-arm/attr-merge-unknown-3.d: Likewise.
* ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-00.d: Likewise.
* ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-02.d: Likewise.
* ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-04.d: Likewise.
* ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-20.d: Likewise.
* ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-22.d: Likewise.
* ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-40.d: Likewise.
* ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-44.d: Likewise.
* ld-arm/attr-merge.attr: Likewise.
Daniel Jacobowitz <dan@codesourcery.com>
gas/
* config/tc-arm.c (arm_copy_symbol_attributes): New function.
* config/tc-arm.h (arm_copy_symbol_attributes): New prototype.
(CONVERT_SYMBOLIC_ATTRIBUTE): New define.
* read.c (s_vendor_attribute): Add support for symbolic tag names.
Improve string parser.
* doc/c-arm.texi (ARM Machine Directives): Document
.eabi_attribute symbolic tag names.
gas/testsuite/
* gas/arm/attr-syntax.d: New file.
* gas/arm/attr-syntax.s: New file.
Julian Brown <julian@codesourcery.com>
bfd/
* elf-bfd.h (NUM_KNOWN_OBJ_ATTRIBUTES): Set to 71 to include all known
ARM attributes in ABI 2.07.
* elf32-arm.c (get_secondary_compatible_arch): New function.
(set_secondary_compatible_arch): New function.
(tag_cpu_arch_combine): New function.
(elf32_arm_copy_one_eabi_other_attribute): Delete function.
(elf32_arm_copy_eabi_other_attribute_list): Delete function.
(elf32_arm_merge_eabi_attributes): Rename order_312 to order_021 to
make it fit with order_01243.
Add support for Tag_also_compatible_with,
Tag_CPU_unaligned_access, Tag_T2EE_use, Tag_Virtualization_use,
Tag_MPextension_use, Tag_nodefaults and Tag_conformance.
Improve/tidy up support for Tag_CPU_raw_name, Tag_CPU_name,
Tag_CPU_arch, Tag_ABI_HardFP_use, Tag_VFP_HP_extension,
Tag_ABI_FP_denormal, Tag_ABI_PCS_GOT_use, Tag_ABI_align8_needed,
Tag_VFP_arch and Tag_ABI_FP_16bit_format.
Rework the way unknown attributes are handled.
Defer errors until all attributes have been processed.
gas/
* config/tc-arm.c (cpu_arch): Change ARM_ARCH_V6M to 11.
include/elf/
* arm.h (TAG_CPU_ARCH_V6_M, TAG_CPU_ARCH_V6S_M): New defines.
(MAX_TAG_CPU_ARCH, TAG_CPU_ARCH_V4T_PLUS_V6_M): New defines.
(Tag_NEON_arch): Rename to Tag_Advanced_SIMD_arch to match ARM ABI
version 2.07.
(Tag_undefined39, Tag_nodefaults): New enum values.
(Tag_also_compatible_with, Tag_T2EE_use): Likewise.
(Tag_conformance, Tag_Virtualization_use): Likewise.
(Tag_undefined69, Tag_MPextension_use): Likewise.
EF_IA_64_ARCHVER_1): New macros. Minor reformatting.
* bfd/Makefile.am (BFD32_BACKENDS): Add new object vmsutil.lo
(BFD32_BACKENDS_CFILES): Add new file vmsutil.c
(vmsutil.lo): Add dependency rule
* bfd/Makefile.in: Regenerate
* bfd/config.bfd (ia64*-*-*vms*): Add case.
* bfd/configure.in (bfd_elf64_ia64_vms_vec): Add case.
* bfd/configure: Regenerate
* bfd/vmsutil.[ch]: New files
* bfd/elf-bfd.h (struct bfd_elf_special_section): Change type of
attr to bfd_vma.
* bfd/elfxx-ia64.c (elfNN_vms_post_process_headers,
elfNN_vms_section_processing, elfNN_vms_final_write_processing,
elfNN_vms_close_and_cleanup, elfNN_vms_section_from_shdr,
elfNN_vms_object_p): New functions
* bfd/targets.c (bfd_elf64_ia64_vms_vec): New target.
* gas/configure.tgt(ia64-*-*vms*): New target.
* gas/dwarf2dbg.h (dwarf2_loc_mark_labels): Make extern.
* gas/tc.h (md_number_to_chars): Declare iff undefined.
* gas/config/obj-elf.c (obj_elf_change_section): Change type of
arg attr to bfd_vma.
(obj_elf_parse_section_letters): Return a bfd_vma. Change type of
variables attr, md_attr to bfd_vma.
(obj_elf_section_word): Likewise.
(obj_elf_section): Change type of variable attr to bfd_vma
* gas/config/obj-elf.h (obj_elf_change_section): Change type of
arg attr to bfd_vma
* gas/config/tc-ia64.c (bfdver.h,time.h): Include.
(ia64_elf_section_letter): Now returns a bfd_vma.
Handle VMS specific attributes.
(ia64_elf_section_flags): Arg attr now a bfd_vma.
(ia64_init): Don't turn on dependency checking for VMS.
(ia64_target_format): Check for VMS flag bit.
(do_alias): Hande decc$ functions.
(get_vms_time): New function.
(ia64_vms_note): New function.
* gas/config/tc-ia64.h (ia64_elf_section_letter): Now returns a bfd_vma.
(ia64_elf_section_flags): Arg attr now a bfd_vma.
(tc_init_after_args): Define for VMS.
* gas/config/tc-alpha.c (alpha_elf_section_letter): Return a bfd_vma.
(alpha_elf_section_flags): Change type of arg attr to bfd_vma.
* gas/config/tc-alpha.h: Likewise.
* gas/config/tc-i386.c (x86_64_section_letter): Return a bfd_vma.
(x86_64_section_word): Return a bfd_vma.
* gas/config/tc-i386.h: Likewise.
* gas/config/tc-ip2k.c (ip2k_elf_section_flags): Change type of arg
attr to bfd_vma.
* gas/config/tc-ip2k.h: Likewise.
* gas/config/tc-mep.c (mep_elf_section_letter): Return a bfd_vma.
(mep_elf_section_flags): Change type of arg attr to bfd_vma.
* gas/config/tc-mep.h: Likewise.
* gas/config/tc-ppc.c (ppc_section_letter): Return a bfd_vma.
(ppc_section_word): Return a bfd_vma.
(ppc_section_flags): Change type of arg attr to bfd_vma.
* gas/config/tc-ppc.h: Likewise.
* gas/config/te-vms.h (DWARF2_DIR_SHOULD_END_WITH_SEPARATOR,
DWAR2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILEN_NAME):
New file with new macros
* gas/dwarf2dbg.c (get_filenum, out_file_list): Default and call new
macros.
* elf32-spu.c (struct spu_link_hash_table): Add init, line_size_log2,
num_lines_log2.
(struct got_entry): Add br_addr.
(struct call_info): Add priority.
(struct function_info): Add lr_store and sp_adjust.
(spu_elf_setup): Init line_size_log2 and num_lines_log2.
(spu_elf_find_overlays): For soft-icache, mark any section within cache
area as an overlay, and check that no other overlays exist. Look up
icache overlay manager entry sym.
(BRA_STUBS, BRA, BRASL): Define.
(enum _stub_type): Replace ovl_stub with call_ovl_stub and br*_ovl_stub.
(needs_ovl_stub): Adjust for soft-icache. Return priority encoded
in branch insn.
(count_stub, build_stub): Support soft-icache.
(build_spuear_stubs, process_stubs): Adjust build_stub call.
(spu_elf_size_stubs): Size soft-icache stubs.
(overlay_index): New function.
(spu_elf_build_stubs): Make static. Support soft-icache.
(spu_elf_check_vma): Don't turn off auto_overlay if soft-icache.
(find_function_stack_adjust): Save lr store and stack adjust insn
offsets.
(maybe_insert_function): Adjust find_function_stack_adjust call.
(mark_functions_via_relocs): Retrieve priority.
(remove_cycles): Only warn about pruned arcs when stack_analysis.
(sort_calls): Sort by priority first.
(mark_overlay_section): Ignore .ovl.init.
(sum_stack): Only print when stack_analysis.
(print_one_overlay_section): New function, extracted from..
(spu_elf_auto_overlay): ..here. Support soft-icache overlays.
(spu_elf_stack_analysis): Only print when htab->stack_analysis.
(spu_elf_final_link): Call spu_elf_stack_analysis for lrlive
analysis. Call spu_elf_build_stubs.
(spu_elf_relocate_section): For soft-icache encode overlay index
into addresses.
(spu_elf_output_symbol_hook): Support soft-icache.
(spu_elf_modify_program_headers: Likewise.
* elf32-spu.h (struct spu_elf_params): Add lrlive_analysis. Rename
num_regions to num_lines. Add line_size and max_branch.
(enum _ovly_flavour): Add ovly_soft_icache.
(spu_elf_build_stubs): Delete.
gas/
* config/tc-spu.c (md_pseudo_table): Add "brinfo".
(brinfo): New var.
(md_assemble): Poke brinfo into branch instructions.
(spu_brinfo): New function.
(md_apply_fix): Don't assume insn fields start off at zero, mask
them to remove possible brinfo.
ld/
* emultempl/spuelf.em (params): Init new fields.
(num_lines_set, line_size_set, icache_mgr, icache_mgr_stream): New vars.
(spu_place_special_section): Adjust placement for soft-icache. Pad
soft-icache section to a fixed size. Clear addr_tree.
(spu_elf_load_ovl_mgr): Support soft-icache. Map overlay manager
sections a little more intelligently.
(gld${EMULATION_NAME}_finish): Don't call spu_elf_build_stubs.
(OPTION_SPU_NUM_LINES): Rename from OPTION_SPU_NUM_REGIONS.
(OPTION_SPU_SOFT_ICACHE, OPTION_SPU_LINE_SIZE): Define.
(OPTION_SPU_LRLIVE): Define.
(PARSE_AND_LIST_LONGOPTS): Add new soft-icache options.
(PARSE_AND_LIST_OPTIONS): Likewise.
(PARSE_AND_LIST_ARGS_CASES): Handle them.
* emultempl/spu_icache.S: Dummy file.
* emultempl/spu_icache.o_c: Regenerate.
* Makefile.am (eelf32_spu.c): Depend on spu_icache.o_c.
(spu_icache.o_c): Add rule to build.
(CLEANFILES): Zap temp files.
(EXTRA_DIST): Add spu_icache.o_c.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-spu/ovl.d: Allow for absolute branches in stubs.
* ld-spu/ovl2.d: Likewise.
* config/tc-ppc.c (ppc_setup_opcodes): Remove PPC_OPCODE_NOPOWER4 test.
Test the new "deprecated" opcode field.
include/opcode/
* ppc.h (struct powerpc_opcode): New field "deprecated".
(PPC_OPCODE_NOPOWER4): Delete.
opcodes/
* ppc-opc.c (PPCNONE): Define.
(NOPOWER4): Delete.
(powerpc_opcodes): Initialize the new "deprecated" field.
BFD_RELOC_CRIS_32_IE, in the test whether the relocation fits.
(get_3op_or_dip_prefix_op): Handle TLS/PIC decoration for the
"double indirect" addressing mode.
(cris_get_reloc_suffix): Add entry for :IE for BFD_RELOC_CRIS_32_IE.
(cris_number_to_imm, tc_gen_reloc): Handle BFD_RELOC_CRIS_32_IE.
* common.h (STT_IFUNC): Define.
elfcpp/
* elfcpp.h (enum STT): Add STT_IFUNC.
bfd/
* syms.c (struct bfd_symbol): Add new flag BSF_INDIRECT_FUNCTION.
Remove redundant flag BFD_FORT_COMM_DEFAULT_VALUE. Renumber flags
to remove gaps.
(bfd_print_symbol_vandf): Return 'i' for BSF_INDIRECT_FUNCTION.
(bfd_decode_symclass): Likewise.
* elf.c (swap_out_syms): Translate BSF_INDIRECT_FUNCTION into
STT_IFUNC.
(elf_find_function): Treat STT_IFUNC in the same way as STT_FUNC.
(_bfd_elf_is_function_type): Likewise.
* elf32-arm.c (arm_elf_find_function): Likewise.
(elf32_arm_adjust_dynamic_symbol): Likewise.
(elf32_arm_swap_symbol_in): Likewise.
(elf32_arm_additional_program_headers): Likewise.
* elf32-i386.c (is_indirect_symbol): New function.
(elf_i386_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf_i386_relocate_section): Likewise.
* elf64-x86-64.c (is_indirect_symbol): New function.
(elf64_x86_64_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf64_x86_64_relocate_section): Likewise.
* elfcode.h (elf_slurp_symbol_table): Translate STT_IFUNC into
BSF_INDIRECT_FUNCTION.
* elflink.c (_bfd_elf_adjust_dynamic_reloc_section): Add support
for STT_IFUNC symbols.
(get_ifunc_reloc_section_name): New function.
(_bfd_elf_make_ifunc_reloc_section): New function.
* elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs field.
* bfd-in2.h: Regenerate.
gas/
* config/obj-elf.c (obj_elf_type): Add support for STT_IFUNC type.
* doc/as.texinfo: Document new feature.
* NEWS: Mention new feature.
gas/testsuite/
* gas/elf/type.s: Add test of STT_IFUNC symbol type.
* gas/elf/type.e: Update expected disassembly.
* gas/elf/elf.exp: Update grep of symbol types.
ld/
* NEWS: Mention new feature.
* pe-dll.c (process_def_file): Replace use of redundant
BFD_FORT_COMM_DEFAULT_VALUE with 0.
* scripttempl/elf.sc: Add .rel.ifunc.dyn and .rela.ifunc.dyn
sections.
ld/testsuite/
* ld-mips-elf/reloc-1-n32.d: Updated expected output for reloc
descriptions.
* ld-mips-elf/reloc-1-n64.d: Likewise.
* ld-i386/ifunc.d: New test.
* ld-i386/ifunc.s: Source file for the new test.
* ld-i386/i386.exp: Run the new test.
* config/tc-cr16.c (md_pseudo_table): Add "4byte" directive to
md_pseudo_table and accept @c prefix, same as long directive.
(cr16_cons_fix_new): Initialize rtype to BFD_RELOC_UNUSED.
config/tc-cr16.c (tc_gen_reloc): Declare a variable of type
bfd_reloc_code_real_type and set it for GOT related relocations.
(md_undefined_symbol): Defined
(process_label_constant): Added checks for GOT/got and cGOT/cGOT
prefixes with constant label and set the appropriate relocation type.
* doc/c-cr16.texi (cr16-operand specifiers): Add got/GOT and cgot/cGOT.
* xtensa-isa.c (xtensa_state_is_shared_or): New function.
2008-11-21 Sterling Augustine <sterling@tensilica.com>
* xtensa-isa-internal.h (XTENSA_STATE_IS_SHARED_OR): New flag.
* xtensa-isa.h (xtensa_state_is_shared_or): New prototype.
2008-11-21 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (check_t1_t2_reads_and_writes): Call
xtensa_state_is_shared_or to allow multiple opcodes within a
single FLIX bundle to write to these special states.
for FP instructions.
testsuite/
* gas/mips/mips1-fp.s, testsuite/gas/mips/mips1-fp.d,
testsuite/gas/mips/mips1-fp.l: New tests.
* gas/mips/mips.exp: Run them.
* config/tc-xtensa.c (xtensa_j_opcode): New.
(xg_instruction_matches_option_term): Handle "FREEREG" option.
(xg_build_to_insn): Likewise. Update renamed tls_reloc reference.
(md_begin): Initialize xtensa_j_opcode.
(md_assemble): Update renamed tls_reloc reference. Handle "j.l".
(xg_assemble_vliw_tokens): Save free_reg info in the frag.
(tinsn_immed_from_frag): Get free_reg info back out of the frag.
(vinsn_to_insnbuf): Update renamed tls_reloc references.
Distinguish extra argument for "FREEREG" from extra TLS argument.
* config/tc-xtensa.h (struct xtensa_frag_type): Add free_reg field.
* config/xtensa-istack.h (struct tinsn_struct): Rename tls_reloc
field to extra_arg.
* config/xtensa-relax.c (widen_spec_list): Add rules to relax "j.l".
(build_transition): Handle "FREEREG" operand.
* config/xtensa-relax.h (enum op_type): Add OP_FREEREG.
2008-11-04 Bob Wilson <bob.wilson@acm.org>
* gas/xtensa/all.exp: Run jlong test.
* gas/xtensa/jlong.d: New.
* gas/xtensa/jlong.s: New.
* read.c (pseudo_set): Don't allow global register symbol only
if TC_GLOBAL_REGISTER_SYMBOL_OK is undefined.
* symbols.c (S_SET_EXTERNAL): Likewise.
* config/tc-mmix.h (TC_GLOBAL_REGISTER_SYMBOL_OK): Defined.
* doc/internals.texi: Document TC_GLOBAL_REGISTER_SYMBOL_OK.
to, besides PIC, also imply TLS or to say "relocation specifier" or
similar.
(RELOC_SUFFIX_CHAR): Rename from PIC_SUFFIX_CHAR. Change all callers.
(cris_get_reloc_suffix): Rename from cris_get_pic_suffix. Change all
callers. Also handle TLS relocs.
(cris_get_specified_reloc_size): Rename from cris_get_pic_reloc_size.
Change all callers. Also handle TLS relocs.
(tls): New constant.
(cris_process_instruction): Check for non-PIC TLS relocations and
adjust message when emitting error message about relocation not
fitting.
(get_autoinc_prefix_or_indir_op): Also check for relocation suffix
when tls is true.
(get_3op_or_dip_prefix_op): Ditto.
(cris_number_to_imm, tc_gen_reloc): Handle TLS relocs like PIC relocs.
do not match it class and if necessary update the class.
(null_error_handler): New function. Suppresses the generation of
bfd error messages.
* coff64-rs6000.c (bfd_xcoff_backend_data): Update comment.
* config/tc-tic4x.c (tic4x_globl): Call S_SET_EXTERNAL as well as
S_SET_STORAGE_CLASS.
relocs with no symbol.
* config/tc-mmix.c (md_assemble): Mark fake symbol on
BFD_RELOC_MMIX_BASE_PLUS_OFFSET as OK for use by relocs.
(mmix_md_end): Likewise mark mmix reg contents section symbol.
* config/tc-mips.h (DWARF2_FDE_RELOC_SIZE): Define.
gas/testsuite/
* gas/mips/cfi-n64-1.s, gas/mips/cfi-n64-1.d: New test.
* gas/mips/mips.exp: Run it.
alignment field of the .lcomm directive to be optional.
(pe_lcomm): New function. Pass pe_lcomm_internal to
s_comm_internal.
(md_pseudo_table): Implement .lcomm directive for COFF based
targets.
* doc/c-i386.texi (i386-Directives): New node. Used to document
the .lcomm directive.
2008-08-28 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_assemble): Force number of displacement
operands to zero when processing string instruction.
(i386_index_check): Special-case string instruction operands. Don't
fudge address prefix if there already was a memory operand. Fix
error message to correctly reflect the addressing mode used.
(i386_att_operand): Fix comment.
(i386_intel_operand): Snapshot, clear, and restore base and index
reg for each operand processed. Increment count of memory operands
later.
gas/testsuite/
2008-08-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/string-bad.{l,s}, gas/i386/string-ok.{d,e,s}: New.
* gas/i386/i386.exp: Run new tests.
R_PARISC_SEGREL32 and R_PARISC_SEGREL64.
* som.c (som_fixup_formats): Add R_DATA_GPREL fixup.
(som_hppa_howto_table): Likewise.
(hppa_som_gen_reloc_type): In case R_HPPA_GOTOFF, detect R_DATA_GPREL
final type.
(som_write_fixups): Handle R_DATA_GPREL.
* config/tc-hppa.c (is_SB_relative): New macro.
(fix_new_hppa): Remove $segrel$ marker.
(cons_fix_new_hppa): Set reloc type R_PARISC_SEGREL32 if expression is
segment relative.
* config/tc-hppa.h (tc_frob_symbol): Check for $segrel$.
(output_cie, output_fde): Use it.
(DWARF2_EH_FRAME_READ_ONLY): New.
(cfi_finish): Use it.
* config/tc-hppa.h (DWARF2_FDE_RELOC_SIZE): Set to 8 for 64-bit.
(DWARF2_CIE_DATA_ALIGNMENT): Change sign.
(DWARF2_EH_FRAME_READ_ONLY): New.
* config/tc-hppa.c (tc_gen_reloc): Generate pc-relative relocations
from the results of DIFF_EXPR_OK manipulation.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
* elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with...
(elf_mips_copy_howto): ...this howto. Clear the size fields.
(mips_vxworks_jump_slot_howto_rela): Replace with...
(elf_mips_jump_slot_howto): ...this howto.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_plt_readonly): Define.
(elf_backend_plt_sym_val): Define for non-VxWorks targets.
(mips_vxworks_bfd_reloc_type_lookup): Delete.
(mips_vxworks_bfd_reloc_name_lookup): Likewise.
(mips_vxworks_rtype_to_howto): Likewise.
(elf_backend_want_dynbss): Don't define for VxWorks.
(elf_backend_plt_readonly): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Likewise.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(elf_backend_mips_rtype_to_howto): Likewise.
(elf_backend_adjust_dynamic_symbol): Likewise.
(elf_backend_got_symbol_offset): Don't define.
* elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and
R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete.
(_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs)
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare.
* elfxx-mips.c (mips_elf_la25_stub): New structure.
(LA25_LUI, LA25_J, LA25_ADDIU): New macros.
(mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs"
and "has_nonpic_branches" fields. Remove "is_relocation_target" and
"is_branch_target".
(mips_elf_link_hash_table): Add blank lines. Add
"use_plts_and_copy_relocs", "reserved_gotno", "strampoline",
"la25_stubs" and "add_stub_section" fields.
(mips_htab_traverse_info): New structure.
(PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros.
(MIPS_RESERVED_GOTNO): Delete.
(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry)
(mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables.
(mips_elf_link_hash_newfunc): Update after the changes to
mips_elf_link_hash_entry.
(mips_elf_check_mips16_stubs): Replace the DATA parameter with
an INFO parameter. Don't look through warnings symbols here;
do it in mips_elf_check_symbols instead.
(mips_elf_create_stub_symbol): New function.
(mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions.
(_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise.
(mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise.
(mips_elf_add_la25_stub, mips_elf_check_symbols): New functions.
(mips_elf_gotplt_index): Check for VxWorks.
(mips_elf_output_dynamic_relocation): Take the relocation index
as an extra parameter. Do not increment reloc_count here.
(mips_elf_initialize_tls_slots): Update the calls to
mips_elf_output_dynamic_relocation accordingly.
(mips_elf_multi_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(mips_elf_create_got_section): Don't allocate reserved GOT
entries here. Unconditionally create .got.plt, but don't
set its alignment here.
(mips_elf_relocation_needs_la25_stub): New function.
(mips_elf_calculate_relocation): Redirect branches and jumps to
a non-PIC stub if one exists. Check !h->has_static_relocs instead
of !htab->is_vxworks when deciding whether to create dynamic
relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64.
(_bfd_mips_elf_create_dynamic_sections): Unconditionally call
_bfd_elf_create_dynamic_sections. Unconditionally set up
htab->splt and htab->sdynbss. Set htab->srelplt to ".rel.plt"
if !htab->is_vxworks. Add non-VxWorks values of
htab->plt_header_size and htab->plt_entry_size.
(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
non-branch static relocations. Set has_nonpic_branches when an la25
stub might be required. Set can_make_dynamic_p to TRUE if R_MIPS_32,
R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic,
rather than duplicating the condition. Do not make them dynamic
for read-only sections in non-PIC executable objects.
Do not protect this code with dynobj == NULL || htab->sgot == NULL;
handle each group of cases separately. Add a default case that
sets has_static_relocs for non-GOT relocations that cannot be
made dynamic. Don't set is_relocation_target and is_branch_target.
Reject non-PIC static relocations in shared objects.
(_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into...
(_bfd_mips_elf_adjust_dynamic_symbol): ...here, using
htab->use_plts_and_copy_relocs instead of htab->is_vxworks
to select PLT and copy-reloc handling. Set the alignment of
.plt and .got.plt when allocating the first entry. Generalize
code to handle REL as well as RELA sections and 64-bit as well as
32-bit GOT entries. Complain if we find a static-only reloc
against an externally-defined symbol and if we cannot create
dynamic relocations for it. Allocate copy relocs using
mips_elf_allocate_dynamic_relocations on non-VxWorks targets.
Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs.
Skip reserved .got.plt entries.
(_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols
instead of mips_elf_check_mips16_stubs to process each symbol.
Do the traversal for relocatable objects too.
(mips_elf_lay_out_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it
is empty. Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling
to non-VxWorks targets. Only add DT_REL{,A}, DT_REL{,A}SZ and
DT_REL{,A}ENT if .rel.dyn is nonempty. Create a symbol for the
PLT. Allocate a nop at the end of the PLT. Allocate DT_MIPS_PLTGOT.
(mips_elf_create_la25_stub_info): New function.
(_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries
and copy relocs where necessary. Check pointer_equality_needed.
(mips_finish_exec_plt): New function.
(_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT
to the beginning of htab->sgot. Use htab->reserved_gotno instead
of MIPS_RESERVED_GOTNO. Assert htab->use_plts_and_copy_relocs
instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL.
Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets.
Use mips_finish_exec_plt to create non-VxWorks PLT headers. Set
DT_MIPS_PLTGOT.
(_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs
from the indirect symbol to the direct symbol. Also copy
has_nonpic_branches for indirect symbols.
(_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
DT_MIPS_RWPLT.
(_bfd_mips_elf_link_hash_table_create): Initialize the new
mips_elf_link_hash_table fields.
(_bfd_mips_vxworks_link_hash_table_create): Set
use_plts_and_copy_relocs to TRUE. Use TRUE rather than 1
when setting is_vxworks.
(_bfd_mips_elf_use_plts_and_copy_relocs): New function.
(_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for
each la25_stub.
(_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects
as PIC. Generalize message about linking PIC and non-PIC.
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New
functions.
* reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT.
* bfd-in2.h: Regenerated.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and
STO_MIPS_PIC.
(slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here.
(dump_relocations, debug_apply_relocations): Don't handle it here.
(get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT.
(print_mips_pltgot_entry): New function.
(process_mips_specific): Dump the PLT GOT.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
(md_longopts): Add -call_nonpic.
(md_parse_option): Handle OPTION_CALL_NONPIC.
(md_show_usage): Add -call_nonpic.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
* gas/mips/mips.exp: Run it.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to...
(OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these
two variables.
* emulparams/elf32bmipn32-defs.sh: Likewise.
* emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h.
(is_mips_elf): New macro.
(stub_file, stub_bfd): New variables.
(hook_stub_info): New structure.
(hook_in_stub): New function.
(mips_add_stub_section): Likewise.
(mips_create_output_section_statements): Likewise.
(mips_before_allocation): Likewise.
(real_func): New variable.
(mips_for_each_input_file_wrapper): New function.
(mips_lang_for_each_input_file): Likewise.
(lang_for_each_input_file): Define.
(LDEMUL_BEFORE_ALLOCATION): Likewise.
(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* ld-mips-elf/mips16-pic-3a.s,
ld-mips-elf/mips16-pic-3b.s,
ld-mips-elf/mips16-pic-3.dd,
ld-mips-elf/mips16-pic-3.gd,
ld-mips-elf/mips16-pic-3.rd,
ld-mips-elf/mips16-pic-3.inc,
ld-mips-elf/pic-and-nonpic-1a.s,
ld-mips-elf/pic-and-nonpic-1b.s,
ld-mips-elf/pic-and-nonpic-1.ld,
ld-mips-elf/pic-and-nonpic-1.dd,
ld-mips-elf/pic-and-nonpic-1.nd,
ld-mips-elf/pic-and-nonpic-1-rel.dd,
ld-mips-elf/pic-and-nonpic-1-rel.nd,
ld-mips-elf/pic-and-nonpic-2a.s,
ld-mips-elf/pic-and-nonpic-2b.s,
ld-mips-elf/pic-and-nonpic-2.d,
ld-mips-elf/pic-and-nonpic-3a.s,
ld-mips-elf/pic-and-nonpic-3a.ld,
ld-mips-elf/pic-and-nonpic-3a.dd,
ld-mips-elf/pic-and-nonpic-3a.gd,
ld-mips-elf/pic-and-nonpic-3a.sd,
ld-mips-elf/pic-and-nonpic-3b.s,
ld-mips-elf/pic-and-nonpic-3b.ld,
ld-mips-elf/pic-and-nonpic-3b.ad,
ld-mips-elf/pic-and-nonpic-3b.dd,
ld-mips-elf/pic-and-nonpic-3b.gd,
ld-mips-elf/pic-and-nonpic-3b.nd,
ld-mips-elf/pic-and-nonpic-3b.pd,
ld-mips-elf/pic-and-nonpic-3b.rd,
ld-mips-elf/pic-and-nonpic-3b.sd,
ld-mips-elf/pic-and-nonpic-3-error.d,
ld-mips-elf/pic-and-nonpic-4a.s,
ld-mips-elf/pic-and-nonpic-4b.s,
ld-mips-elf/pic-and-nonpic-4b.ld,
ld-mips-elf/pic-and-nonpic-4b.ad,
ld-mips-elf/pic-and-nonpic-4b.dd,
ld-mips-elf/pic-and-nonpic-4b.gd,
ld-mips-elf/pic-and-nonpic-4b.nd,
ld-mips-elf/pic-and-nonpic-4b.rd,
ld-mips-elf/pic-and-nonpic-4b.sd,
ld-mips-elf/pic-and-nonpic-4-error.d,
ld-mips-elf/pic-and-nonpic-5a.s,
ld-mips-elf/pic-and-nonpic-5b.s,
ld-mips-elf/pic-and-nonpic-5b.ld,
ld-mips-elf/pic-and-nonpic-5b.ad,
ld-mips-elf/pic-and-nonpic-5b.dd,
ld-mips-elf/pic-and-nonpic-5b.gd,
ld-mips-elf/pic-and-nonpic-5b.nd,
ld-mips-elf/pic-and-nonpic-5b.rd,
ld-mips-elf/pic-and-nonpic-5b.sd,
ld-mips-elf/pic-and-nonpic-5b.pd,
ld-mips-elf/pic-and-nonpic-6.ld,
ld-mips-elf/pic-and-nonpic-6-o32a.s,
ld-mips-elf/pic-and-nonpic-6-o32b.s,
ld-mips-elf/pic-and-nonpic-6-o32c.s,
ld-mips-elf/pic-and-nonpic-6-o32.ad,
ld-mips-elf/pic-and-nonpic-6-o32.dd,
ld-mips-elf/pic-and-nonpic-6-o32.gd,
ld-mips-elf/pic-and-nonpic-6-o32.nd,
ld-mips-elf/pic-and-nonpic-6-o32.pd,
ld-mips-elf/pic-and-nonpic-6-o32.rd,
ld-mips-elf/pic-and-nonpic-6-o32.sd,
ld-mips-elf/pic-and-nonpic-6-n32a.s,
ld-mips-elf/pic-and-nonpic-6-n32b.s,
ld-mips-elf/pic-and-nonpic-6-n32c.s,
ld-mips-elf/pic-and-nonpic-6-n32.ad,
ld-mips-elf/pic-and-nonpic-6-n32.dd,
ld-mips-elf/pic-and-nonpic-6-n32.gd,
ld-mips-elf/pic-and-nonpic-6-n32.nd,
ld-mips-elf/pic-and-nonpic-6-n32.pd,
ld-mips-elf/pic-and-nonpic-6-n32.rd,
ld-mips-elf/pic-and-nonpic-6-n32.sd,
ld-mips-elf/pic-and-nonpic-6-n64a.s,
ld-mips-elf/pic-and-nonpic-6-n64b.s,
ld-mips-elf/pic-and-nonpic-6-n64c.s,
ld-mips-elf/pic-and-nonpic-6-n64.ad,
ld-mips-elf/pic-and-nonpic-6-n64.dd,
ld-mips-elf/pic-and-nonpic-6-n64.gd,
ld-mips-elf/pic-and-nonpic-6-n64.nd,
ld-mips-elf/pic-and-nonpic-6-n64.pd,
ld-mips-elf/pic-and-nonpic-6-n64.rd,
ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
* config/tc-xtensa.c (exclude_section_from_property_tables): New.
(xtensa_create_property_segments): Use it.
(xtensa_create_xproperty_segments): Likewise.
* reloc.c (BFD_RELOC_MIPS16_GOT16, BFD_RELOC_MIPS16_CALL16): Declare.
* libbfd.h, bfd-in2.h: Regenerate.
* elf32-mips.c (elf_mips16_howto_table_rel): Fill in reserved
R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
(mips16_reloc_map): Add mappings.
* elf64-mips.c (mips16_elf64_howto_table_rel): Fill in reserved
R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
(mips16_elf64_howto_table_rela): Likewise.
(mips16_reloc_map): Add mappings.
* elfn32-mips.c (elf_mips16_howto_table_rel): Fill in reserved
R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
(elf_mips16_howto_table_rela): Likewise.
(mips16_reloc_map): Add mappings.
* elfxx-mips.c (mips_elf_create_shadow_symbol): New function.
(section_allows_mips16_refs_p): Likewise.
(mips16_stub_symndx): Likewise.
(mips_elf_check_mips16_stubs): Treat the data argument as a
bfd_link_info. Mark every dynamic symbol as needing MIPS16 stubs
and create a "shadow" symbol for the original MIPS16 definition.
(mips16_reloc_p, got16_reloc_p, call16_reloc_p, hi16_reloc_p)
(lo16_reloc_p, mips16_call_reloc_p): New functions.
(_bfd_mips16_elf_reloc_unshuffle): Use mips16_reloc_p to generalize
relocation checks.
(_bfd_mips16_elf_reloc_shuffle): Likewise.
(_bfd_mips_elf_lo16_reloc): Handle R_MIPS16_GOT16.
(mips_elf_got16_entry): Add comment.
(mips_elf_calculate_relocation): Use hi16_reloc_p,
lo16_reloc_p, mips16_call_reloc_p, call16_reloc_p and got16_reloc_p
to generalize relocation checks. Use section_allows_mips16_refs_p
instead of mips16_stub_section_p. Handle R_MIPS16_CALL16 and
R_MIPS16_GOT16, allowing the former to refer directly to a
MIPS16 function if its stub is not needed.
(mips16_stub_section_p): Delete.
(_bfd_mips_elf_symbol_processing): Convert odd-valued function
symbols into even MIPS16 symbols.
(mips_elf_add_lo16_rel_addend): Use mips16_reloc_p to generalize
a relocation check.
(_bfd_mips_elf_check_relocs): Calculate "bed" and "rel_end"
earlier in the function. Use mips16_stub_symndx to identify
the target function. Avoid out-of-bounds accesses when the
stub has no relocations; report an error instead. Use
section_allows_mips16_refs_p instead of mips16_stub_section_p.
Use mips16_call_reloc_p and got16_reloc_p to generalize relocation
checks. Handle R_MIPS16_CALL16 and R_MIPS16_GOT16. Don't create
dynamic relocations for absolute references to __gnu_local_gp.
(_bfd_mips_elf_always_size_sections): Pass a bfd_link_info as
the argument to mips_elf_check_mips16_stubs. Generalize comment.
(_bfd_mips_elf_relocate_section): Use hi16_reloc_p and got16_reloc_p
to generalize relocation checks.
(_bfd_mips_elf_finish_dynamic_symbol): If a dynamic MIPS16 function
symbol has a non-MIPS16 stub, redirect the symbol to the stub.
Fix an overly long line. Don't give dynamic symbols type STO_MIPS16.
(_bfd_mips_elf_gc_sweep_hook): Handle R_MIPS16_CALL16 and
R_MIPS16_GOT16.
gas/
* config/tc-mips.c (mips16_reloc_p, got16_reloc_p, hi16_reloc_p)
(lo16_reloc_p): New functions.
(reloc_needs_lo_p): Use hi16_reloc_p and got16_reloc_p to
generalize relocation checks.
(matching_lo_reloc): New function.
(fixup_has_matching_lo_p): Use it.
(mips16_mark_labels): Don't clobber a symbol's visibility.
(append_insn): Use hi16_reloc_p and lo16_reloc_p.
(mips16_ip): Handle BFD_RELOC_MIPS16_GOT16 and BFD_RELOC_MIPS16_CALL16.
(md_apply_fix): Likewise.
(mips16_percent_op): Add %got and %call16.
(mips_frob_file): Use got16_reloc_p to generalize relocation checks.
Use matching_lo_reloc.
(mips_force_relocation): Use hi16_reloc_p and lo16_reloc_p to
generalize relocation checks.
(mips_fix_adjustable): Use lo16_reloc_p to generalize relocation
checks.
gas/testsuite/
* gas/mips/elf-rel8-mips16.d, gas/mips/elf-rel8-mips16.s,
* gas/mips/elf-rel9-mips16.d, gas/mips/elf-rel9-mips16.s,
* gas/mips/elf-rel13-mips16.d, gas/mips/elf-rel13-mips16.s: New tests.
* gas/mips/mips.exp: Run them.
ld/testsuite/
* ld-mips-elf/mips16-local-stubs-1.d: Remove stub_for_h3,
which was only referenced by the .pdr section, and was not
actually needed by code.
* ld-mips-elf/mips16-intermix.d: Remove unused static function stubs.
* ld-mips-elf/mips16-pic-1a.s,
ld-mips-elf/mips16-pic-1b.s,
ld-mips-elf/mips16-pic-1-dummy.s,
ld-mips-elf/mips16-pic-1.dd,
ld-mips-elf/mips16-pic-1.gd,
ld-mips-elf/mips16-pic-1.inc,
ld-mips-elf/mips16-pic-1.ld,
ld-mips-elf/mips16-pic-2a.s,
ld-mips-elf/mips16-pic-2b.s,
ld-mips-elf/mips16-pic-2.ad,
ld-mips-elf/mips16-pic-2.dd,
ld-mips-elf/mips16-pic-2.gd,
ld-mips-elf/mips16-pic-2.nd,
ld-mips-elf/mips16-pic-2.rd: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
* config/tc-m32c.c (OPTION_H_TICK_HEX): Define.
(md_longopts): Add support for it.
(md_parse_option): Likewise.
* doc/as.texinfo (Overview): Add new m32c options.
* doc/c-m32c.texi (M32C-Modifiers): Likewise
* as.h: (enable_h_tick_hex): New.
* app.c (enable_h_tick_hex): New.
(LEX_IS_H): New.
(do_scrub_begin): Mark 'H' and 'h' as special if enable_h_tick_hex.
(do_scrub_chars): If enable_h_tick_hex and 'h', check for H'00
style hex constants and convert the input stream to 0x00 style.
(do_scrub_chars): If a 'X style character constant is found after
a symbol character (like you're or X'00), warn the user.
(COP_INSN): New macro.
(is_opcode_valid): Use them.
(macro) <ld_st>: Use them. Don't accept coprocessor load store
insns based on the ISA if CPU is NO_ISA_COP.
<copz>: Likewise for coprocessor operations.
2008-06-24 Eric B. Weddington <eric.weddington@atmel.com>
Add support for ATtiny13A.
* config/tc-avr.c (mcu_types): Add attiny13a.
* doc/c-avr.texi: Likewise.
* config/tc-mmix.c (s_loc): Assume "negative" addresses belong to
text_section. Do the "stepping backwards" test for text_section
using unsigned operands.
(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.
opcodes/
* mips-dis.c (print_insn_args): Handle field descriptor +Q.
* mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
seqi, sne and snei.
gas/
* config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q.
(mips_ip): Likewise.
(macro_build): Likewise.
(CPU_HAS_SEQ): New macro.
(macro2) <M_SEQ_I, M_SNE_I>: Use it. Emit seq/sne and seqi/snei.
gas/testsuite/
* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*.
* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi
and snei.
2008-06-09 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Remove support for ATmega32HVB device.
* doc/c-avr.texi: Likewise.
* config/tc-mips.c (mips_frob_file): Don't match MIPS16 relocs
with non-MIPS16 relocs.
gas/testsuite/
* gas/mips/mips16-hilo-match.s: New test.
* gas/mips/mip16-hilo-match.d: New test output.Index: config/tc-mips.c
* elf32-xtensa.c (xtensa_property_section_name): New.
(xtensa_make_property_section): New.
(xtensa_get_property_section): Make static. Do not create a new
section if it does not exist.
gas/
* config/tc-xtensa.c (xtensa_create_property_segments): Use
xtensa_make_property_section instead of xtensa_get_property_section.
(xtensa_create_xproperty_segments): Likewise.
