start-sanitize-tic80
* config/tc-tic80.c (md_pseudo_table): Add entry for bss, which takes
an additional alignment argument.
(find_opcode): Allow O_symbol relocs for any 32 bit field, not just
base relative ones.
(build_insn): Handle O_symbol relocs for any 32 bit field, not just
base relative ones.
end-sanitize-tic80
* itbl-lex.l: Fix indentation mistakes from indent program.
* itbl-ops.h: Add include for ansidecl.h.
Add PARAMS around function arguments.
Add declaration for itbl_have_entries.
* itbl-ops.c: Add PARAMS around function arguments.
* Makefile.in: Add itbl build rules.
Add dependancies for itbl files to mips target.
* as.c: Add itbl support.
Add new option "--insttbl" for dynamically extending instruction set.
* as.h: Declare insttbl_file_name;
the name of file defining extensions to the basic instruction set
* configure.in, configure: Add itbl-parse.o, itbl-lex.o, and
itbl-ops.o to extra_objects for mips configuration.
Add include file link from itbl-cpu.h to
config/itbl-${target_cpu_type}.h.
* config/tc-mips.c: Allow copz instructions.
Add notes for future additions to the itbl support.
Add debug macros.
(macro): Call itbl_assemble to assemble itbl instructions.
See if an unknown register is specified in an itbl entry.
description.
start-sanitize-tic80
* config/tc-tic80.h (NEED_FX_R_TYPE): Define.
* config/tc-tic80.c (find_opcode): Add code to support O_symbol
operands.
(build_insn): Grab a frag early so we can use the address in
fixups. Take one's complement of BITNUM values before insertion
in opcode. Add code to support O_symbol operands.
(md_apply_fix): Replace unimplemented warning with implementation.
(md_pcrel_from): Ditto.
(tc_coff_fix2rtype): Ditto.
end-sanitize-tic80
These changes are related to Ian's gas/libgloss changes of Dec 13/Dec 18.
* tc-mips.c (mips_ip): If configured for an embedded ELF system,
don't set the section alignment to 2**4.
* mips/ddb.ld: Align the location counter before setting _gp, and
before setting edata. Remove ALIGN from _gp computation.
* mips/idt.ld, mips/pmon.ld: Before setting _gp, use ALIGN(8) instead
of ALIGN(16). Remove ALIGN from _gp computation.
like all the other targets.
* doc/internals.texi (CPU backend): Add missing word in
md_flush_pending_output description. Fix typo in md_convert_frag
description.
start-sanitize-tic80
* config/tc-tic80: Minor comment additions/changes.
end-sanitize-tic80
does not actually work, though:
* configure.in (i386-sequent-bsd*): New target.
* configure: Rebuild.
* config/tc-dynix.h: New file.
* config/tc-i386.h: Define TARGET_FORMAT if TE_DYNIX.
tc-mn10200.h, tc-mn10300.h, tc-sh.h, tc-v850.h, tc-vax.h, tc-w65.h}:
Add default definition of zero for TARGET_BYTES_BIG_ENDIAN.
* config/{tc-arm.h, tc-hppa.h, tc-i386.h, tc-mips.h, tc-ns32k.h,
tc-ppc.h, tc-sparc.h}: Move definition of TARGET_BYTES_BIG_ENDIAN
to a location consistent with the rest of the target include files.
* config/tc-i386.c: Remove misleading comment.
* doc/internals.texi (CPU backend): Add description of function
md_undefined_symbol.
start-sanitize-tic80
* config/tc-tic80.c: Add code to insert predefined symbols into the
symbol table so they can be parsed by the standard expression parser.
Remove custom code that use to parse them.
* config/tc-tic80.h: Move definition of TARGET_BYTES_BIG_ENDIAN
to a location consistent with the rest of the target include files.
end-sanitize-tic80
(DVIPS): Set to dvips.
(ps, as.ps, gasp.ps): New targets.
(internals.info, gasp.dvi, internals.dvi): Set both TEXINPUTS
and MAKEINFO env variables.
(internals.ps): Use DVIPS macro.
(clean): Remove core and backup files.
(distclean): Remove temporary files from building internals.
(clean-dvi): Ditto.
* doc/internals.texi (Frags): Fix typo.
(GAS processing): Ditto.
(CPU backend): Ditto.
* ecoff.c (init_file): Use TARGET_BYTES_BIG_ENDIAN value directly.
* mpw-config.in: Define TARGET_BYTES_BIG_ENDIAN as 1.
* read.c: Remove ugly hack that dealt with config files not
correctly defining TARGET_BYTES_BIG_ENDIAN.
(target_big_endian): Use TARGET_BYTES_BIG_ENDIAN directly.
* config/arm-big.mt: Define TARGET_BYTES_BIG_ENDIAN to 1.
* config/arm-lit.mt: Define TARGET_BYTES_BIG_ENDIAN to 0.
* config/mips-big.mt: Define TARGET_BYTES_BIG_ENDIAN to 1.
* config/mips-lit.mt: Define TARGET_BYTES_BIG_ENDIAN to 0.
* config/ppc-lit.mt: Define TARGET_BYTES_BIG_ENDIAN to 1.
* config/ppc-sol.mt: Replace TARGET_BYTES_LITTLE_ENDIAN
with TARGET_BYTES_BIG_ENDIAN defined to 0.
* config/tc-arm.h: Remove use of TARGET_BYTES_LITTLE_ENDIAN
and simplify. Test value of TARGET_BYTES_BIG_ENDIAN, not just
whether it is defined or not.
* config/tc-mips.h: Remove use of TARGET_BYTES_LITTLE_ENDIAN.
* config/tc-ppc.h: Remove use of TARGET_BYTES_LITTLE_ENDIAN
and simplify. Test value of TARGET_BYTES_BIG_ENDIAN, not just
whether it is defined or not.
start-sanitize-tic80
* config/tic80.h (TARGET_FORMAT): Define to coff-tic80.
(TARGET_BYTES_BIG_ENDIAN): Define to 0.
end-sanitize-tic80
(prev_nop_frag_holds): New static variable.
(prev_nop_frag_required): New static variable.
(prev_nop_frag_since): New static variable.
(append_insn): If we aren't reordering, and prev_nop_frag is not
NULL, and we don't need any nops, then decrease the size of
prev_nop_frag. Don't insert nops because of instructions in
noreorder sections. Remember whether the previous instructions
where in noreorder sections even when not reordering.
(mips_no_prev_insn): Add preserver parameter. Change all
callers. Refer prev_nop_frag variables when appropriate.
(mips_emit_delays): Set up prev_nop_frag.
(s_mipsset): Clear prev_nop_frag if reordering.
extended instruction in a delay slot when not reordering. Set
prev_insn_valid even if not reordering.
(md_convert_frag): Warn if an extended instruction appears in a
delay slot.
symbol table.
(mips16_ip): First parse the expression, and then see whether it
came up with a register, rather than trying to first see whether
we are looking at a register.
(md_apply_fix): Handle BFD_RELOC_MIPS16_GPREL.
* config/tc-mips.c (append_insn): Output jump instruction as a
pair of 2 byte instructions, rather than as a single 4 byte
instruction.
start-sanitize-r5900
* config/tc-mips.c (md_begin): Correct test of mips_5900.
(mips_ip): Don't check INSN_ISA for a macro.
end-sanitize-r5900
instruction registers, opcodes and formats. Build internal table
for new instructions and provide callbacks for assembler and
disassembler.
* itbl-lex.l, itbl-parse.y: Lex and yacc parsers for instruction
spec table.
* itbl-ops.h: New file. Header file for itbl support.
* config/itbl-mips.h: New file. Mips specific definitions for
itbl support.
* config/tc-d10v.h (md_do_align): Add this hook to call
d10v_cleanup() when a ".align" is detected. Fixes PR11487.
* config/tc-d10v.c (find_opcode): Correctly calculate
branch displacement when .aligns are present.
