Doug Evans
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b4cbaee405
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* m32r-sim.h (M32R_MISC_PROFILE): New members insn_cycles, cti_stall,
load_stall,biggest_cycles.
* m32r.c (m32r_model_mark_get_h_gr): Update.
(m32r_model_init_insn_cycles,m32r_model_update_insn_cycles): New fns.
(m32r_model_record_cti,m32r_model_record_cycles): New functions.
* mloop.in: Call cycle init/update fns.
* model.c: Regenerate.
* m32rx.c (m32rx_model_mark_get_h_gr): Update.
* mloopx.in: Call cycle init/update fns.
* modelx.c: Regenerate.
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1998-06-13 14:56:28 +00:00 |
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Doug Evans
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a8981d6751
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* Makefile.in (devices.o): Add dependencies.
* arch.h,cpu.c,cpu.h,cpuall.h: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update calls to TRACE_INSN_{INIT,FINI}.
* cpux.c,cpux.h,modelx.c,semx.c: Regenerate.
* m32rx.c (m32rx_model_mark_{busy,unbusy}_reg): New functions.
* mloopx.in (execute): Update calls to TRACE_INSN_{INIT,FINI}.
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1998-05-15 23:46:24 +00:00 |
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Doug Evans
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02310b01ca
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* sim-main.h: #include symcat.h.
* m32r-sim.h (BRANCH_NEW_PC): Delete current_cpu arg.
(NEW_PC_{BASE,SKIP,2,4,BRANCH_P}): New macros.
* cpu.[ch],decode.[ch],extract.c,model.c: Regenerate.
* sem.c,sem-switch.c: Regenerate.
* m32r-sim.h (SEM_NEXT_PC): Modify to handle parallel exec.
* mloopx.in: Rewrite.
* cpux.[ch],decodex.[ch],readx.c,semx.c: Regenerate.
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1998-02-23 21:36:15 +00:00 |
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Doug Evans
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b8a9943dd4
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* Makefile.in (m32r.o): Depend on cpu.h
(extract.o): Pass -DSCACHE_P.
* mloop.in (extract{16,32}): Update call to m32r_decode.
* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
* sim-main.h: #include "ansidecl.h".
Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Build m32rx support now.
(m32rx.o): New rule.
* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
(m32rx_h_accums_get): New function.
* mloopx.in: Update call to m32rx_decode. Rewrite exec loop.
* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
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1998-02-05 21:01:06 +00:00 |
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