Commit graph

12834 commits

Author SHA1 Message Date
GDB Administrator
0a2f0f5d5b Automatic date update in version.in 2016-07-05 00:00:21 +00:00
GDB Administrator
bb44634d9b Automatic date update in version.in 2016-07-04 00:00:15 +00:00
GDB Administrator
1ceb37444e Automatic date update in version.in 2016-07-03 00:00:21 +00:00
GDB Administrator
9361a47a03 Automatic date update in version.in 2016-07-02 00:00:22 +00:00
Thomas Preud'homme
5e866f5aee Fix Thumb-2 BL detection
2016-07-01  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* elf32-arm.c (using_thumb2_bl): New function.
	(arm_type_of_stub): Declare thumb2 variable together and change type
	to bfd_boolean.  Use using_thumb2_bl () to determine whether
	THM_MAX_FWD_BRANCH_OFFSET or THM2_MAX_FWD_BRANCH_OFFSET should be
	checked for BL range.
	(elf32_arm_final_link_relocate): Use using_thumb2_bl () to determine
	the bit size of BL offset.

ld/
	* testsuite/ld-arm/arm-elf.exp (Thumb-2 BL): Assemble for ARMv7.
	(Thumb-2 BL on ARMv6-M): New testcase.
	* testsuite/ld-arm/thumb2-bl.d: Do not try to match testcase filename.
	* testsuite/ld-arm/thumb2-bl.s: Do not select architecture.
2016-07-01 16:13:25 +01:00
GDB Administrator
eefbbb8cbe Automatic date update in version.in 2016-07-01 00:00:22 +00:00
GDB Administrator
1a8da38cff Automatic date update in version.in 2016-06-30 00:00:19 +00:00
Nick Clifton
d691934d08 Preserve all mapping symbols in ARM and AArch64 object files.
bfd	* elfnn-aarch64.c (is_aarch64_mapping_symbol): New function.
	Returns TRUE for AArch64 mapping symbols.
	(elfNN_aarch64_backend_symbol_processing): New function.  Marks
	mapping symbols as precious in object files so that they will not
	be stripped.
	(elf_backend_symbol_processing): Define.

	* elf32-arm.c (is_arm_mapping_symbol): New function.  Returns TRUE
	for ARM mapping symbols.
	(elf32_arm_backend_symbol_processing): Make use of the new function.
2016-06-29 11:17:40 +01:00
GDB Administrator
2fafa20b34 Automatic date update in version.in 2016-06-29 00:00:26 +00:00
Nick Clifton
bb95c51a23 Fix typo in previous commit 2016-06-28 17:04:30 +01:00
H.J. Lu
f4ab0e2d1d Skip version check for unreferenced and undefined symbol
No need to check version if symbol is unreferenced and undefined.

bfd/

	PR ld/20306
	* elflink.c (elf_link_check_versioned_symbol): Return false
	for unreferenced undefined symbol.

ld/testsuite/

	* testsuite/ld-gc/gc.exp: Run pr20306 test.
	* ld-gc/pr20306.c: New file.
	* ld-gc/pr20306.d: Likewise.
2016-06-28 08:08:30 -07:00
Nick Clifton
1b857aeed3 Fix more linker testsuite failures.
bfin	* elf32-bfin.c (bfin_adjust_dynamic_symbol): Fail if a COPY reloc
	is needed.

ld	* testsuite/ld-elf/comm-data.exp: Expect comm-data2 test to fail
	for bfin.
	* testsuite/ld-elf/elf.exp: Expect pr14170 and symbolic function
	tests to fail for bfin.
	* testsuite/ld-elf/endsym.d: Expect to fail with cr16, crx, dlx,
	nds32 and visium.
	* testsuite/ld-elf/var1.d: Expect to fail with d30v, dlx, ft32 and
	microblaze.
	* testsuite/ld-pe/pe.exp: Expect foreign symbol test to fail for
	mcore-pe.
2016-06-28 15:55:22 +01:00
Nick Clifton
fca2a38fdb Mark ARM mapping symbols in object files are precious, so that strip will not remove them.
* elf32-arm.c (elf32_arm_backend_symbol_processing): New
	function.  Marks mapping symbols in object files as precious, so
	that strip will not remove them.
	(elf_backend_symbol_processing): Define.
2016-06-28 13:22:49 +01:00
James Clarke
7160c10d65 Don't convert R_SPARC_32 to R_SPARC_RELATIVE if class is ELFCLASS64.
bfd	* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Don't convert
	R_SPARC_32 to R_SPARC_RELATIVE if class is ELFCLASS64.

gold	* sparc.cc (Target_sparc::Scan::local): Don't convert R_SPARC_32
	to R_SPARC_RELATIVE if class is ELFCLASS64.
	(Target_sparc::Scan::global): Likewise.

ld	* testsuite/ld-elf/symbolic-func.r: Allow non-zero offsets from
	.text.
2016-06-28 12:00:56 +01:00
Maciej W. Rozycki
c9775dde32 MIPS16: Add R_MIPS16_PC16_S1 branch relocation support
For R_MIPS16_PC16_S1 the calculation is `(sign_extend(A) + S - P) >> 1'
and the usual MIPS16 bit shuffling applies to relocated field handling,
as per the encoding of the branch target in the extended form of the
MIPS16 B, BEQZ, BNEZ, BTEQZ and BTNEZ instructions.

	include/
	* elf/mips.h (R_MIPS16_PC16_S1): New relocation.

	bfd/
	* elf32-mips.c (elf_mips16_howto_table_rel): Add
	R_MIPS16_PC16_S1.
	(mips16_reloc_map): Likewise.
	* elf64-mips.c (mips16_elf64_howto_table_rel): Likewise.
	(mips16_elf64_howto_table_rela): Likewise.
	(mips16_reloc_map): Likewise.
	* elfn32-mips.c (elf_mips16_howto_table_rel): Likewise.
	(elf_mips16_howto_table_rela): Likewise.
	(mips16_reloc_map): Likewise.
	* elfxx-mips.c (mips16_branch_reloc_p): New function.
	(mips16_reloc_p): Handle R_MIPS16_PC16_S1.
	(b_reloc_p): Likewise.
	(mips_elf_calculate_relocation): Likewise.
	(_bfd_mips_elf_check_relocs): Likewise.
	* reloc.c (BFD_RELOC_MIPS16_16_PCREL_S1): New relocation.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

	gas/
	* config/tc-mips.c (mips16_reloc_p): Handle
	BFD_RELOC_MIPS16_16_PCREL_S1.
	(b_reloc_p): Likewise.
	(limited_pcrel_reloc_p): Likewise.
	(md_pcrel_from): Likewise.
	(md_apply_fix): Likewise.
	(tc_gen_reloc): Likewise.
	(md_convert_frag): Likewise.
	(mips_fix_adjustable): Update comment.
	* testsuite/gas/mips/mips16-branch-reloc-2.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-reloc-3.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-addend-2.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-addend-3.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-absolute.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-reloc-2.l: Remove file.
	* testsuite/gas/mips/mips16-branch-reloc-3.l: Remove file.
	* testsuite/gas/mips/mips16-branch-addend-2.l: Remove file.
	* testsuite/gas/mips/mips16-branch-addend-3.l: Remove file.
	* testsuite/gas/mips/mips16-branch-absolute.l: Remove file.
	* testsuite/gas/mips/mips16-branch-addend-2.s: Add padding.
	* testsuite/gas/mips/branch-weak.s: Adjust alignment, avoid
	implicit instruction padding, avoid MIPS16 JR->JRC conversion.
	* testsuite/gas/mips/branch-weak-6.d: New test.
	* testsuite/gas/mips/branch-weak-7.d: New test.
	* testsuite/gas/mips/mips.exp: Run the new tests.

	ld/
	* testsuite/ld-mips-elf/mips16-branch-2.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-3.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-addend-2.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-addend-3.d: New test.
	* testsuite/ld-mips-elf/mips16-branch.s: New test source.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-06-28 01:29:56 +01:00
GDB Administrator
bac13b9c13 Automatic date update in version.in 2016-06-28 00:00:21 +00:00
Alan Modra
c9301e3181 PR 19264 looping in ppc64_elf_size_stubs
b399102 fixed the testcase in this PR but it may be possible to
trigger the problem in other ways.

	PR ld/19264
	* elf64-ppc.c (STUB_SHRINK_ITER): Define.
	(ppc64_elf_size_stubs): Exit stub sizing loop past STUB_SHRINK_ITER
	if shrinking stubs.
	(ppc64_elf_size_stubs): Adjust to suit.
2016-06-27 20:04:53 +09:30
Trevor Saunders
3cd72572cb add ChangeLog entries 2016-06-27 06:01:34 -04:00
Trevor Saunders
48afb19489 dlx: move prototype of dlx_set_skip_hi16 to elf/dlx.h
bfd/ChangeLog:

2016-06-27  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* elf32-dlx.h: New file.
	* elf32-dlx.c: Adjust.

gas/ChangeLog:

2016-06-27  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* config/tc-dlx.c: Include bfd/elf32-dlx.h.
	* config/tc-dlx.h: Remove prototype of dlx_set_skip_hi16.
2016-06-27 05:57:32 -04:00
GDB Administrator
cd529d78e5 Automatic date update in version.in 2016-06-27 00:00:10 +00:00
GDB Administrator
081bae6c18 Automatic date update in version.in 2016-06-26 00:00:17 +00:00
Trevor Saunders
7c2c4aa12f xtensa: prototype xtensa_make_property_section in elf/xtensa.h
There's no reason to have multiple prototypes for the same function.

include/ChangeLog:

2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* elf/xtensa.h (xtensa_make_property_section): New prototype.

gas/ChangeLog:

2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* config/tc-xtensa.c (xtensa_make_property_section): Remove prototype.

bfd/ChangeLog:

2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* elf32-xtensa.c (xtensa_make_property_section): Remove prototype.
2016-06-25 11:50:33 -04:00
GDB Administrator
e0204c4d4c Automatic date update in version.in 2016-06-25 00:00:19 +00:00
John Baldwin
3350c5f5de Create a pseudo section for the ELF AUXV core dump note on FreeBSD.
The procstat AUXV core dump note in FreeBSD consists of 32-bit integer
followed by an array of auxiliary vector entries.

bfd/ChangeLog:

	* elf.c (elfcore_grok_freebsd_note): Handle NT_FREEBSD_PROCSTAT_AUXV
	notes.
2016-06-24 10:33:51 -07:00
John Baldwin
aa1ed4a93a Add elfcore_grok_freebsd_note to parse FreeBSD ELF core notes.
Move parsing of FreeBSD-specific ELF core notes out of elfcore_grok_note
into a new elfcore_grok_freebsd_note function.  Add core note grok routines
for FreeBSD's psinfo and prstatus notes while here rather than depending
on the native handling in elfcore_grok_note.

bfd/ChangeLog:

	* elf.c (elfcore_grok_note): Remove handling of NT_X86_XSTATE for
	FreeBSD.  Remove case for NT_FREEBSD_THRMISC.
	(elfcore_grok_freebsd_psinfo): New function.
	(elfcore_grok_freebsd_prstatus): New function.
	(elfcore_grok_freebsd_note): New function.
	(elf_parse_notes): Use "elfcore_grok_freebsd_note" for "FreeBSD"
	notes.
2016-06-24 10:32:15 -07:00
Joel Brobecker
6e321fa8f8 Add missing ChangeLog entry for "fix undefined reference [...]" commit. 2016-06-24 13:04:56 -04:00
Joel Brobecker
08ce1d723e fix undefined reference to bfd_link_plugin_object_p during link
When configured with the default options, GDB currently fails to link,
due to an undefined reference to bfd_link_plugin_object_p, coming from
elflink.c:

    #ifdef BFD_SUPPORTS_PLUGINS
           || (abfd->plugin_format == bfd_plugin_unknown
              && bfd_link_plugin_object_p (abfd))
    #endif

This is because BFD_SUPPORTS_PLUGINS is always defined. It is its value
that determines whether plugin support is enabled or not.

bfd/ChangeLog:

        * elflink.c: Check the value of BFD_SUPPORTS_PLUGINS rather
        than its existance.
2016-06-24 13:02:39 -04:00
Alan Modra
9cc0123fea MIPS objcopy --rename-section fix
Some MIPS targets use a named section symbol rather than a symbol with
no name as is used with most ELF targets.  When renaming sections, the
named section symbol needs to be renamed too.

Rather than fix this bug, I'd originally intended to just correct the
xfail added recently for update-1.o vs update4.o in update-section.exp,
using the same set of targets for the localize-hidden-1 mips xfail.
I'd extracted that target test into a new function, is_bad_symtab.  It
turns out to be useful in readelf.exp too.

bfd/
	* config.bfd: Delete mips vxworks patterns matched earlier.
	Combine mips*-*-none with mips*-*-elf*.
binutils/
	* objcopy.c (find_section_rename): Forward declare.  Remove
	ibfd and sec_ptr param.  Add old_name param.  Allow for NULL
	returned_flags.  Move read of section name and flags to..
	(setup_section): ..here.  Update find_section_rename call.
	(filter_symbols): Rename section symbols for renamed sections.
	(copy_object): Call filter_symbols when renamed sections.
	* testsuite/lib/binutils-common.exp (is_bad_symtab): New.
	* testsuite/binutils-all/update-section.exp: Revert 96037eb0
	mips xfail.
	* testsuite/binutils-all/objcopy.exp (copy_executable): Use
	is_bad_symtab.
	(localize-hidden-1): xfail if is_bad_symtab.
	* testsuite/binutils-all/readelf.exp: Use is_bad_symtab to select
	between mips/tmips.
2016-06-24 23:26:29 +09:30
GDB Administrator
5153607fc6 Automatic date update in version.in 2016-06-24 00:00:15 +00:00
GDB Administrator
f215c83b5f Automatic date update in version.in 2016-06-23 00:00:23 +00:00
GDB Administrator
cbf55359ca Automatic date update in version.in 2016-06-22 00:00:09 +00:00
Maciej W. Rozycki
5f68df25f8 MIPS/BFD: Don't stop processing on a cross-mode jump conversion error
As with commit ed53407eec ("MIPS/BFD: Don't stop processing on
`bfd_reloc_outofrange'") don't bail out right away and instead continue
processing on a cross-mode jump conversion error, so that any further
issues are also reported.  Adjust message formatting accordingly, using
`%X' to abort processing at conclusion.  Remove the full stop from the
end of the message, for consistency across error reporting.

Adjust the corresponding test case accordingly and make it trigger the
error twice.

	bfd/
	* elfxx-mips.c (mips_elf_perform_relocation): Call
	`info->callbacks->einfo' rather than `*_bfd_error_handler' and
	use the `%X%H' format for the cross-mode jump conversion error
	message.  Remove the full stop from the end of the message.
	Continue processing rather than returning failure.

	ld/
	* testsuite/ld-mips-elf/mode-change-error-1a.s: Trigger an error
	twice rather than once.
	* testsuite/ld-mips-elf/mode-change-error-1.d: Adjust
	accordingly.  Remove the full stop from the end of the message.
2016-06-21 14:18:23 +01:00
Graham Markall
bdd582dbf1 Arc assembler: Convert nps400 from a machine type to an extension.
gas	* config/tc-arc.c (check_cpu_feature, md_parse_option):
	Add nps400 option and feature. Add check for nps400
	feature. Refactor existing checks to check subclass before
	feature enablement.
	(md_show_usage): Document flags for NPS-400 and add some other
	undocumented flags.
	(cpu_type): Remove nps400 CPU type entry
	(check_zol): Remove bfd_mach_arc_nps400 case.
	(md_show_usage): Add help on -mcpu=nps400.
	(cpu_types): Add entry for nps400 as arc700 plus nps400 extension
	set.
	* doc/c-arc.texi: Document the -mnps400, -mspfp, -mdpfp, and
	-fpuda flags.  Document -mcpu=nps400.
	* testsuite/gas/arc/nps-400-0.d: Use -mcpu=arc700 -mnps400. Change
	expected flags to match ARC700 instead of NPS400.
	* testsuite/gas/arc/nps-400-1.d: Use -mcpu=arc700 -mnps400.
	* testsuite/gas/arc/nps-400-2.d: Likewise.
	* testsuite/gas/arc/nps-400-3.d: Likewise.
	* testsuite/gas/arc/nps-400-4.d: Likewise.
	* testsuite/gas/arc/nps-400-5.d: Likewise.
	* testsuite/gas/arc/nps-400-6.d: Likewise.
	* testsuite/gas/arc/nps-400-7.d: Likewise.
	* testsuite/gas/arc/textinsn2op01.s: Change opcode of myinsn to
	avoid clash with cbba instruction.
	* testsuite/gas/arc/textinsn2op01.d: Likewise.
	* testsuite/gas/arc/textinsn3op.d: Likewise.
	* testsuite/gas/arc/textinsn3op.s: Likewise.
	* testsuite/gas/arc/nps-400-0.d: Test using NPS-400 using
	-mcpu=nps400 as an alternative to -mcpu=arc700 -mnps400 flags.

binutils* readelf.c (decode_ARC_machine_flags): Remove E_ARC_MACH_NPS400
	case.

ld	* testsuite/ld-arc/nps-1a.d: Use -mcpu=arc700 -mnps400.
	* testsuite/ld-arc/nps-1b.d: Likewise.

include	* opcode/arc.h: Add nps400 extension and instruction
	subclass.
	Remove ARC_OPCODE_NPS400
	* elf/arc.h: Remove E_ARC_MACH_NPS400

opcodes	* arc-dis.c (arc_insn_length): Add comment on instruction length.
	Use same method for determining	instruction length on ARC700 and
	NPS-400.
	(arc_insn_length, print_insn_arc): Remove bfd_mach_arc_nps400.
	* arc-nps400-tbl.h: Make all nps400 instructions ARC700 instructions
	with the NPS400 subclass.
	* arc-opc.c: Likewise.

bfd	* archures.c: Remove bfd_mach_arc_nps400.
	* bfd-in2.h: Likewise.
	* cpu-arc.c (arch_info_struct): Likewise.
	* elf32-arc.c (arc_elf_object_p, arc_elf_final_write_processing):
	Likewise.
2016-06-21 14:03:08 +01:00
GDB Administrator
4fdf8fa604 Automatic date update in version.in 2016-06-21 00:00:18 +00:00
H.J. Lu
7dc3990e40 Use the IR symbol table for the IR input object
ELF linker shouldn't skip the IR object when searching the symbol table
of an archive element.  If linker doesn't know if the object file is an
IR object, it should give LTO plugin a chance to get the correct symbol
table and use the IR symbol table if the input is an IR object.

bfd/

	PR ld/18250
	PR ld/20267
	* elflink.c: Include plugin.h if BFD_SUPPORTS_PLUGINS is
	defined.
	(elf_link_is_defined_archive_symbol): Call
	bfd_link_plugin_object_p on unknown plugin object and use the
	IR symbol table if the input is an IR object.
	* plugin.c (bfd_link_plugin_object_p): New function.
	* plugin.h (bfd_link_plugin_object_p): New prototype.

ld/

	PR ld/20267
	* testsuite/ld-plugin/lto.exp (lto_link_tests): Add test for
	PR ld/20267.
	(lto_run_tests): Likewise.
	* testsuite/ld-plugin/pr20267a.c: New file.
	* testsuite/ld-plugin/pr20267b.c: Likewise.
2016-06-20 05:10:46 -07:00
Alan Modra
0616a28038 PR ld/20276: Set non_ir_ref on common symbol
Also, don't check alignment on symbol from plugin dummy input.

bfd/
	PR ld/20276
	* elflink.c (elf_link_add_object_symbols): Don't check alignment
	on symbol from plugin dummy input.
ld/
	PR ld/20276
	* plugin.c (plugin_notice): Set non_ir_ref on common symbols.
	* testsuite/ld-plugin/lto.exp (lto_link_tests): Add test for
	PR ld/20276.
	(lto_run_tests): Likewise.
	* testsuite/ld-plugin/pass.out: New file.
	* testsuite/ld-plugin/pr20276a.c: Likewise.
	* testsuite/ld-plugin/pr20276b.c: Likewise.
2016-06-20 11:26:13 +09:30
GDB Administrator
6336b4b737 Automatic date update in version.in 2016-06-20 00:00:17 +00:00
GDB Administrator
9a4f2f5dad Automatic date update in version.in 2016-06-19 00:00:22 +00:00
H.J. Lu
49f30d83f6 Rename bfd_plugin_uknown to bfd_plugin_unknown
bfd/

	* bfd.c (bfd_plugin_format): Rename bfd_plugin_uknown to
	bfd_plugin_unknown.
	* bfd-in2.h: Regenerated.
	* plugin.c (bfd_plugin_object_p): Replace bfd_plugin_uknown
	with bfd_plugin_unknown.

ld/

	* plugin.c (plugin_object_p): Replace bfd_plugin_uknown
	with bfd_plugin_unknown.
2016-06-18 14:15:31 -07:00
H.J. Lu
233cc9c13a Don't generate PLT for IFUNC GOT/pointer reference
If a backend supports it, PLT entry isn't needed when all references
to a STT_GNU_IFUNC symbols are done via GOT or static function pointers.
For GOT entries, We generate dynamic R_*_GLOB_DAT relocations for
preemptable symbols and R_*_IRELATIVE relocations for non-preemptable
symbols to update them with real function address.  For static pointer
pointers, we generate dynamic pointer relocations and store them in:

1. .rel[a].ifunc section in PIC object.
2. .rel[a].got section in dynamic executable.
3. .rel[a].iplt section in static executable.

We don't allocate GOT entry if it isn't used.

bfd/

	PR ld/20253
	* elf-bfd.h (_bfd_elf_allocate_ifunc_dyn_relocs): Add an
	bfd_boolean argument.
	* elf-ifunc.c (_bfd_elf_create_ifunc_sections): Replace
	"shared object" with "PIC object" in comments.
	(_bfd_elf_allocate_ifunc_dyn_relocs): Updated.  Replace
	"shared object" with "PIC object" in comments.  Avoid PLT if
	requested.  Generate dynamic relocations for non-GOT references.
	Make room for the special first entry in PLT and allocate PLT
	entry only for PLT and PC-relative references.  Store dynamic
	GOT relocations in .rel[a].iplt section for static executables.
	If PLT isn't used, always use GOT for symbol value.  Don't
	allocate GOT entry if it isn't used.
	* elf32-i386.c (elf_i386_check_relocs): Increment PLT reference
	count only in the code section.  Allocate dynamic pointer
	relocation against STT_GNU_IFUNC symbol in the non-code section.
	(elf_i386_adjust_dynamic_symbol): Increment PLT reference count
	only for PC-relative references.
	(elf_i386_allocate_dynrelocs): Pass TRUE to
	_bfd_elf_allocate_ifunc_dyn_relocs.
	(elf_i386_relocate_section): Allow R_386_GOT32/R_386_GOT32X
	relocations against STT_GNU_IFUNC symbols without PLT.  Generate
	dynamic pointer relocation against STT_GNU_IFUNC symbol in
	the non-code section and store it in the proper REL section.
	Don't allow non-pointer relocation against STT_GNU_IFUNC symbol
	without PLT.
	(elf_i386_finish_dynamic_symbol): Generate dynamic
	R_386_IRELATIVE and R_386_GLOB_DAT GOT relocations against
	STT_GNU_IFUNC symbols without PLT.
	(elf_i386_finish_dynamic_sections): Don't handle local
	STT_GNU_IFUNC symbols here.
	(elf_i386_output_arch_local_syms): Handle local STT_GNU_IFUNC
	symbols here.
	(elf_backend_output_arch_local_syms): New.
	* elf32-x86-64.c (elf_i386_check_relocs): Increment PLT reference
	count only in the code section.  Allocate dynamic pointer
	relocation against STT_GNU_IFUNC symbol in the non-code section.
	(elf_x86_64_adjust_dynamic_symbol): Increment PLT reference
	count only for PC-relative references.
	(elf_x86_64_allocate_dynrelocs): Pass TRUE to
	_bfd_elf_allocate_ifunc_dyn_relocs.
	(elf_x86_64_relocate_section): Allow R_X86_64_GOTPCREL,
	R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX and
	R_X86_64_GOTPCREL64 relocations against STT_GNU_IFUNC symbols
	without PLT.  Generate dynamic pointer relocation against
	STT_GNU_IFUNC symbol in the non-code section and store it in
	the proper RELA section.  Don't allow non-pointer relocation
	against STT_GNU_IFUNC symbol without PLT.
	(elf_x86_64_finish_dynamic_symbol): Generate dynamic
	R_X86_64_IRELATIVE and R_X86_64_GLOB_DAT GOT relocations against
	STT_GNU_IFUNC symbols without PLT.
	(elf_x86_64_finish_dynamic_sections): Don't handle local
	STT_GNU_IFUNC symbols here.
	(elf_x86_64_output_arch_local_syms): Handle local STT_GNU_IFUNC
	symbols here.
	(elf_backend_output_arch_local_syms): New.
	* elfnn-aarch64.c (elfNN_aarch64_allocate_ifunc_dynrelocs):
	Pass FALSE to _bfd_elf_allocate_ifunc_dyn_relocs.

ld/

	PR ld/20253
	* testsuite/ld-i386/i386.exp: Run PR ld/20253 tests.
	* testsuite/ld-i386/no-plt.exp: Likewise.
	* testsuite/ld-x86-64/no-plt.exp: Likewise.
	* testsuite/ld-i386/pr13302.d: Remove .rel.plt section.
	* testsuite/ld-ifunc/ifunc-13-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-13-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-15-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-15-x86-64.d: Likewise.
	* testsuite/ld-x86-64/pr13082-5a.d: Likewise.
	* testsuite/ld-x86-64/pr13082-5b.d: Likewise.
	* testsuite/ld-x86-64/pr13082-6a.d: Likewise.
	* testsuite/ld-x86-64/pr13082-6b.d: Likewise.
	* testsuite/ld-i386/pr20244-2a.d: Remove .plt section.
	* testsuite/ld-ifunc/ifunc-21-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-22-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
	* testsuite/ld-i386/pr20244-2b.d: Updated.
	* testsuite/ld-i386/pr20244-2c.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18a-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise.
	* testsuite/ld-i386/pr20253-1a.c: New file.
	* testsuite/ld-i386/pr20253-1b.S: Likewise.
	* testsuite/ld-i386/pr20253-1c.S: Likewise.
	* testsuite/ld-i386/pr20253-1d.S: Likewise.
	* testsuite/ld-i386/pr20253-2a.c: Likewise.
	* testsuite/ld-i386/pr20253-2b.S: Likewise.
	* testsuite/ld-i386/pr20253-2c.S: Likewise.
	* testsuite/ld-i386/pr20253-2d.S: Likewise.
	* testsuite/ld-i386/pr20253-3.d: Likewise.
	* testsuite/ld-i386/pr20253-3.s: Likewise.
	* testsuite/ld-i386/pr20253-4.s: Likewise.
	* testsuite/ld-i386/pr20253-4a.d: Likewise.
	* testsuite/ld-i386/pr20253-4b.d: Likewise.
	* testsuite/ld-i386/pr20253-4c.d: Likewise.
	* testsuite/ld-i386/pr20253-5.d: Likewise.
	* testsuite/ld-i386/pr20253-5.s: Likewise.
	* testsuite/ld-ifunc/ifunc-23-x86.s: Likewise.
	* testsuite/ld-ifunc/ifunc-23a-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-23b-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-23c-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-24-x86.s: Likewise.
	* testsuite/ld-ifunc/ifunc-24a-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-24b-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-24c-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-25-x86.s: Likewise.
	* testsuite/ld-ifunc/ifunc-25a-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-25b-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-25c-x86.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1.s: Likewise.
	* testsuite/ld-x86-64/pr20253-1a.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1b.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1c.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1d.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1e.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1f.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1g.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1h.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1i.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1j.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1k.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1l.d: Likewise.
	* testsuite/ld-x86-64/pr20253-2a.c: Likewise.
	* testsuite/ld-x86-64/pr20253-2b.S: Likewise.
	* testsuite/ld-x86-64/pr20253-2c.S: Likewise.
	* testsuite/ld-x86-64/pr20253-2d.S: Likewise.
	* testsuite/ld-x86-64/pr20253-3.d: Likewise.
	* testsuite/ld-x86-64/pr20253-3.s: Likewise.
	* testsuite/ld-x86-64/pr20253-4.s: Likewise.
	* testsuite/ld-x86-64/pr20253-4a.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4b.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4c.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4d.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4e.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4f.d: Likewise.
	* testsuite/ld-x86-64/pr20253-5.s: Likewise.
	* testsuite/ld-x86-64/pr20253-5a.d: Likewise.
	* testsuite/ld-x86-64/pr20253-5b.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18a-i386.d: Remove extra IRELATIVE
	relocation.
	* testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18a.s: Fix a typo.
	* testsuite/ld-x86-64/x86-64.exp: Run pr20253-1 tests.
2016-06-18 09:17:25 -07:00
GDB Administrator
854594f5ce Automatic date update in version.in 2016-06-18 00:00:20 +00:00
Thomas Preud'homme
80c135e554 Add support for Thumb-2 long branch veneers
2016-06-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>
	    Tony Wang  <tony.wang@arm.com>

bfd/
	* elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub
	sequence.
	(stub_long_branch_thumb2_only): Define stub.
	(arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only.
	(arm_stub_long_branch_thumb2_only): Likewise.
	(arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2
	capable targets.

ld/
	* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile):
	Assemble for ARMv6-M.
	(Thumb2-Thumb2 farcall M profile): New testcase.
	* testsuite/ld-arm/farcall-thumb2-thumb2-m.d: New file.
	* testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to
	reflect the use of Thumb-2 veneers for Thumb-2 capable targets.
	* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Likewise.
2016-06-17 18:28:08 +01:00
Jose E. Marchesi
4f26fb3a1b bfd,opcodes: sparc: new opcode v9{c,d,e,v,m} architectures and bfd machine numbers.
This patch adds support for the opcode architectures
SPARC_OPCODE_ARCH_V9{C,D,E,V,M} and its associated BFD machine numbers
bfd_mach_sparc_v9{c,d,e,v,m} and bfd_mach_sparc_v8plus{c,d,e,v,m}.

Note that for arches up to v9b (UltraSPARC III), the detection of the
BFD machine type was based on the bits in the e_machine field of the ELF
header.  However, there are no more available bits in that field, so
this patch takes the approach of using the hardware capabilities stored
in the object attributes HWCAPS/HWCAPS2 in order to characterize the
machine the object was built for.

bfd/ChangeLog:

2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* archures.c (bfd_mach_sparc_v8plusc): Define.
	(bfd_mach_sparc_v9c): Likewise.
	(bfd_mach_sparc_v8plusd): Likewise.
	(bfd_mach_sparc_v9d): Likewise.
	(bfd_mach_sparc_v8pluse): Likewise.
	(bfd_mach_sparc_v9e): Likewise.
	(bfd_mach_sparc_v8plusv): Likewise
	(bfd_mach_sparc_v9v): Likewise.
	(bfd_mach_sparc_v8plusm): Likewise.
	(bfd_mach_sparc_v9m): Likewise.
	(bfd_mach_sparc_v9_p): Adapt to v8plusm and v9m.
	(bfd_mach_sparc_64bit_p): Likewise.
	* bfd-in2.h: Regenerate.
	* cpu-sparc.c (arch_info_struct): Add entries for
	bfd_mach_sparc_v8plus{c,d,e,v,m} and bfd_mach_sparc_v9{c,d,e,v,m}.
	* aoutx.h (machine_type): Handle bfd_mach_sparc_v8plus{c,d,e,v,m}
	and bfd_mach_sparc_v9{c,d,e,v,m}.
	* elf32-sparc.c (elf32_sparc_final_write_processing): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_object_p): Likewise.

include/ChangeLog:

2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* opcode/sparc.h (enum sparc_opcode_arch_val): Add
	SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
	SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
	SPARC_OPCODE_ARCH_V9M.

opcodes/ChangeLog:

2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-dis.c (MASK_V9): Add SPARC_OPCODE_ARCH_V9{C,D,E,V,M}.
	(compute_arch_mask): Handle bfd_mach_sparc_v8plus{c,d,e,v,m} and
	bfd_mach_sparc_v9{c,d,e,v,m}.
	* sparc-opc.c (MASK_V9C): Define.
	(MASK_V9D): Likewise.
	(MASK_V9E): Likewise.
	(MASK_V9V): Likewise.
	(MASK_V9M): Likewise.
	(v6): Add MASK_V9{C,D,E,V,M}.
	(v6notlet): Likewise.
	(v7): Likewise.
	(v8): Likewise.
	(v9): Likewise.
	(v9andleon): Likewise.
	(v9a): Likewise.
	(v9b): Likewise.
	(v9c): Define.
	(v9d): Likewise.
	(v9e): Likewise.
	(v9v): Likewise.
	(v9m): Likewise.
	(sparc_opcode_archs): Add entry for v9{c,d,e,v,m}.
2016-06-17 02:12:48 -07:00
GDB Administrator
e7622e5214 Automatic date update in version.in 2016-06-17 00:00:20 +00:00
H.J. Lu
ca45f6e990 Add missing ChangeLog entries
commit bf52d7c720
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Jun 15 10:35:38 2016 -0700

    Don't check undefined symbol for IFUNC reloc
2016-06-16 12:38:34 -07:00
H.J. Lu
bf52d7c720 Don't check undefined symbol for IFUNC reloc
Since x86 elf_*_check_relocs is called after all symbols have been
resolved, there is no need to check undefined symbols for relocations
against IFUNC symbols.

bfd/

	* elf32-i386.c (elf_i386_check_relocs): Don't check undefined
	symbols for relocations against IFUNC symbols.
	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.

ld/

	* testsuite/ld-i386/i386.exp: Run pr19636-2e-nacl.
	* testsuite/ld-i386/pr19636-2e.d: Skip for NaCl targets.
	Remove .rel.plt section.
	* testsuite/ld-i386/pr19636-2e-nacl.d: New file.
2016-06-16 11:28:29 -07:00
Marcin Kościelnicki
f92339b8f3 bfd/s390: Fix DT_PLTRELSZ in presence of R_390_IRELATIVE.
This was broken by 4ade44b727,
which changed the calculation to use the .rela.plt linker section
instead of its output section - thus skipping .rela.iplt .
Fix the calculations to include it.

bfd/ChangeLog:

	* elf32-s390.c (elf_s390_finish_dynamic_sections): Include
	.rela.iplt in DT_PLTRELSZ.
	* elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise,
	for DT_PLTRELSZ and DT_RELASZ as well.
2016-06-16 17:22:14 +02:00
H.J. Lu
081b1afe5a Skip relocations in non-loaded, non-alloced sections
Don't do anything special with non-loaded, non-alloced sections.
In particular, any relocs in such sections should not affect GOT
and PLT reference counting (ie. we don't allow them to create GOT
or PLT entries), there's no possibility or desire to optimize TLS
relocs, and there's not much point in propagating relocs to shared
libs that the dynamic linker won't relocate.

	* elf32-i386.c (elf_i386_check_relocs): Skip relocations in
	non-loaded, non-alloced sections.
	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
2016-06-16 05:52:34 -07:00
H.J. Lu
4c23f2ffa8 Check SEC_ALLOC before allocating dynamic relocation
* elf32-i386.c (elf_i386_check_relocs): Check SEC_ALLOC before
	allocating dynamic relocation.
	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
2016-06-15 18:42:56 -07:00
GDB Administrator
77b1142d4e Automatic date update in version.in 2016-06-16 00:00:19 +00:00