Jeff Law
ffd95d63ec
* m10300-opc.c: First cut at UDF instructions.
1998-08-12 17:12:31 +00:00
Jeff Law
9509185b58
* m10300-opc.c: Add entries for "no_match_operands" field in
...
the opcode table.
1998-07-28 17:01:21 +00:00
Jeff Law
47254a1631
* m10300-opc.c: Add DSP autoincrement memory loads/stores.
1998-07-23 15:51:24 +00:00
Jeff Law
b0b57954c5
* m10300-opc.c: Add autoincrement memory loads/stores.
1998-07-23 15:22:17 +00:00
Jeff Law
f10a9bdead
* m10300-opc.c (mn10300_opcodes): Fix opcode for 4 operand "mul" and
...
"mulu".
1998-07-17 00:06:55 +00:00
Jeff Law
ff7a9bc9b4
* m10300-opc.c: Reorder "movbu" and "movhu" instructions too.
...
Why oh why didn't they take our advice about register prefixing. It would
have avoided the ambigious syntax issues. Sigh.
1998-06-30 16:04:44 +00:00
Jeff Law
a841b47c4b
* m10300-opc.c: Reorder more instructions so that we do not
...
accidentally match a mn10300 instruction when we really
wanted an am33 instruction.
1998-06-29 20:57:25 +00:00
Jeff Law
0c9b3858c1
* m10300-dis.c: Only recognize instructions from the currently
...
selected machine.
* m10300-opc.c: Add field indicating the particular variant of
the mn10300 each instruction is available on.
1998-06-26 17:12:10 +00:00
Jeff Law
59557be25d
* mn10300-opc.c (mn10300_opcodes): Fix typo in IMM24 versions of the
...
am33 shift instructions.
1998-06-24 19:02:27 +00:00
Jeff Law
4da06098ff
* mn10300-opc.c (IMM32_HIGH8_MEM): New operand type.
...
(mn10300_opcodes): Reorder so as to try and select opcodes from
the core chip when multiple alternatives exist. Change several
am33 instructions to use IMM32_HIGH8_MEM. Fix typos in "mac" and
"macbu" instructions. Fix typos in a couple DSP instructions too.
1998-06-24 15:56:40 +00:00
Jeff Law
8b727aa4d3
* m10300-opc.c: Support one operand "asr", "lsr" and "asl"
...
instructions. Support (sp) addressing mode by expanding it into
(0,sp).
1998-06-23 17:01:44 +00:00
Jeff Law
c5a6e18b2e
* m10300-opc.c: Support 4 byte DSP instructions.
1998-06-22 19:38:35 +00:00
Jeff Law
b17af7f6ef
* m10300-opc.c: Support for 3 byte and 4 byte extended instructions
...
found on the mn10300.
1998-06-19 15:45:13 +00:00
Jeff Law
9eb61c7c61
start-sanitize-am33
...
* m10300-opc.c (USP, SSP, MSP, PC, IMM4, EPSW, RN0, RM1): New
operands for the am33.
(mn10300_opcodes): Add new instructions from the am33.
end-sanitize-am33
* m10300-opc.c (mn10300_opcodes): Change opcode for "syscall".
Snapshot current work.
1998-06-17 23:54:25 +00:00
